Ken Blecker's research while affiliated with US Army Armament Research, Development and Engineering Center and other places

The survivability and reliability of commercial electronic components under very high thermo-mechanical loads are improved using underfilling and potting methods. Potting protects from operating conditions such as moisture, water, or corrosive agents. Furthermore, potting offers damping against shock and vibrations, heat dissipation, and structural support. Being one of the most cost-efficient methods, potting greatly increases reliability and therefore reduces costs for replacements and repairs. It also addresses trapped hot air issues better than other restraint technologies. In potted electronic assemblies, interfacial delamination at the epoxy and PCB interface has been one of the major failure modes. Interfacial delamination happens at the epoxy/PCB interface under dynamic shock loads, which leads to failures at the solder interconnects of the electronic components. Sustained operation and storage at elevated temperatures change the interfacial characteristics at the epoxy/PCB interface. This research is focused on interfacial failure mechanics at epoxy/PCB interfaces with high-temperature isothermal aging. In the selection of epoxy potting material and the reliability assessments of the supplemental restraint systems, fracture parameters such as steady-state strain energy release rate stress and fracture toughness are critical. Rectangular beam specimens of the epoxy/PCB interface are fabricated for different potting compounds and the fracture behavior is studied under quasi-static monotonic three-point and four-point bend loads. One of the main differences between three-point and four-point bend loading is that the maximum bending stress occurs at the midpoint under the point of loading of the specimen in three-point bending, whereas the peak stress is distributed over the section of the specimen between the loading points in four-point bending. Four different potting compounds with diverse properties have been studied. The recommended curing schedule from the manufacturer has been chosen and followed for all the potting compounds. The epoxy/PCB interfacial samples are aged at a high temperature of 100°C for 30 to 180 days. Damage has been assumed to happen at the epoxy/PCB interface under dynamic loads. The critical load of crack initiation for the epoxy/PCB interface has been determined from the experimental findings, and it is used in the computation of fracture toughness values. The fracture toughness values are compared for the various epoxy/PCB systems based on the number of days of thermal aging and the method of flexure testing. A cohesive zone model has been constructed for predominantly mode-I delamination with four-point bend stress to predict the interfacial delamination behavior at the epoxy/PCB interfaces. It has been assumed that the bulk material is linear elastic during the bending load. The cohesive zone has been modeled at the interface, where the interfacial fracture has been assumed to occur. The fracture behavior in the simulation is predicted based on the fracture parameters determined through the experiment. The computed cohesive zone parameters are unique to the interfaces, they can be used across various applications with the same epoxy/PCB interface to predict interfacial delamination and to select a more suitable potting material.

In various industries, including automobile industry, oil and gas, aerospace, and medical technology, electronic components are subjected to significant strain during shocks, vibrations, and drop conditions. Electronic components of this type are frequently subjected to extreme temperatures ranging from -65°C to 200°C. These electronic equipment are frequently subjected to strain rates of 1 to 100 per second in sensitive conditions. SAC-Q, SAC-R, Innolot, and other doped SAC solder alloys have recently been introduced to electronic components and packages. SAC-Q refers to the addition of Bi to the Sn-Ag-Cu composition. The mechanical characteristic results and statistics for lead-free solder alloys are particularly important for increasing electronic package stability and high temperature storage and strain rates. Furthermore, the mechanical characteristics of solder alloys can be dramatically altered owing to thermal aging, which causes microstructure alteration. For high temperature aging for longer durations and testing at extremely low to very high working temperatures, SAC-Q solder alloy data is not available. The SAC-Q solder material was tested and studied at working temperatures ranging from -65°C to 200°C, with strain rates of up to 75 per second, for this study. A comparison was also done with the SAC305 solder, which had been thermally aged and tested under identical conditions. Isothermal aging specimens were kept at 100 °C for up to 180 days following manufacturing and reflowing when tensile studies were conducted at various operating temperatures. This study develops and describes stress-strain curves for a wide variety of strain rates and test temperatures. In addition, the test results and data collected were matched to the Anand viscoplasticity model, and Anand constants were calculated by estimating high strain rate behavior throughout a wide range of operating temperatures and stress levels. In addition, for BGA package assembly with PCB, FE analysis was performed for drop/shock events. For varied aging circumstances of SAC-Q solder ball joints, hysteresis stress-strain curves and plastic work density curves are generated.

In the automotive, oil & gas, aerospace, and medical technology sectors, electronic parts are frequently subjected to higher strain loads as a result of shocks, vibrations, and drop-impact circumstances. The electrical parts in such applications are frequently exposed to severe low and high temperatures ranging from −65°C to 200°C. Furthermore, in the critical environment, these electronic equipment can be exposed to high strain rates ranging from 1 to 100 per second. SAC solder alloys are the primary alloys used to replace tin-lead solders in electronic assembly applications. Surface mount, wave soldering, and hand soldering applications have all demonstrated the effectiveness of SAC solder alloys. Numerous doped solder alloys, such as SAC-Q, SAC-R, Innolot, M758 etc. have recently been introduced in electronic components. Mechanical characteristics and statistics for lead-free solder alloys are critical for enhancing electronic package durability at high temperatures and strain rates. Additionally, thermal aging causes microstructure changes, and can significantly affect the mechanical characteristics of solder alloys. There are not enough results are available for the mechanical properties of solder alloys with extreme low to high working temperatures. Additionally, there is currently a lack of published literature on the mechanical performance of lead-free alloys under the harsh conditions of high-temperature vibration, drop, and shock. SAC Solders are tested and examined for this study at working temperatures ranging from −65°C to 200°C and at strain rates of up to 75 per second for up to 1 year of isothermal aging with a storage temperature of 100°C. Also, the obtained experimental findings and data were fitted to the Anand viscoplasticity model, and the Anand constants were determined by calculating the stress-strain behavior reported for operating temperatures ranging from −65°C to +200°C. In addition, FE analysis for drop/shock events for 1500g, for BGA package assembly with PCB has been performed. Hysteresis stress-strain curves and plastic work density curves for the solder ball joints are examined under various thermal aging circumstances for drop/shock events. Effect of various operating temperatures and aging durations on hysteresis loops and plastic work densities have been studied.

Electronic components designed for commercial purposes are subjected to high G shock loads and thermo-mechanical loads in defense and aerospace applications, making reliability a crucial factor in these harsh environments. To improve the reliability of printed circuit boards in such applications, they are potted, but interfacial delamination at the potting/PCB interface remains a major failure mode. The interfacial properties of the potting/PCB interface evolve over time with sustained exposure to high temperatures, which makes it necessary to investigate the effects of such exposure on the interface properties. The present study focuses on investigating the evolution of interfacial properties at the potting/PCB interface with respect to high-temperature exposure and the use of restraint mechanisms. A circular printed circuit board with fine-pitch electronic packages and multilayer ceramic chip capacitors is assembled, and bimaterial specimens of potting/PCB are made to investigate the evolution of interfacial properties. The specimens are tested under four-point bend loading, and the interfacial fracture toughness properties and cohesive zone parameters are determined for each of the interfaces. Additionally, potted circular printed circuit boards with four different potting materials are tested for pristine and 90-day aging at 150°C. The boards are subjected to shock levels of 10,000g and 25,000g to evaluate the efficacy of the potting compounds on the solder joint reliability of fine-pitch electronics and large discrete components. The study investigates an aspect of potting electronics that has not been reported earlier and could have practical implications for manufacturers. The cohesive zone parameters obtained from the bi-material samples are validated and used to develop a predictive finite element high G shock model for the circular board assemblies. The experimental test conditions are validated with the predictive model output to provide a better understanding of the interfacial properties of the potting/PCB interface. The study also discusses the potential use of the predictive model in the design of electronic components for harsh environmental applications. In summary, the study investigates the evolution of interfacial properties at the potting/PCB interface with respect to high-temperature exposure and the use of restraint mechanisms. The study also evaluates the efficacy of different potting compounds on the solder joint reliability of fine-pitch electronics and large discrete components for various aging durations. The cohesive zone parameters obtained from the bi-material samples are validated and used in the development of a predictive finite element high G shock model. The study could have practical implications for manufacturers designing electronic components for harsh environmental applications, and it provides valuable insights into the interfacial properties of the potting/PCB interface.

Electronics in harsh environments are often subjected to extreme shock loading up to 50,000Gs, moisture, and high temperature. Potting of PCBs is often used to provide protection from extreme mechanical shock loads, vibration loads, and thermo-mechanical loads. The cured potting materials are prone to interfacial delamination under dynamic shock loading, which in turn may potentially cause failures in the package interconnects. The literature on potting compounds primarily focuses on the reliability in end application or the study of bulk material properties. This paper uses a four-point bend specimen to study the Substrate/Epoxy system and measure the fracture parameters of the bi-material strips to determine the interface delamination mechanisms. The bi-material strips of Substrate/Epoxy was kept at elevated temperatures of 100°C for aging. Then the sample specimens were subjected to quasi-static monotonic and cyclic loading to observe the critical stress intensity factors, fatigue slope parameters, and degradation interfaces bond adhesion of bi-material strips. Epoxy-A is a stiff material with 12,260 psi of tensile strength. The monotonic critical stress intensity factors and fatigue crack growth of the interfacial delamination for the two epoxy systems were characterized using strain energy release rate. A prediction of a number of cycles to failure and the performance of different epoxy system resistance was evaluated during cyclic bending loading using Paris Power Law.

Potting is one of the most effective techniques for safeguarding electronics assembly in challenging harsh conditions, including shock and vibration. Interconnect failures are often preceded by delamination at the PCB and epoxy interface. PCB-Epoxy interfaces have not been extensively researched for interfacial fracture resistance under high thermo-mechanical loading. In this study, bi-material PCB-epoxy samples are made and exposed to long-term high-temperature aging followed by monotonic four-point bend loading. The evolution of the interfacial integrity under sustained high-temperature exposure has been quantified. The study looks at five distinct types of potting materials with varying properties. The specimens are exposed to a high temperature of 100°C and 150°C for 30 days, 60 days, 90 days, 120 days, 180 days, 240 days, and 360 days. Steady-state strain energy release rate, mode-I (KI), and mode-II (KII) stress intensity factors are determined for the PCB-Epoxy interface. Cohesive zone parameters for each of the PCB-Epoxy interfaces have been determined and implemented into a predictive cohesive zone model (CZM). The PCB-Epoxy bi-material specimen has been modeled in ABAQUS with a cohesive zone at the interface and subjected to mode-I four-point bend loading. Damage is considered to occur at the interface where the cohesive zone has been modeled. For both pristine and aged tests, the damage accumulation is predicted using the interfacial fracture parameters from the experiment.

In automotive, aerospace, and defense applications – electronic parts can often be exposed to high strain loads during shocks, vibrations and drop-impact conditions. Electronic parts can often face extreme low and high temperatures ranging from −65°C to 200°C. Additionally, these electronic devices can be subjected to strain rates of 1 to 100 per second in a critical environment. Numerous doped solder alloys have emerged to mitigate the effects of sustained high-temperature operation. The mechanical properties of SAC-Q solder alloy, isothermally aged for prolonged durations and tested at extremely low to high operating temperatures, are not available. In this work, SAC-Q doped solder material is tested and studied for this study at a range of operating temperatures of −65°C to 200°C and at a strain rate up to 75 per second for up to 240 days (i.e. 8 months) of isothermal aging with a storage temperature of 100°C. For the extensive range of strain rates and surrounding test temperatures, stress-strain curves are established for the solder. The measured experimental results and data were fitted to the Anand viscoplasticity model. The Anand constants were calculated by estimating the stress-strain behavior measured for operating temperatures −65°C to 200°C for SAC-Q solder. FE analysis for drop/shock events for BGA package assembly with PCB has been carried out. Hysteresis stress-strain curves and plastic work density curves are generated for various aging conditions for SAC-Q solder ball joints.

In aerospace, military, and automotive applications, various electronic parts may be subjected to sustained operation at high and low surrounding temperatures as well as high strain-rate loads. Previous research studies have shown that material properties of undoped SAC alloys evolve even at moderate temperatures after a prolonged period of storage. A variety of dopants has been introduced into SAC alloy formulations in order to reduce the aging effects. In this study, two doped SAC solder called QSAC10 and QSAC20, have been subjected to high strain rate testing after keeping them in storage at temperature of 50°C for 120 days. Samples with no aging to 120 days aged samples have been subjected to uniaxial tensile tests to measure the mechanical properties of SAC+Bi solders. The High and Low operating temperatures used in this experiment ranged from −65°C to 200°C. Then the experimental material data was used to compute the constants for the Anand Visco-Plasticity model. Using the Anand constitutive model, the material constitutive behavior has been implemented in a finite element framework to simulate the drop events.