Jacques Fournier's research while affiliated with Université Grenoble Alpes and other places
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Publications (51)
Numerous timing side-channels attacks have been proposed in the recent years, showing that all shared states inside the microarchitecture are potential threats. Previous works have dealt with this problem by considering those “shared states” separately and not by looking at the system as a whole.In this paper, instead of reconsidering the problemat...
Side-channel attacks are a serious threat against secret data involved in cryptographic calculations, as, for instance, pairing-based cryptography which is a promising tool for the IoT. We focus our work on correlation power analysis (CPA) attack against a pairing implementation. We improve a vertical side-channel analysis attack and propose the fi...
The authenticated cipher ACORN is one of the two finalists of the CAESAR competition and is intended for lightweight applications. Because such use cases require protection against physical attacks, several works have been undertaken to achieve secure implementations. Although dedicated threshold and masked schemes have been proposed, no practical...
Pairing-based cryptography (PBC) has been significantly studied over the last decade, both in the areas of computational performance and in establishing security and privacy protocols. PBC implementations on embedded devices are exposed to physical attacks such as side channel attacks. Such attacks which are able to recover the secret input used in...
Wake-up radios are mechanisms that control the sleep and active modes of energy-constrained Internet of Things (IoT) nodes. These radios detect pre-determined wake-up tokens and switch the devices to an active state. Such systems are vulnerable to a kind of Denial-of-Service attacks called Denial-of-Sleep, where attackers continuously send wake-up...
ChaCha is a family of stream ciphers that are very efficient on constrainted platforms. In this paper, we present electromagnetic side-channel analyses for two different software implementations of ChaCha20 on a 32-bit architecture: one compiled and another one directly written in assembly. On the device under test, practical experiments show that...
LS-Designs are a family of SPN-based block ciphers whose linear layer is based on the so-called interleaved construction. They will be dedicated to low-end devices with high performance and low-resource constraints, objects which need to be resistant to physical attacks. In this paper we describe a complete Differential Fault Analysis against LS-De...
Although the vulnerability of pairing-based algorithms to side-channel attacks has been demonstrated—pairing implementations were targeted on three different devices in a recent paper [41]—it nevertheless remains difficult to choose an adapted leakage model and detect points of interest. Our proposed approach evaluates the parameters of the attack...
PRIDE is one of the most efficient lightweight block cipher proposed so far for connected objects with high performance and low-resource constraints. In this paper we describe the first ever complete Differential Fault Analysis against PRIDE. We describe how fault attacks can be used against implementations of PRIDE to recover the entire encryption...
This paper introduces an embedded solution for the detection of hardware trojans (HTs) and counterfeits. The proposed method, which considers that HTs are necessarily inserted on production lots and not on a single device, is based on the fingerprinting of the static distribution of the supply voltage (Vdd) over the whole surface of an integrated c...
Hardware Trojans have emerged as a security threat to many critical systems. In particular, malicious hardware components can be inserted at the foundry for implementing hidden backdoors to leak secret information. In this paper, we present a new method to partition the circuit under test into blocks in order to obtain different side-channel signat...
This chapter addresses some of the practical difficulties when designing a silicon-PUF based on CMOS technology. When designing such a PUF, and particularly in the case of an arbiter-PUF, particular care should be taken during the place and route phase. To ensure the properties of the PUF, full-custom back-end design may be required. This chapter g...
Nowadays, the security level of secure integrated circuits makes simple attacks less efficient. The combination of invasive approaches and fault attacks can be seen as more and more pertinent to retrieve secrets from integrated circuits. This paper includes a practical methodology and its application. We first describe how to retrieve the physical...
The latest implementations of pairings allow efficient schemes for Pairing Based Cryptography. These make the use of pairings suitable for small and constrained devices (smart phones, smart cards…) in addition to more powerful platforms. As for any cryptographic algorithm which may be deployed in insecure locations, these implementations must be se...
Pairing based cryptography (PBC) is touted as an efficient approach to address usability and privacy issues in the cyberspace. Like most cryptographic algorithms, PBC must be robust not only against theoretical cryptanalysis but also against practical physical attacks such as fault injections. The computation of the Tate pairing can be divided into...
Laser fault injections have been evolving rapidly with the advent of more precise, sophisticated and cost-efficient sources, optics and control circuits. In this paper, we show a methodology to improve the test coverage and to speed up analysis based on laser fault injections by only targeting standard cells of interest. We describe how to identify...
Hardware characterizations of integrated circuits have been evolving rapidly with the advent of more precise, sophisticated and cost-efficient tools. In this paper we describe how the fine tuning of a laser source has been used to characterize, set and reset the state of registers in a 90 nm chip. By adjusting the incident laser beam’s location, it...
The calculation of the Tate pairing on ordinary curves involves two major steps: the Miller Loop (ML) followed by the Final Exponentiation (FE). The first step for achieving a full pairing inversion would be to invert this FE, which in itself is a mathematically difficult problem. To our best knowledge, most fault attack schemes proposed against pa...
This paper describes the results of the practical measurements done to determine the path delay associated with each bit of a hardware AES FPGA implementation using a clock glitch injection tool. We illustrate how the measured path delays can constitute a characteristic fingerprint of an Intellectuel Property (IP) and can be used to detect the inse...
In the SECRICOM project where seamless, interoperable crisis management communication is required, strong security and trust must be achieved under hostile physical and communication environment. Such environment centralized remote trusted third parties (TTP) are not easily deployed and can constitute single points of failure. In this paper, a loca...
Differential fault analysis (DFA) techniques have been widely studied during the past decade. To our best knowledge, most DFA techniques on the Advanced Encryption Standard (AES) either impose strong constraints on the fault injection process or require numerous faults in order to recover the secret key. This article presents a simple methodology b...
Security and Trust in communication systems where very sensitive information are exchanged is achieved and retained through hardware means. In the SECRICOM project where seamless, interoperable crisis management communication is required, we have developed a security and trust managements mechanism based on a smart card like hardware structure call...
Along with the vast use of cryptography in security devices came the emergence of attacks like Electro-Magnetic analysis (EMA) where the measurement of the Electro-Magnetic (EM) waves radiated from an integrated circuit are used to extract sensitive information. Several research papers have covered EMA but very few have focused on the probes used....
Smartphones, whose market share has increased by 54% between 2009 and 2010, is one of the favored platform for "Convergence Computing ". Convergence Computing is a technology in which a single device can provide various services without any restrictions from external devices or networks. Today, smartphones as convergent single device have diverse f...
In critical communication infrastructures, hardware accelerators are often used to speed up cryptographic calculations. Their resistance to physical attacks determines how secure the overall infrastructure is. In this paper, we describe the implementation and characterisation of an AES accelerator embedding security features against physical attack...
The secret keys handled by cryptographic devices can be extracted
using fault attacks associated with cryptanalysis techniques. These
faults can be induced by different means such as laser exposure,
voltage or clock glitches, electromagnetic perturbation, etc. This
paper provides a detailed insight into the physics and mechanisms
involved in severa...
Cryptographic circuits can be subjected to several kinds of side-channel
and fault attacks in order to extract the secret key. Side-channel
attacks can be carried by measuring either the power consumed or
the EM waves emitted by the cryptographic module and trying to find
a correlation between the given side-channel and the data manipulated.
Concer...
Today's trend in the smart card industry is to move from ROM+EEPROM chips to Flash-only products. Recent publications have illustrated the vulnerability of Floating Gate memories to UV and heat radiation. In this paper, we explain how, by using low cost means, such a vulnerability can be used to modify specific data within an EEPROM memory even in...
Citations
... Wistoff et al. [251; 252] proposed a fence.t instruction to provide temporal partitioning, and Escouteloup et al. [66] proposed thread-level security domains called "domes", to introduce additional levels of isolation on RISC-V processors, but neither approach has any effect on same-domain attacks. ...
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... Another effective countermeasure against these attacks was implemented for Curve25519 cswap [LLF20]. However, the proposed cswap implementation does not consider the risk of correlation between memory loads and stores of the unchanged sub-words, before and after swapping. ...
... Montoya et al. [27] propose a novel countermeasure called dynamic encoding using a shift register to balance power consumption without precharge at the algorithm level and require at most 8 random bits at each encryption. Protecting lightweight algorithms in resource-constrained devices is challenging because they require up to thousands of bits of fresh randomness at each encryption and create power and area overhead. ...
... Even though an analog-inspired encryption method for hardware security reduces energy consumption, latency, and complexity, but provides a moderate level of security. Therefore, a dynamic trade-off between security, power use, and performance needs to be established [22]. ...
... This critical operation was recently attacked through correlation power analysis (CPA) [6,21,38] where the target was a modular multiplication calculation. ...
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... A lot of researchers have been seriously studying PBC since the 90's, in the area of cyber-security and privacy cryptographic protocols. Several approaches have been proposed in many papers ( [8], [12]). Cryptography has been used to help to provide confidential communications between mutually trusted parties. ...
... In recent years, many side channel attacks have been discovered. The authors [20] made a study on the power analysis of pairing based cryptography implementation. The specific attack towards pairing cryptography scheme was given. ...
... They showed that application of ECC significantly help to improve the overall performance. Healthcare Storage optimisation, Efficiency improvement, Access control, Authentication, Security enhancement, Privacy, Identity management [22], [23], [28], [36], [37] IoT Mobile Privacy, Authentication, Key generation, Privacy-preserving, Security enhancement [35], [26] Security Enhancement Enhance security, Runtime optimisation [42], [72] ECDSA Cloud Cloud storage Performance improvement, Security enhancement, Storage, Signature , Privacy, Data management [27], [33], [41], [31] Cryptocurrency Signature generation verification, Provability, Privacy, Enhanced security, Identity Key management [29], [34], [38], [40], [24] Electric vehicle Storage, Security enhancement, Privacy, protection [37], [25], [39] ...
... According to the BT Mesh standard [39] the aforementioned security measures can provide protection against most threats against mesh networks. However, there are still vulnerabilities; device and application keys can be stolen/recovered by hardware exploitation and be susceptible to attacks such as simple power analysis, differential power analysis, and fault attack [49]. Other possible threats include malformation of the TTL value of packets [50] and exploiting "friend" nodes that lead to denial-of-service and impersonation attacks [51]. ...
... However, elliptic curves can be defined on a prime field ( ) according to the equation (2) . Fournier recently indicated in his paper [10], that prime fields are preferred to binary fields because he claims that the discrete logarithm problem for binary elliptic curves can be solved using sub-exponential algorithms. Although, on the other hand, carry propagations by arithmetic operations in prime fields can be a source of weaknesses against sidechannel attacks. ...
