Gwangryeol Baek's research while affiliated with Sogang University and other places

The scaling trends of monolithic 3-D (M3-D) complementary metal-oxide-semiconductor (CMOS) nanoelectromechanical (NEM) reconfigurable logic (RL) circuits are compared with CMOS-only circuits for the first time. It is confirmed that M3-D CMOS-NEM RL circuits are superior to CMOS-only circuits in terms of propagation delay, power consumption, and power-delay product (PDP) because of the low resistance and full signal swing of NEM memory switches that not only affect the current switch block but also the following block. Because the performance, power, and energy gains of the CMOS-NEM RL circuits over CMOS-only circuits increase as the technology node improves, M3-D CMOS-NEM RL circuits can be considered as one of the most promising candidates for high-density, high-performance, and low-power RL circuits.

Tri-state nanoelectromechanical (NEM) memory switches are proposed for the implementation of high-impedance state 0 in addition to low-impedance states 1 and 2 for the improvement of conventional complementary metal-oxide-semiconductor-NEM (CMOS-NEM) reconfigurable logic (RL) operations. Although it is well known that the high impedance state of routing switches is essential to prevent the unnecessary data throughput of RL circuits, previously proposed NEM memory switches have only implemented binary states: states 1 and 2. On the contrary, our proposed NEM memory switches can have tri-states, which are achieved by modifying their operation methods and design guidelines.