Chinnaraj Munirathina Prabhu's research while affiliated with Multimedia University and other places

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Publication (1)

Figure 1. Flowchart of the methodology of the design of E 2 VR11T SRAM...
Figure 10. Process variation on power consumption of cells; (a) read...
Figure 11. Voltage variation on power consumption of cells; (a) read...
Figure 12. Temperature variation on power consumption of cells; (a)...
+9 Operational specification of all the cells.
Energy-Efficient and Variability-Resilient 11T SRAM Design Using Data-Aware Read–Write Assist (DARWA) Technique for Low-Power Applications
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  • May 2023
The need for power-efficient devices, such as smart sensor nodes, mobile devices, and portable digital gadgets, is markedly increasing and these devices are becoming commonly used in daily life. These devices continue to demand an energy-efficient cache memory designed on Static Random-Access Memory (SRAM) with enhanced speed, performance, and stab...
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Citations

... According to the International Technology Roadmap for Semiconductors (ITRS), SRAM typically occupies around 90 % of the die area, underscoring its significance in semiconductor design and fabrication [1]. Applications like smart agriculture, portable biomedical digital gadgets, smart sensor nodes and smart building etc. demand for memory devices designed using low-power static random-access memory (SRAM) [2][3][4][5][6][7][8]. The memory devices used in these applications mainly rely on the power consumption and stability of SRAM cells. ...
Reference: Design of power efficient and reliable hybrid inverter approach based 11 T SRAM design using GNRFET technology
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