Boram Yi's research while affiliated with Sejong University and other places

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Publications (8)


Design Consideration of Ferroelectric Field-Effect-Transistors with Metal–Ferroelectric–Metal Capacitorory
  • Article
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May 2023

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31 Reads

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1 Citation

Solid-State Electronics

Boram Yi

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Design Consideration of Ferroelectric Field-Effect-Transistors with Metal–Ferroelectric–Metal Capacitorfor Ternary Content Addressable Memory

January 2023

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14 Reads

SSRN Electronic Journal

The performance of ferroelectric field-effect transistor (FeFET)-based ternary content addressable memory (TCAM) is examined to optimize the metal-ferroelectric-metal (MFM) capacitor of FeFET through a compact model based on the multi-domain Preisach theory. To reduce the search delay of the FeFET-based TCAM, the area of the MFM capacitor should be reduced, therefore enhancing polarization. Further, the effect of the polarization properties of ferroelectric material on the performance of the FeFET-based TCAM is explored. The increase in the polarization of ferroelectric material leads to better performance; however, the coercive voltage should also be optimized. As a result, to improve the performance of a circuit using FeFETs, simulations using reliable compact models are required. The results of this study can provide directions for developing ferroelectric materials.


FIGURE 1. 3-D schematic of a nanowire type GAA MOSFET showing the generation of LFN due to the capture/emission of carriers in the channel. LG, tox, and R denote gate length, gate oxide thickness, and radius of the channel, respectively.
FIGURE 6. (a) Comparison of normalized current noise power spectral density (Sid) between the modeling results and measurement data showing the dependence on frequency (a) and VGS (b).
Bias Dependent Physics-Based Model of Low-Frequency Noise for Nanowire Type Gate-All-Around MOSFETs

December 2021

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12 Reads

Solid-State Electronics

In this study, the bias dependence of low-frequency noise (LFN) in nanowire type gate-all-around (GAA) MOSFETs was physically modeled. In the model, the inversion carrier density distribution was considered based on the potential in the channel that changes according to the bias. The developed model was verified with measurement data of the fabricated device. The model could help circuit designers to optimize noise performance in analog/RF applications when designing integrated circuits using nanowire-type GAA MOSFETs.


Surface-Potential-Based Analytical Model of Low-Frequency Noise for Planar-Type Tunnel Field-Effect Transistors

June 2021

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11 Reads

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4 Citations

IEEE Transactions on Electron Devices

Analytical models of low-frequency noise (LFN) characteristics for planar-type tunnel field-effect-transistors (TFETs) are proposed. A surface-potential-based current-voltage model is developed to physically represent the current fluctuation due to charge trapping/detrapping in the gate dielectric. An LFN model can be analytically derived from the current fluctuation with a reasonable approximation. The proposed model is verified using Technology Computer Aided Design (TCAD) and measurement data, which are in good agreement with each other. The analytical model can not only serve as a valuable reference and tool for low-power analog circuit design but also provide physical insights into the LFN of TFETs.


Physics-Based Compact Model of Transient Leakage Current Caused by Parasitic Bipolar Junction Transistor in Gate-All-Around MOSFETs

November 2019

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37 Reads

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1 Citation

Solid-State Electronics

In this study, transient leakage current caused by a parasitic bipolar junction transistor (BJT) in nanowire-type gate-all-around metal–oxide–semiconductor field-effect transistors is physically modeled for circuit design. The model considers the majority carrier concentration in the body, which is modulated by the gate-to-body bias. The parasitic BJT gain is dependent on the majority carrier concentration, which exceeds the body doping concentration in transient conditions. Three-dimensional technology computer-aided design simulation is performed to verify the model. The model accurately predicts the transient leakage current according to various structural parameters.


Fig. 2 (a) Energy band diagram along y-axis in Fig. 1(b) showing each current component arising from impact ionization of energetic particles. Excess holes accumulate in the body, which increases VBS. Electrons that are injected from the source owing to the lowered potential barrier constitute IBJT. EFn and EFp represent the quasi-Fermi energy of an electron and a hole, respectively. IhiS, IeiS and IeiD are the source hole-, source electron-, and drain electron-current by the impact ionization, respectively. IeS is the source electron-current, which is the summation of IeiS and IBJT. IeD is the drain electron-current, which is the summation of IeiD and IBJT. The actual direction of current components by electron is opposite to that shown. (b) Energy band diagram of body along x-axis at the source edge in Fig. 1(b). EC, EV, and Ei are the conduction band edge, valence band edge, and intrinsic energy, respectively. Ein is the intrinsic Fermi energy of a hypothetical, unbiased neutral body. ψ(x) is the potential at point x in the body referenced to Ein. ψo and ψs represent the center and surface potential, respectively.
Physics-Based Compact Model of Parasitic Bipolar Transistor for Single-Event Transients in FinFETs

January 2018

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40 Reads

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6 Citations

IEEE Transactions on Nuclear Science

A physics-based compact model of the parasitic bipolar current induced by an energetic particle is presented for single-event transients in FinFETs. The terminal charges are modeled to predict the body voltage of the FinFET in the transient correctly. The models are implemented using Verilog-A and are verified through three-dimensional technology computer-aided design (TCAD) simulations. The results of the modeling show good agreement with the TCAD data, for both structural variations and energy variations of the energetic particles.


Fig. 2 Potential distribution along x-axis of Fig. 1 for a different tox (a) and tSi (b): L = 30 nm and N a = 10 15 cm -3 . The gate-body voltage (VGB) is set to -1 V.
Fig. 3 Model prediction of I BJT versus VBS: L = 30 nm, Na = 10 15 cm -3 , tox = 1 nm, and tSi = 10 nm.
Fig. 4 Comparison of the I BJT (t) prediction between this model and the previous models in [9], [10] for a pass-gate circuit with low-doped FinFETs (L = 30 nm, Na = 10 15 cm -3
Fig. 5 (a) Predicted transient I BJT of the DG FinFETs for different values of L with t Si = 10 nm and t ox = 1 nm, (b) t ox variation with L = 30 nm and t Si = 10 nm, (c) t Si variation with L = 30 nm and t ox = 1 nm (c). V B (t) prediction of the model is also shown in (d), (e), and (f) for L, tox, and tSi variation, respectively.
Analytical Model of the Parasitic Bipolar Junction Transistor in Low-Doped Double-Gate FinFETs for Pass-Gate Circuits

August 2016

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16 Reads

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4 Citations

IEEE Transactions on Electron Devices

The transient parasitic bipolar effect in floating-body double-gate FinFETs with low-doped bodies is analytically modeled. The obtained analytical transient bipolar current and charge models have predictive power for various device structures. These models are applicable when the majority carrier concentration in accumulation conditions noticeably exceeds the body doping concentration. The physical insights obtained from the developed current model are used to analyze the transient bipolar current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BJT</sub> (t) for different device structures. It is shown that the gate-body-source capacitive coupling is an important parameter in I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">BJT</sub> (t) control.


Citations (4)


... [1] Compared with metal-oxide-semiconductor field-effect transistors, tunnel field-effect transistors (TFETs) have a lower power consumption that can significantly reduce the power loss of integrated circuits. [2] Although much research has been carried out on TFET devices in recent years, TFETs still have the problem of a low on-state current; this has become one of the key issues limiting the development of TFET devices. [3] In recent years, researchers have fabricated n-TFET devices with higher currents by optimizing TFET devices, [4][5][6] and their on-state currents can reach up to 10 −5 A·µm −1 . ...

Reference:

High On-state Current P-type Tunnel Effect Transistor Based on The Doping Modulation
Surface-Potential-Based Analytical Model of Low-Frequency Noise for Planar-Type Tunnel Field-Effect Transistors

IEEE Transactions on Electron Devices

... Based on the knowledge of semiconductor physics and microelectronics, the physical model solves the characteristic expression of power devices by conducting the finite element analysis (FEA) [9][10][11][12]. Figure 1 shows a simplified physical structure of Vertical Double-diffused MOSFET (VDMOSFET) considering the discrete package. There is an internal resistance due to the gate contact. ...

Physics-Based Compact Model of Transient Leakage Current Caused by Parasitic Bipolar Junction Transistor in Gate-All-Around MOSFETs

Solid-State Electronics

... The SPICE-level evaluation approach is widely used. Based on the SPICE device model and the netlist of the evaluated circuit, a separate current source is introduced directly at the sensitive node of the circuit to simulate the transient current caused by incident particles [23][24][25]. Then, it simulates the corresponding circuit response to obtain soft errors. ...

Physics-Based Compact Model of Parasitic Bipolar Transistor for Single-Event Transients in FinFETs

IEEE Transactions on Nuclear Science

... Given that GAA MOSFETs have a low-doped body [16], the majority carrier concentration in accumulation condition exceed the body doping concentration (Na) and is modulated by gate-to-body bias (VGB). We previously developed the physics-based model of dynamic leakage current due to the parasitic BJT for FinFETs [17] considering accumulation conditions. This model accurately predicts the transient leakage current for various device structures and bias conditions. ...

Analytical Model of the Parasitic Bipolar Junction Transistor in Low-Doped Double-Gate FinFETs for Pass-Gate Circuits

IEEE Transactions on Electron Devices