Blaise Gassend's research while affiliated with Massachusetts Institute of Technology and other places

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Publications (57)


Author retrospective AEGIS
  • Conference Paper

June 2014

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15 Reads

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4 Citations

G. Edward Suh

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Christopher Fletcher

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Dwaine Clarke

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[...]

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AEGIS is a single-chip secure processor that can be used to protect the integrity and confidentiality of an application program from both physical and software attacks. We briefly describe the history behind this architecture and its key features, discuss main observations and lessons from the project, and list limitations of AEGIS and how recent research addresses them.

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Authentication of integrated circuits
  • Patent
  • Full-text available

February 2013

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12 Reads

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4 Citations

A group of devices are fabricated based on a common design, each device having a corresponding plurality of measurable characteristics that is unique in the group to that device, each device having a measurement module for measuring the measurable characteristics. Authentication of one of the group of devices is enabled by selective measurement of one or more of the plurality of measurable characteristics of the device.

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CNT-based MEMS/NEMS gas ionizers for portable mass spectrometry applications

May 2012

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8 Reads

We report the fabrication and experimental characterization of a carbon nanotube (CNT)-based MEMS/NEMS electron impact gas ionizer with an integrated extractor gate for portable mass spectrometry. The ionizer achieves low-voltage ionization using sparse forests of plasma-enhanced chemical-vapor-deposited CNTs as field emitters and a proximal extractor grid with apertures aligned to the CNT forests to facilitate electron transmission. The extractor gate is integrated to the ionizer using a high-voltage MEMS packaging technology based on Si springs defined by deep reactive ion etching. The ionizer also includes a high-aspect-ratio silicon structure (??foam) that facilitates sparse CNT growth and also enables uniform current emission. The devices were tested as field emitters in high vacuum (10[superscript -8] torr) and as electron impact ionizers using argon at pressures of up to 21 mtorr. The experimental data show that the MEMS extractor gate transmits up to 66% of the emitted current and that the ionizers are able to produce up to 0.139 mA of ion current with up to 19% ionization efficiency while consuming 0.39 W.


Design and Fabrication of DRIE-Patterned Complex Needlelike Silicon Structures

May 2012

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23 Reads

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6 Citations

This paper reports the design and fabrication of high-aspect-ratio needlelike silicon structures that can have complex geometry. The structures are hundreds of micrometers tall with submicrometer-sharp protrusions, and they are fabricated using a series of passivated and unpassivated deep reactive-ion etching (DRIE) steps. A simple model is presented to predict the geometry of the structure based on the etch mask and the etch sequence. Model predictions are in good qualitative agreement with fabrication results, making it a useful design tool. The model is compared with literature reports on tapered DRIE.


Fig. 1. Geometry of a needlelike structure is generated by scaled shape functions resulting from the unpassivated DRIE steps and by straight sidewalls resulting from the passivated DRIE steps. 
Fig. 2. Etch mask with five straight edges (E1–E5) that has a concave boundary defined by straight edges E4 and E5, which meet at vertex V. The silicon below the mask is etched with an unpassivated DRIE step. The regions determined by the concave stretches of the boundary are shown, as well as the ridges that will result from the interaction of the different mask edges. The dotted lines delimit the area that is controlled by vertex V, the boundaries of which are parabolic. 
Fig. 3. 
Fig. 4. 
Fig. 5. (a) Sharp silicon tip formed when three etch fronts meet and (b) a bladelike tip formed when four etch fronts meet. 

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Design and Fabrication of DRIE-Patterned Complex Needlelike Silicon Structures

July 2010

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249 Reads

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28 Citations

Journal of Microelectromechanical Systems

This paper reports the design and fabrication of high-aspect-ratio needlelike silicon structures that can have complex geometry. The structures are hundreds of micrometers tall with submicrometer-sharp protrusions, and they are fabricated using a series of passivated and unpassivated deep reactive-ion etching (DRIE) steps. A simple model is presented to predict the geometry of the structure based on the etch mask and the etch sequence. Model predictions are in good qualitative agreement with fabrication results, making it a useful design tool. The model is compared with literature reports on tapered DRIE.


CNT-based MEMS/NEMS gas ionizers for portable mass spectrometry applications

July 2010

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198 Reads

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46 Citations

Journal of Microelectromechanical Systems

We report the fabrication and experimental characterization of a carbon nanotube (CNT)-based MEMS/NEMS electron impact gas ionizer with an integrated extractor gate for portable mass spectrometry. The ionizer achieves low-voltage ionization using sparse forests of plasma-enhanced chemical-vapor-deposited CNTs as field emitters and a proximal extractor grid with apertures aligned to the CNT forests to facilitate electron transmission. The extractor gate is integrated to the ionizer using a high-voltage MEMS packaging technology based on Si springs defined by deep reactive ion etching. The ionizer also includes a high-aspect-ratio silicon structure (??foam) that facilitates sparse CNT growth and also enables uniform current emission. The devices were tested as field emitters in high vacuum (10<sup>-8</sup> torr) and as electron impact ionizers using argon at pressures of up to 21 mtorr. The experimental data show that the MEMS extractor gate transmits up to 66% of the emitted current and that the ionizers are able to produce up to 0.139 mA of ion current with up to 19% ionization efficiency while consuming 0.39 W.


CNT-based gas ionizers with integrated MEMS gate for portable mass spectrometry applications

July 2009

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1,603 Reads

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3 Citations

We report the fabrication and experimental characterization of a novel low-cost carbon nanotube (CNT)-based electron impact ionizer (EII) with integrated gate for portable mass spectrometry applications. The device achieves low-voltage ionization using sparse forests of plasma-enhanced chemical vapor deposited (PECVD) CNTs field emitter tips, and a proximal gate with open apertures to facilitate electron transmission. The gate is integrated using a deep reactive ion etched (DRIE) spring-based high-voltage MEMS packaging technology. The device also includes a high aspect-ratio silicon structure (mufoam) that facilitates sparse CNT growth and limits the electron current per emitter. The devices were tested as field emitters in high vacuum (10<sup>-8</sup> Torr). Electron emission starts at a gate voltage of 110 V, and reaches a current of 9 uA at 250 V (2.25 mW) with more than 55% of the electrons transmitted through the gate apertures. The devices were also tested as electron impact ionizers using argon. The experimental data demonstrates that the CNT-EIIs can operate at mtorr-level pressures while delivering 60 nA of ion current at 250 V with about 1% ionization efficiency.


A Microfabricated Planar Electrospray Array Ionic Liquid Ion Source With Integrated Extractor

July 2009

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339 Reads

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62 Citations

Journal of Microelectromechanical Systems

This paper reports the design, fabrication, and experimental characterization of a fully microfabricated planar array of externally fed electrospray emitters that produces heavy molecular ions from the ionic liquids EMI-BF<sub>4</sub> and EMI-Im. The microelectromechanical systems (MEMS) electrospray array is composed of the following two microfabricated parts: 1) an emitter die with as many as 502 emitters in 1.13 cm<sup>2</sup> and 2) an extractor component that provides assembly alignment, electrical insulation, and a common bias voltage to the emitter array. The devices were created using Pyrex and silicon substrates, as well as microfabrication techniques such as deep reactive ion etching, low-temperature fusion bonding, and anodic bonding. The emitters are coated with black silicon, which acts as a wicking material for transporting the liquid to the emitter tips. The extractor electrode uses a 3-D MEMS packaging technology that allows hand assembly of the two components with micrometer-level precision. Experimental characterization of the MEMS electrospray array includes current-voltage characteristics, time-of-flight mass spectrometry, beam divergence, and imprints on a collector. The data show that with both ionic liquids and in both polarities, the electrospray array works in the pure ionic regime, emitting ions with as little as 500 V of bias voltage. The data suggest that the MEMS electrospray array ion source could be used in applications such as coating, printing, etching, and nanosatellite propulsion.


Precision In-Plane Hand Assembly of Bulk-Microfabricated Components for High-Voltage MEMS Arrays Applications

May 2009

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117 Reads

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18 Citations

Journal of Microelectromechanical Systems

This paper reports the design and experimental validation of an in-plane assembly method for centimeter-scale bulk-microfabricated components. The method uses mesoscaled deep-reactive-ion-etching (DRIE)-patterned cantilevers that deflect and lock into small v-shaped notches as a result of the hand-exerted rotation between the two components of the assembly. The assembly method is intended for MEMS arrays that necessitate a 3-D electrode structure because of their requirement for low leakage currents and high voltages. The advantages of the assembly method include the ability to decouple the process flow of the components, higher overall device yield, modularity, reassembly capability, and tolerance to differential thermal expansion. Both tapered and untapered cantilevers were studied. Modeling of the cantilever set shows that the springs provide low stiffness while the assembly process is in progress and high stiffness once the assembly is completed, which results in a robust assembly. In addition, analysis of the linearly tapered cantilever predicts that the optimal linearly tapered beam has a cantilever tip height equal to 37% of the cantilever base height, which results in more than a threefold increase in the clamping force for a given cantilever length and deflection, compared to the untapered case. The linear taper profile achieves 80% of the optimal nonlinear taper profile, which would be impractical to fabricate. Analysis of the experimental data reveals a biaxial assembly precision of 6.2-mum rms and a standard deviation of 0.6 mum for assembly repeatability. Electrical insulation was investigated using both thin-film coatings and insulating substrates. Leakage currents less than 1 nA at 2 kV were demonstrated. Finally, this paper provides selected experimental data of a gated MEMS electrospray array as an example of the application of the assembly method.


A Generalized Carpenter's Rule Theorem for Self-Touching Linkages

January 2009

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49 Reads

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6 Citations

The Carpenter's Rule Theorem states that any chain linkage in the plane can be folded continuously between any two configurations while preserving the bar lengths and without the bars crossing. However, this theorem applies only to strictly simple configurations, where bars intersect only at their common endpoints. We generalize the theorem to self-touching configurations, where bars can touch but not properly cross. At the heart of our proof is a new definition of self-touching configurations of planar linkages, based on an annotated configuration space and limits of nontouching configurations. We show that this definition is equivalent to the previously proposed definition of self-touching configurations, which is based on a combinatorial description of overlapping features. Using our new definition, we prove the generalized Carpenter's Rule Theorem using a topological argument. We believe that our topological methodology provides a powerful tool for manipulating many kinds of self-touching objects, such as 3D hinged assemblies of polygons and rigid origami. In particular, we show how to apply our methodology to extend to self-touching configurations universal reconfigurability results for open chains with slender polygonal adornments, and single-vertex rigid origami with convex cones. Comment: 20 pages, 7 figures


Citations (47)


... Legacy PUFs. [80] has proposed using the ICs' timing path signatures that are unique for each state-of-the-art CMOS chip (because of process variations) as a PUF. The work in [81,82] has shown that all ICs that are fabricated in new CMOS process nodes that contain nontrivial process variations have a unique signature that can be extracted using noninvasive methods by the structural side channel tests such as IDDT, IDDQ, or delay tests. ...

Reference:

Security Based on Physical Unclonability and Disorder
Authentication of integrated circuits

... However, the heavily occupied geosynchronous orbit increases the risk of collision [5], [11]. In addition, the tether should avoid areas involving the most intense radiation of the Van Allen belts [12], which is particularly important for the transportation of humans. In fact, nonequatorial space elevators, which have more flexibility in the selection of the anchor location, can help address the abovementioned problems. ...

Radiation hazards on a space elevator and ways of mitigating them
  • Citing Article
  • January 2004

... AM has unique advantages over traditional manufacturing methods including complex geometry compatibility, print customization, waste reduction, prototyping time reduction, and cost reduction [46]. In recent years, AM technology has been used to demonstrate miniaturized systems that outperform counterparts made in a cleanroom [47][48][49][50], including novel designs that are chal- lenging to construct with standard microfabrication methods [51,52], e.g. because they involve complex 3D shapes [53]. ...

Design and Fabrication of DRIE-Patterned Complex Needlelike Silicon Structures
  • Citing Article
  • May 2012

... Other suggestions include oblivious RAM (ORAM), which is a hardware structure that randomizes memory access to prevent eavesdroppers from discovering patterns in the memory access [7]. Secure processors, like ASCEND [8] and AEGIS [9], attempt to implement impenetrable security measures in hardware. ASCEND tries to block side-channel attacks by activating every hardware module on each clock cycle and accessing memory at regular intervals even if no access is pending. ...

Author retrospective AEGIS
  • Citing Conference Paper
  • June 2014

... The emitter die has up to 517 emitters in a 0.75 cm 2 area, formed using DRIE and SF 6 etching, and is plasma treated so that liquid can be transported to the tips in a porous black silicon surface layer. The extractor die incorporates the extractor electrode, a Pyrex layer for insulation, and the springs, which are used to reversibly clamp the emitter die [2]. This versatile assembly method allows the extractor die to be reused with multiple emitter dies and potentially with emitter concepts radically different from the one we have experimented with. ...

Mechanical Assembly of Electrospray Thruster Grid

... PUFs can be regarded as 'non-biological biometrics' in the sense that an identification/authentication string or secret key is derived from measuring an intrinsic property of an object. Many types of physical system for use as a PUF have been described in the literature, for instance three-dimensional multiple scattering of laser light [12], reflection of laser light from paper fibers [2], randomized dielectric properties in protective coatings on integrated circuits [17], radiofrequent responses from pieces of metal wire [4] or thin-film resonators [19], delay times in chip components [3] and start-up values of SRAM cells [7]. Even typed passphrases can be regarded as a non-uniform noisy source in view of possible typing mistakes. ...

Secure Hardware Processors using Silicon Physical One-Way Functions
  • Citing Article
  • January 2002

... In our threat model, attackers can reveal the data by snooping the memory bus and physically stealing the non-volatile DIMM. The data integrity attacks [48] are beyond the scope of our paper like existing works [12], [38], [49], [58], [61], [62], which can be defended via Merkle tree based designs [18], [23], [45], [50]. ...

Caches and merkle trees for efficient memory integrity veri cation
  • Citing Article
  • January 2003

... The basic LPAD construction authenticates each level by a standard ADS such as a Merkle tree. While this paper considers Merkle tree for construction, we stress that the LPAD is a paradigm that can work with other per-level ADS primitives (e.g., multi-set hash [28]). Concretely, GEN(1 n ) runs the standard public-key generation algorithm, and SETUP sk (m) signs the initial dataset m using secret key sk before the owner uploads the digest to the server. ...

Incremental Multiset Hashes and their Application to Integrity Checking
  • Citing Article
  • January 2003

... With conventional microprocessors, no specific defense mechanisms are provided to prevent foreign invaders such as viruses from attacking the system [8][9][10]. This could become a significant problem especially for real-time systems such as Internet of Things (IoT) and cyber-physical systems. ...

Caches and Merkle Trees for Efficient Memory Authentication
  • Citing Article
  • January 2003