Balkrishna Ramkumar's research while affiliated with University of Iowa and other places

It is argued that scheduling is an important determinant of performance for many parallel symbolic computations, in addition to the issues of dynamic load balancing and grain size control. We propose associating unbounded levels of priorities with tasks and messages as the mechanism of choice for specifying scheduling strategies. We demonstrate how priorities can be used in parallelizing computations in different search domains, and show how priorities can be implemented effectively in parallel systems. Priorities have been implemented in the Charm portable parallel programming system. Performance results on shared-memory machines with tens of processors and nonshared-memory machines with hundreds of processors are given. Open problems for prioritization in specific domains are given, which will constitute fertile area for future research in this field.

It is argued that scheduling is an important determinant of performance for many parallel symbolic computations, in addition to the issues of dynamic load balancing and grain size control. We propose associating unbounded levels of priorities with tasks and messages as the mechanism of choice for specifying scheduling strategies. We demonstrate how priorities can be used in parallelizing computations in different search domains, and show how priorities can be implemented effectively in parallel systems. Priorities have been implemented in the Charm portable parallel programming system. Performance results on shared-memory machines with tens of processors and nonshared-memory machines with hundreds of processors are given. Open problems for prioritization in specific domains are given, which will constitute fertile area for future research in this field.

Efficient task migration is an important feature in parallel and distributed programs, in particular to support checkpointing and recovery for fault tolerance. It is also very useful in distributed environments like networks of workstations where external loads are often unpredictable and dynamic in nature. We propose simple language extensions (ELMO) to existing sequential programming languages like C, Fortran or C++, that provide an object based task parallel execution model. Tasks may be dynamically created, are location transparent, and may be migrated or check pointed transparently by the system. ELMO's language features, together with the requisite compiler support is presented

Efficient task migration is an important feature in parallel and distributed programs, in particular to support checkpointing and recovery for fault tolerance. It is also very useful in distributed environments like networks of workstations where external loads are often unpredictable and dynamic in nature. We propose simple language extensions (ELMO) to existing sequential programming languages like C, Fortran or C++, that provide a object-based task-parallel execution model. Tasks may be dynamically created, are location transparent, and may be migrated or checkpointed transparently by the system. In this paper, ELMO's language features together with the requisite compiler support is presented. 1 Introduction Networks of workstations present some important problems that need to be addressed before they can be used effectively as a parallel computer. (a) Since local-area networks are not explicitly designed for parallel computing, such systems exhibit high communication latencies wh...

Current approaches for checkpointing assume system homogeneity, where checkpointing and recovery are both performed on the same processor architecture and operating system configuration. Sometimes it is desirable or necessary to recover a failed computation on a different processor architecture. For such situations checkpointing and recovery must be portable. In this paper, we argue that source-to-source compilation is an appropriate concept for this purpose. We describe the compilation techniques that we developed for the design of the c2ftc prototype. The c2fte compiler enables machine-independent checkpoints by automatic generation of checkpointing and recovery code. Sequential C programs are compiled into fault tolerant C programs, whose checkpoints can be migrated across heterogeneous networks, and restarted on binary incompatible architectures. Experimental results on several systems provide evidence that the performance penalty of portable checkpointing is negligible for realistic checkpointing frequencies

Current approaches for checkpointing assume system homogeneity, where checkpointing and recovery are both performed on the same processor architecture and operating system configuration. Sometimes it is desirable or necessary to recover a failed computation on a different processor architecture. For such situations checkpointing and recovery must be portable. In this paper, we argue that source-to-source compilation is an appropriate concept for this purpose. We describe the compilation techniques that we developed for the design of the c2ftc prototype. The c2ftc compiler enables machine-independent checkpoints by automatic generation of checkpointing and recovery code. Sequential C programs are compiled into fault tolerant C programs, whose checkpoints can be migrated across heterogeneous networks, and restarted on binary incompatible architectures. Experimental results on several systems provide evidence that the performance penalty of portable checkpointing is negligible for realistic checkpointing frequencies.

. Networks of workstations have become increasingly popular for high performance computing. However, in order to becomea real alternative for MPPs, reliability and efficiency issues must be tackled. In this paper, we identify the key challenges for very large workstation networks, and describe implementation techniques at system software level to overcome these problems. CROWN, a testbed for experimenting with these mechanisms is briefly discussed. 1 Introduction High Performance Computing (HPC) to date has been attempted via one of three primary approaches: Vector-supercomputers (e.g., Cray), Massively Parallel Processors (MPPs, such as the Intel Paragon), and Networks of Workstations (NOWs). Vector supercomputers are expensive and MPPs are not cost-effective and often considered difficult to program. NOWs suffer from high latencies and scheduling overhead that is endemic in time-shared environments. Figure 1 projects the growth of workstation performance over the next two decades an...

Parallel algorithms developed for CAD problems today suffer from two important drawbacks. First, they are machine specific, and tend to perform poorly on architectures other than the one for they were designed. Second, the quality of results degrades significantly during parallel execution. In this paper, we address these two problems for an important CAD application: test generation for sequential circuits, We have developed a new parallel test generator, ProperTEST, that is portable across a range of MIMD parallel architectures. This work is part of the ProperCAD project which aims to develop CAD algorithms that run unchanged on shared and nonshared memory machines. We present performance data for ProperTEST on ISCAS 89 sequential circuits on a Sequent Symmetry, an Intel i860 hypercube, an NCUBE/2 hypercube, a network of Sun workstations, and an Encore Multimax. Parallel processing can also be used to improve on the fault coverage possible on one processor in a given amount of time. This was not possible in earlier approaches due to search anomalies. Using ProperTEST, we provide results on ISCAS 89 benchmark programs demonstrating the improvements in fault coverage as the number of processors is increased

Networks of workstations have become increasingly popular for high performance computing. However, in order to become a real alternative for Massively Parallel Processors (MPPs), reliability and efficiency issues must be tackled. In this paper, we identify the key challenges for very large workstation networks, and describe implementation techniques at system software level to overcome these problems.

Parallel processing is fast becoming an attractive solution to reduce the computation time of CAD applications. Much of the work in parallel algorithms for CAD reported to date, however, suffers from a major limitation. The parallel algorithms proposed for the CAD applications are designed with a specific underlying parallel architecture in mind. We have developed a portable parallel algorithm based on the Transduction method [1], called ProperSYN. The same algorithm runs on a variety of parallel machines. Experimental results on various parallel machines are presented. 1 Introduction Combinational logic synthesis deals with the optimization of logic to realize a specific combinational function [2], [1]. Logic synthesis for large circuits have tremendous computing times and memory requirements. Parallel processing offers an attractive solution to this problem, hence researchers have started to investigate parallel algorithms for logic synthesis and verification [3] [4] [5]. Much of t...