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Vol.:(0123456789)
1 3
J. Inst. Eng. India Ser. B
https://doi.org/10.1007/s40031-022-00814-7
REVIEW PAPER
Comprehensive Study ofMOSFET Degradation inPower
Converters andPrognostic Failure Detection Using Physical
Model
PreethiSharmaKathribail1 · T.Vijayakumar1
Received: 2 September 2021 / Accepted: 20 September 2022
© The Institution of Engineers (India) 2022
electric consumption demand as they enable the conversion
of energy from one level to another. However, 60% of pro-
duced energy is wasted before reaching the end-user con-
sumption [1, 2]. This opens up never-ending opportunities
for the improvement of power converter design. A buck is
a power converter topology that is used in translating high
input DC to lower output DC. An inductor, capacitor, semi-
conductor switch, and diode are major components of a buck
converter. Design requirements like efficiency, form factor,
low cost, low harmonic distortion, etc. impose limitations on
buck converter design [3, 4]. In high-frequency applications,
power MOSFET switches are preferred over BJT switches
in buck design as their durability improves the service life
of systems [3]. So, a power MOSFET is used as high as 27%
in buck design [5].
Power MOSFETs are also vital electronic components
in many electronic devices like consumer electronics,
motor controllers, power converters, automotive electron-
ics, medical electronics, photovoltaic applications, radar,
and communication systems. Since MOSFETs are part of
power converters that are deployed in critical applications,
monitoring the health of power converters, in turn, MOS-
FETs is important considering the safety of systems and/or
their users [3]. Diagnosing the health of the power systems
permits early replacement of the component before system
failure. Safety–critical systems also demand fault tolerance
of the devices used. Fault tolerance is achieved either by
installing redundant systems in prior [4] and then regular
servicing or by having an efficient mechanism to predict the
Remaining Useful Life (RUL) of the devices [3].
The key contributors to power losses in a buck converter
are switching losses caused by MOSFET, inductor and gate
drive, conduction losses caused by copper trace, MOSFET
and inductor, static losses by control and feedback circuits
[6]. It is found that around 21% of power electronic system
Abstract Metal oxide semiconductor field effect transistor
(MOSFETs) are critical components of buck converters as
they contribute to performance, cost, size, and scaling of the
system. However, power MOSFET failure is a major reason
for buck converter failure. This appeals to study MOSFET
degradation and failure signatures. Here, a comprehensive
study of available literatures about MOSFET degradation is
carried out. ON resistance (Rdson) variation is identified as
the principal parameter varying due to degradation. Using
the physical model of the MOSFET, power dissipation and
hence junction temperature variation are calculated. Using
case temperature which is measurable, as a precursor of fail-
ure, a detector is designed to prognostically indicate buck
converter failure due to MOSFET degradation. The method
proposed is simple yet effective in enabling early detection
of MOSFET degradation.
Keywords Power MOSFET· DC-DC power converter·
Degradation· ON resistance· Junction temperature· Case
temperature· Prognostics· Physical model
Introduction
According to the international energy agency, world energy
demand increases by 1% per year till 2040 [1]. With this,
electricity consumption is expected to grow more than dou-
ble of overall energy consumption increase between 2000
and 2040. Power converters are required to meet the world’s
* Preethi Sharma Kathribail
ksharma.preethi@gmail.com
1 Department ofElectronics & Communication Engineering,
SJB Institute ofTechnology, Bengaluru, India
J. Inst. Eng. India Ser. B
1 3
failure is due to MOSFET failure which is the major cause
next to capacitor failure which is 30% [7, 8]. However, 31%
of power converter failure is due to the MOSFET or like-
wise semiconductor switch failure which is used in them [5].
MOSFET failure may occur due to over-voltage, over-cur-
rent, short circuit, aging, abnormal operating conditions, or
ambient reasons like overheating, overcooling, shock, vibra-
tion, fall, mounting abnormality, static electricity, the spray
of water, electron radiation [9], etc. When a MOSFET fails,
it may cause an increase in leakage, short or open circuit
of the device, increase in thermal resistance, Vth/hfe shift,
unstable operation, etc. causing irregularities in the opera-
tion of the system or fatal failure [10]. It is also demonstrated
that electrical parameters of the MOSFET vary in a dip and
rebound pattern with degradation [11].
Literature Survey
Different Types ofMOSFET Degradation
A MOSFET is bound by possible operating values for Vgs,
Vds, and Id. Also, there is a maximum power limit that cor-
responds to junction temperature. All of these define the
Safe Operating Area (SOA) of the MOSFET. The govern-
ing factors of maintaining the reliability of the system lies
in keeping the functionality of the system intact throughout
the projected lifetime. As MOSFET operates out of its SOA,
it is more prone to degradation and its aging degradation
is accelerated. Degradation of a MOS system could be in
physical terms or operational terms. Also, degradation could
be time-dependent or time-independent. Time-dependent
degradation is mainly due to the aging of the MOSFET
and practical effects are in terms of slower turn on/off of
the MOSFET, which eventually causes timing violations.
Aging also causes Bias Temperature Instability (BTI) and
hot carrier injection which affects carrier mobility and
threshold voltage shifts. Time-independent degradation is
caused by various noises (physical/electrical) and manufac-
turing variability. Due to manufacturing variability, differ-
ent MOSFETS with the same specifications might function
differently. Time-independent degradation may cause tem-
porary or permanent damage to the reliability of MOSFET.
Technology scaling has led to a steady increase of electric
field in the MOSFET which has also increased the degrada-
tion. MOSFET degradation causes failure of the system at all
possible levels. (Table1) gives information about MOSFET
failure at different levels [12].
MOSFET Degradation Modeling
In literature, many methods to model the MOSFET degrada-
tion are discussed. Few important models are exponential
degradation models [13, 14], knowledge-based models [15],
Table 1 Different degradation
levels and effects of degradation
in MOSFETs
Degradation levels Effects of degradation or failure mechanism
Physical level Bias Temperature Instability (BTI), Hot Carrier Injection
(HCI), Random Dopant Fluctuation (RDF), Random Tel-
egraph Noise (RTN), Process Variation (PV)
Device level Threshold voltage increase (Vth), Carrier mobility decrease
(μ), Gate -drain capacitance increase (Cgd), Subthreshold
slope degradation (SS)
Circuit level Altering the delay of gates, Efficiency reduction, Timing error
Architecture level Decreased Signal to Noise Ratio (SNR)
System level Increase in IC temperature, Reduced system reliability
Fig. 1 General steps involved in health monitoring of MOSFETs
J. Inst. Eng. India Ser. B
1 3
physical models [16], life expectancy models [17] and artifi-
cial neural networks-based models [18]. Health monitoring
of MOSFET could be done online or offline. In the online
method, the system will be functioning and in the offline
method, the system is either shut, faulty, or under servicing.
(Fig.1) shows general steps involved in health monitoring
of MOSFET. Any modeling method requires data that rep-
resents the behavior of MOSFET upon manufacturing and
while aging process. All significant parameters which might
get altered with age or due to functional environment are
identified. A test environment, experimental or/and simula-
tion is set up to evaluate varying parameters. From prac-
tically measured or analytically calculated parameters, the
precursor of failure is identified. Then, it is used to calculate
remaining useful life (RUL) or is compared with known end
of life (EoL) value to indicate the health status of MOSFET
about degradation.
Accelerated aging is one of the best ways to procure deg-
radation data. This method significantly reduces the time
required to get reliable data and thus speeds up prognos-
tic modeling. According to literature, mainly there are two
methods adopted for accelerated aging:
Temperature-based [19]: In this, a thermal block is cre-
ated to generate the required temperature to accelerate
the aging of electronic components used in the convert-
ers. This aging process leads to an increase of ON resist-
ance Rdson which eventually leads to bond wire cracking or
delamination.
Radiation-based: [20] In this, space radiations of two dif-
ferent dosages are applied. The lower value is 1krad/day and
the higher is 285krad/day. This test leads to a decrease in
threshold voltage and reduction of mobility due to interface
and trapped charges.
Different MOSFET Failure Detection Methods
The National Aeronautics and Space Administration
(NASA) has conducted Run to Failure (RtF) tests on power
MOSFETs using thermal overstress. Power cycling and hys-
teresis controller was used to cycle the MOSFETs between
high and low temperatures. Voltage, current, and transient
ratings were acquired. Similar experiments were conducted
on 42 different MOSFETs and a database is made avail-
able [21]. Several data-driven and model-based analyses of
MOSFETs were developed. In [19, 22–24] ON resistance
was identified as the precursor of failure and die-solder deg-
radation to MOSFET failure was analyzed and RUL was
calculated using Gaussian Process Regression (GPR) [24],
extended Kalman Filter [19]. In [25–27] threshold voltage
was considered as the precursor to failure. In [25] particle
filter along with an empirical model was used to calculate
the degradation of MOSFET. In [27] an exponential function
and then Kalman filter was used to estimate RUL. The shift
in threshold voltage was measured to identify gate struc-
ture degradation failure in [25, 26]. Modeling of the gate
structure of power MOSFETs under ion impurities was dealt
with in [28]. In [29, 30] varying slope of the gate signal was
studied to evaluate MOSFET degradation. In [31] varying
amplitudes of output signal nuclear frequencies and in [32]
change in the source oscillator signal frequency harmonics
were used to identify MOSFET degradation.
In [33–37] IGBT was used as a semiconductor switch
for degradation analysis. In [33], an empirical model with
a particle filter algorithm was used to identify failure pre-
cursor collector-emitter leakage current and to calculate
RUL, respectively. [38] proposed a reliable RUL calcula-
tion method for power MOSFETs by monitoring ON resist-
ance and using particle filter with roughening using Gauss-
ian jitter noise. Here, variation in the reliability for a varied
number of particles is also discussed. It is found out to be
highly reliable compared to only particle filter-based tech-
niques but at the same time requires higher computational
time. [39] described an improved method to calculate RUL
of MOSFET considering ON resistance as the precursor to
failure. Here, MOSFET degradation was modeled using the
continuous-time Markov model. Then continuous time (CT)
Sequential Importance Resampling (SIR) particle filter is
used to simulate ON resistance trajectory taking noise in the
measuring system into account. With this method, the error
in RUL estimation is as low as 5% for higher particle num-
bers. This method produced better results compared to the
Kalman filter and discrete-time (DT) sequential importance
sampling (SIS) Particle filter. In [34], collector-emitter volt-
age, [35] maximum peak ringing of collector-emitter, [36]
time during switching turn-off, and in [37], ringing during
switching were used as failure indicators in IGBT analysis,
while [40] dealt with analyzing the MOSFET negative bias
temperature instability (NBTI) due to aging.
[41] introduced a semi-empirical, model-based online
estimation of MOSFET ON resistance in a buck converter.
Here, using a microcontroller board, ON resistance is esti-
mated by measuring the voltage drop across the switch
and on current. It was found that relative error is < 2.6%.
[42] presents a data-driven method to predict the failure
of power MOSFETs used in power converters. Consid-
ering Rdson as a failure precursor, applying curve fitting
MOSFET degradation was expressed using a nonlinear
exponential degradation model. Then, the degradation
state of MOSFET is expressed using a strong track filter
[42]. In reference [43] a method to estimate the health
status of power converters was described by employing
spread spectrum time domain reflectometry (SSTDR). In
this, both IGBTs and MOSFETs were aged using thermal
and power stress in a controlled environment in an opera-
tional system. Then by applying SSTDR, damaged and
J. Inst. Eng. India Ser. B
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aged devices were identified. In [44] four different causes
for the failure of MOSFET are discussed stressing turn-
on of the parasitic BJT is the prominent cause of failure.
Using SiC MOSFET instead of MOSFET is also being
explored owing to its high reliability [45] describes a dif-
ferent aging study of SiC power MOSFETs. The aging
of the SiC MOSFET is promoted using electrical aspects
like transistor bias and increasing junction temperature.
Using drain-source leakage current and temperature at the
junctions, behavior of MOSFET in the aged conditions is
monitored. The study concluded that junction tempera-
ture increase is a dominant parameter indicating the aging
of SiC MOSFET. In [46] an online method to monitor
the SiC MOSFET degradation in real-time is proposed.
A readily available microcontroller with High Resolution
(HR) mode is used to capture the exact turn-on time of the
MOSFET which is the assumed precursor.
Modern techniques like Artificial Neural Networks
(ANN), Big Data, and Fuzzy Logic are also gaining pop-
ularity in MOSFET degradation modeling. In [47, 48] a
methodology is developed to calculate the RUL of the
MOSFET used in power supplies. Here, ON resistance
is considered as a key parameter, and the neural network
technique Echo State Network (ESN) is utilized to cal-
culate MOSFET degradation followed by the application
of Kalman filter to calculate RUL [47]. However, in [48],
three MOSFET datasets obtained from the accelerated
aging mechanism are considered, of which one is used
for training, and two are used for prediction. It is found
that with an optimal number of hidden neurons maximum
efficiency could be achieved. The prediction success rate
is very low with few neurons and performance deterio-
rates with a very high number of neurons. High relative
accuracy of around 85% is achieved in this method [3]
describes a hybrid method to calculate the RUL of MOS-
FET employed in technical systems. Here, data-driven
and the analytical MOSFET health prognostic framework
based on fuzzy logic are proposed. Using Takagi–Sugeno
models, an uncertainty interval indicating expected RUL
is available. The proposed approach was validated with the
help of real MOSFET data procured from the NASA prog-
nostic repository. In [49] a technique using Big Data archi-
tecture to evaluate MOSFET degradation and application
of the least-squares method to calculate RUL is proposed.
Methodology
Many works of literature have explored how MOSFET
parameters vary when they are degraded. From the litera-
ture survey, it is evident that the Rdson and Vgsth are the major
parameters of the MOSFET that vary with degradation. In
reference [23, 24] accelerated aging was conducted on MOS-
FETs using thermal and power cycling aided degradation.
The process was repeated 35 times and it was found that
MOSFET was degraded after 220min of aging. Whenever a
MOSFET degrades the signature of characteristics degrada-
tion remains similar. (Fig.2) depicts signature of MOSFET
ON resistance variation with aging. In (Fig.2), Rdson(int) indi-
cates the initial ON resistance, and Rdson(EoL) indicates the
ON resistance at End of Life. A threshold of 25% increase
in ON resistance can be assumed for a fair EoL ON resist-
ance value [24].
In a Buck converter, as the ON resistance of MOSFET
increases with degradation, the conduction loss which is
proportional to the ON resistance also increases. The rela-
tionship between MOSFET ON resistance and conduction
losses is given by Eq.(1).
where Ploss(con) is the conduction loss, Rdson is ON resistance
and IdRMS is the RMS value of drain current.
An increase in the conduction loss increases the power
dissipation, which in turn increases the junction temperature
of the MOSFET. The junction temperature of MOSFET is
directly proportional to the power dissipation and is given
in Eq.(2).
where RƟja is the thermal impedance between junction and
ambient.
Thus, by measuring the increase in the junction tempera-
ture of the MOSFET in a buck converter, the ON resist-
ance increase and in turn MOSFET degradation can be
monitored. Unfortunately, the measurement of the junction
(1)
Ploss(con)
=R
dson
I
2
dRMS
(2)
Tjunction =Tamb + (Powerdissipation ∗ Rθja )
Fig. 2 Signature of MOSFET on resistance variation with time
J. Inst. Eng. India Ser. B
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temperature of a semiconductor device is not feasible. How-
ever, the case temperature of the device which is directly
proportional to the junction temperature can be measured
easily with the help of temperature sensors. This measure-
ment is easy, as the temperature sensors can be mounted
very close to the case of the MOSFET. Hence, the error
in temperature measurement is very low. The relationship
between junction temperature and case temperature is given
by Eq.(3). The thermal impedance between case and junc-
tion Rθjc is normally given in the datasheet of the MOSFET.
Hence, increase in the case temperature of the MOSFET due
to degradation can easily be estimated.
Thus, the simple way to detect the degradation of a
MOSFET is to monitor its case temperature. When the
case temperature exceeds a predefined value, which corre-
sponds to Rdson(EoL), the health of the MOSFET is indicated
(3)
Tcase =
T
junction − (Powerdissipation ∗
R
θjc)
Fig. 3 Block diagram of MOS-
FET aging detector in a buck
converter using LM5085
Table 2 Variation of MOSFET junction temperature with aging using physical modeling
Serial
number
MOSFET Rdson(EoL)Ω Rθjc (°C/W) Rθja (°C/W) Initial junction tem-
perature (Tj) (°C)
Tj(Rdson(EoL))
(°C)
Increase in junction
temperature (°C)
1 CSD25402Q3A [57] 1.00E-03 2.3 55 89.35 97.05 7.7
2 IXTT8P50 [58] 1.5 0.7 45 115.45 121.3 5.85
3 SiHFI9634G [59] 1.25 3.6 65 113.4 123.8 10.4
4 IRFR9214 [60] 3 2.5 30 105.7 121.3 15.6
Table 3 Variation of junction temperature, case temperature and detector output with ON resistance of MOSFET SiHF19634G. Here change in
the detector output as set threshold reaches can be noticed
RdsonΩ Pds(RMS) W Rθja (°C/W) Junction
temperature
(Tj) (°C)
Rθca (°C/W) Case tem-
perature (Tc)
(°C)
Thermistor
output voltage
(Expected)V
Thermistor
output (Simu-
lated) V
Reference
output (Vref)
V
Detec-
tor output
(Vdet) V
1 1.36 65 113.4 61.4 108.50 0.54 0.53 0.48 0.05
1.05 1.41 65 116.65 61.4 111.57 0.52 0.51 0.48 0.05
1.1 1.44 65 118.6 61.4 113.42 0.51 0.50 0.48 0.05
1.15 1.45 65 119.25 61.4 114.03 0.51 0.50 0.48 0.05
1.2 1.48 65 121.2 61.4 115.87 0.50 0.49 0.48 0.05
1.25 1.52 65 123.8 61.4 118.33 0.49 0.48 0.48 3.25
1.3 1.52 65 123.8 61.4 118.33 0.49 0.48 0.48 3.25
1.35 1.55 65 125.75 61.4 120.17 0.48 0.47 0.48 3.25
1.4 1.58 65 127.7 61.4 122.01 0.47 0.45 0.48 3.25
1.45 1.59 65 128.35 61.4 122.63 0.46 0.45 0.48 3.25
1.5 1.61 65 129.65 61.4 123.85 0.46 0.45 0.48 3.25
J. Inst. Eng. India Ser. B
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as degraded. This helps in the early detection of MOSFET
failure and prevents failure of the buck converter.
With the advance in technology, the case temperature
of the MOSFET can be easily monitored with the help of
off-the-shelf temperature monitor ICs. These ICs are cost-
effective and accurate in indicating the temperature. A
comparator circuit is used to detect the increase in junction
temperature and hence the degradation of the MOSFET.
The block diagram of the proposed method is as shown in
(Fig.3). The proposed method uses a simple electronic cir-
cuit, occupies less space, consumes very low power, and is
also cost-effective.
Results andDiscussion
A buck converter is designed using off-the-shelf Buck con-
troller LM5085 [50, 51, 53] from Texas Instruments to ana-
lyze the proposed method. The buck converter is designed
to step down 12V to 3.3V with an output current of 1A.
The switching frequency of the buck converter is selected
as 100kHz.
TI-TINA simulation tool from Texas Instruments is used
to carry out the spice simulation. Spice simulations consider
parasitic elements of the components used. In addition, the
circuit parasitic elements can also be incorporated in the
spice simulations. Hence, the results obtained match closely
with that of a practical circuit.
For the MOSFET used in buck converter design, the
spice model is constructed considering all the parameters
mentioned in the datasheet [54–56]. This is equivalent to
Fig. 4 Junction temperature
variation with change in Rdson of
MOSFET due to aging
Fig. 5 Detector response to the
temperature sensor output
J. Inst. Eng. India Ser. B
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the physical modeling of MOSFET [16]. Spice simula-
tion is carried out to measure the power dissipation in the
MOSFETs. Using these power dissipation values, the junc-
tion temperature of MOSFET is calculated with the help of
Eq.(2).
The spice model of the MOSFET is later updated with
25% increase in Rdson. This updated spice model then rep-
resents degraded MOSFET [24]. The spice simulations are
carried out with the degraded MOSFET and its junction
temperature is calculated. (Table2) is constructed to display
the findings. In (Table2), Rdson(EoL)Ω represents the ON
resistance of the MOSFET at assumed End of Life with 25%
increase (Fig.2). Rθjc is the thermal impedance from junc-
tion to case of the component. Rθja is the thermal imped-
ance from junction to ambient of the component. The param-
eters were adapted from the manufacturer datasheets. In this
analysis, sufficient heatsink is considered to limit the tem-
perature of the MOSFET to a safe value. Hence, additional
cooling mechanisms like fan is not required. Also, addition
of cooing mechanism only decreases the thermal impedance
and hence raise in case temperature. But it will not stop
increase in case temperature with aging. Tj(Rdson(EoL))
denotes the junction temperature at MOSFET degraded
condition which is calculated using Eq.(2). The increase
in power dissipation and junction temperature values due to
MOSFET degradation are obtained for 4 different industrial
grade MOSFETs [57–60] to validate the proposed method.
From simulation results, it is found that power dissipation
and junction temperature increase as the ON resistance of
MOSFET increases due to aging. The increase in the junc-
tion temperature of MOSFET SiHF19634G used in buck
converter designed using LM5085 is analyzed further in
detail. (Table3) lists the variation of junction temperature
with ON resistance of MOSFET SiHF19634G used in buck
converter design. Here, Rθja is the thermal impedance from
junction to ambient of the MOSFET. Rθca is the thermal
impedance from case to ambient of the MOSFET in dis-
cussion. Pds(RMS) is the Root Mean Square (RMS) power
dissipated across the drain and source terminal of the MOS-
FET which is measured using Eq.(1). Junction temperature
(Tj) is calculated using Eq.(2). It is found that the junction
temperature increases almost linearly with ON resistance
increase. (Fig.4) depicts the junction temperature variation
with ON resistance. It is found that when ON resistance
increases by 25% from the initial value depicting degrada-
tion, the junction temperature increases by 10.4°C which is
9.17% increase from the initial value.
Indicating the degradation of MOSFET is equally impor-
tant in critical applications of the buck converter. Though
junction temperature indicates the MOSFET degradation it
cannot be measured directly. So, variations in the case tem-
perature of the MOSFET are used as the precursor. From
Eq.(3), case temperature varies proportionally with junction
Fig. 6 Comprehensive representation of variation of power dissi-
pation, junction & case temperatures, thermistor & detector outputs
with on resistance variation of MOSFET in a buck converter
J. Inst. Eng. India Ser. B
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Table 4 Comparison of different MOSFET degradation analysis methods
Reference number Switching device used Major parameter varying Measuring method Complexity Method of modeling RUL method Estimation method
[23] Power MOSFET Rdson Experimental evaluation
using accelerated aging
** Life expectancy model Particle filter Online
[25] Power MOSFET Vth Experimental evaluation
using aging acceleration
** Exponential Particle filter Online
[24] Power MOSFET Rdson Experimental aging accel-
eration and Gaussian
progression to calculate
RUL
*** Physical model Gaussian progression offline
[19] Power MOSFET Rdson Accelerated aging experi-
ments and RUL modeling
using Bayesian tracking
and extended Kalman
filter
*** Life expectancy model
(Stochastic model)
Extended Kalman Filter Online
[32] Power MOSFET Rdson Source oscillator frequency
harmonics
*** Physical model NA Online
[31] Power MOSFET Cumulative characteristics Amplitude at Second order
output signal frequency
*** Physical model Least squares method Online
[52] Power MOSFET Rdson An online condition
monitoring is proposed
by applying accelerated
aging on ECG of fluo-
rescent lamp and data is
acquired using LabView
tool
** Physical model NA Online
[63] Power MOSFET Rdson Transient response signal ** Physical model NA offline
[42] Power MOSFET Rdson MOSFET degradation is
expressed as exponential
degradation model using
curve fitting, strong track
filtering is used to predict
the level of degradation
** exponential NA offline
[27] Power MOSFET Vth Customized experimental
aging is carried out,
exponential function and
Kalman filter are used to
model RUL
** Exponential Kalman Filter offline
[39] Power MOSFET Rdson MOSFET degradation is
modeled using continu-
ous time Markov func-
tion. Then continuous
time sequential impor-
tance resampling particle
filter is used to simulate
on resistance trajectory
*** Life expectancy model
(Stochastic model)
Continuous time sequential
importance resampling
particle filter
Continuous Time
J. Inst. Eng. India Ser. B
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Table 4 (continued)
Reference number Switching device used Major parameter varying Measuring method Complexity Method of modeling RUL method Estimation method
[46] SiC MOSFET Turn-on time An online method to moni-
tor real time degradation
is proposed. High Reso-
lution capture mode in a
microcontroller is used to
capture the exact turn-on
time of MOSFET
*** Physical Model NA Realtime
[38] Power MOSFET Rdson RUL of MOSFET is
calculated using particle
filter with Gaussian jitter
roughening
*** Life expectancy Model Roughening Particle filter
with Gaussian Jitter
offline
[29, 30] SiC MOSFET Rg (Switching time) Variation in turn on charac-
teristics of MOSFET due
to degradation is ana-
lyzed, whether MOSFET
is moving toward open
or short circuit fault is
identified
*** Physical Model NA offline
[62] Power MOSFET Rdson A data driven prognostic
method using Machine
learning model is devel-
oped and NASA prognos-
tic lab procured data is
used to calculate time to
failure using state space
technique
*** Machine Learning Model State Space Modeling offline
[47] Power MOSFET Rdson Neural Echo State Network
(ESN) and Particle filter
*** Artificial Neural Networks Particle Filter Online
[41] Power MOSFET Rdson On resistance is estimated
by measuring on current
and voltage across the
MOSFET switch
** Physical Model NA Online
[49] Power MOSFET Rdson Big data architecture to
evaluate degradation
and application of least
squares method to calcu-
late RUL
** Big Data Least Squares Method offline
[48] Power MOSFET Rdson Artificial Neural network
based in which 1 dataset
used for traininig, 2 data-
sets for RUL prediction
*** Artificial Neural Networks Artificial Neural Networks offline
J. Inst. Eng. India Ser. B
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temperature. Case temperature (Tc) variation of the buck
converter designed is calculated using Eq.(3) and is listed
in (Table3). From (Table3) itcan find that when ON resist-
ance increases by 25%, the case temperature increases by
10°C. Hence, here the MOSFET is considered degraded,
when its case temperature increases by about 10°C. Thus,
a 10°C rise in case temperature is set as the threshold value
(relevant row is highlighted in Table3) to indicate degrada-
tion in detector circuit of (Fig.3).
A temperature sensor circuit is designed to measure the
case temperature of the MOSFET SiHF19634G. LMT70
temperature sensor by Texas Instruments is employed
in detector design as it has a very good sensitivity of
− 5.19mV/°C temperature rise [61]. Temperature sensor
output is compared with known threshold using Op-Amp
based comparator. With this, the comparator output indi-
cates the health of MOSFET used in the buck converter.
(Table3) lists the output of the detector design. Here, ther-
mistor output voltage (expected) indicates the ideal voltage
output level for the particular case temperature value calcu-
lated from manufacturer provided characteristics of LMT70.
Thermistor output (simulated) represents the measured
voltage level at the output of Thermistor. Reference output
(Vref) corresponds to voltage level equivalent to predefined
threshold temperature. Detector Output (Vdet) is the designed
comparator output which shifts as thermistor output reaches
threshold voltage level.
(Fig.5) depicts the detector response to the temperature
sensor output. It can be seen from (Fig.5) that the detector
circuit and hence the proposed method detects MOSFET
degradation effectively. (Fig.6) gives a comprehensive rep-
resentation of variation of power dissipation, junction &
case temperatures, thermistor & detector outputs with ON
resistance variation of MOSFET in a buck converter.
Conclusion
This paper provides an overview of different techniques that
are utilized/proposed for the estimation of MOSFET degra-
dation which is used in power supplies. It also details vari-
ous approaches to model the Remaining Useful Life (RUL)
of the degraded MOSFETs. (Table4) lists various methods
and their features available in the literature about MOSFET
degradation analysis. Based on the literature study following
key points are observed:
• ON resistance of MOSFET is the most commonly used
precursor.
Table 4 (continued)
Reference number Switching device used Major parameter varying Measuring method Complexity Method of modeling RUL method Estimation method
[3] Power MOSFET Rdson Takagi–Sugeno based
hybrid model to calculate
RUL of MOSFETs
** Fusion of Exponential
(Analytical) and Histori-
cal (Data driven)
Takagi–Sugeno + Expo-
nential
offline
Proposed Method Power MOSFET Rdson An approach where
physical parameters of
MOSFET are modified to
simulate the temperature
variation as MOSFET
degrades
* Physical Model NA Online
J. Inst. Eng. India Ser. B
1 3
• Data collected by the Prognostic Health Center of NASA
is extensively utilized in the analysis and development of
algorithms.
• Measuring techniques are swiftly moving from offline
methods to online methods in which devices are charac-
terized when they are deployed and the device is running.
• Different models using advanced techniques like neural
networks, big data are being proposed.
• From the practical experiments on the aging of MOS-
FETs which are conducted earlier, it is reported that
theoretical calculations differ from real-time aging tests.
However, the signature of variation does not change from
theory to implementation.
• If new techniques without any complex additional hard-
ware requirements are proposed, they will be valued.
Utilizing the literature survey, a new technique that is
very simple yet effective to prognostically detect MOSFET
degradation is proposed. Here physical modeling is applied
knowing operating and built-in parameters of MOSFET.
Signatures of MOSFET degradation and failure are studied
and are analyzed for 4 different MOSFETs in a buck con-
verter. Then, a minimalistic yet affective detector is designed
which indicates the MOSFET failure at a predefined and set
threshold assisting prognostic detection of a MOSFET fail-
ure. Future work can extend the proposed technique to other
converter topologies like boost, buck-boost topologies. Also,
a physical modeling-based approach to study the signature of
gate resistance (RG), turn-on (VGS) characteristics of MOS-
FET upon degradation will bring new insights into the topic.
Acknowledgements The authorswould like to thank, SJBIT, Ben-
galuru, India for the opportunity to carry out this work. The authors
are also grateful to the contribution of M/sRobert Bosch Engineering
services India, M/sRenesas Electronics Europe GmBH and M/sCon-
tinental Automotive Components Pvt Ltd.
Funding The authors have not disclosed any funding.
Declarations
Conflict of interest The authors have not disclosed any competing
interests.
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