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A High-Speed Complementary Current-Mode Gm-C Filter
Abstract
This paper presents a complementary current-mode 2nd order Gm-C filter for 5G and other broadband applications. The filter structure is based on 2 complementary differential pairs in order to achieve both low noise and high frequency performances. A bandwidth of higher than 1GHz is achieved with a gain of 0dB and an in-band IIP3 of 29dBm, consuming less than 27mW from a 1.8V supply. The filter is fabricated in a 65nm CMOS process with a core circuit area of 0.1mm × 0.08mm.
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It is presented a method to design Current-Mode (CM) filters from the transformation of the well-known Voltage-Mode (VM) opamp-RC filters. First, it is shown the simulation of a low-frequency opamp-RC filter with stable high Q, by applying the Y-Delta transformation. Second, it is described the transformation of the VM opamp-RC filter to a VM Gm-C filter and the symbolic transfer functions of the VM Gm-C filter are derived. Third, it is shown the transformation of the VM Gm-C filter to a CM Gm-C filter and the symbolic transfer functions of the CM filter are derived to show that both, the VM and the CM Gm-C filters perform the same behavior. Finally, some guidelines are introduced to design CM filters with CMOS OTAs and current conveyors.
A third-order channel selection filter for multi-mode direct-conversion receivers is presented. The filter is designed with a Butterworth prototype and with the target wireless applications of Bluetooth, cdma2000, wideband CDMA, and IEEE 802.11a/b/g/n wireless LANs. Linear-region MOS transistors are used to perform voltage-to-current conversion. The wide tuning range is achieved by the current multipliers and linear voltage-to-current converters. Implemented in the TSMC 0.18 mum CMOS process, the measurement results show that the filter can operate successfully over a cutoff frequency range of 500 kHz to 20 MHz, and is compliant with the requirements of different wireless applications. The power consumption is 4.1 mW to 11.1 mW for minimum and maximum cutoff frequencies respectively from a 1.2 V supply voltage. The circuit performance compares favorably with previously reported works.
A novel class of filters (called pipe filters) that features in-band noise reduction is presented and a current mode biquad cell based on cross-connected cascoded devices is introduced. The presented solution gives in-band high-pass noise shaping and passive pre-filtering of out-of-band blockers. This results in both low in-band noise and high out-of-band IIP3. A 4th-order lowpass prototype in 90 nm CMOS for WCDMA application features 32 μW in-band noise (when integrated over the 2 MHz bandwidth as defined by the standard) and +36 dBm out-of-band IIP3 which results in a 75 dB SFDR with 1.25 mW power consumption. Active die area is 0.5 mm<sup>2</sup>.
This paper presents a fully differential dual-ended
ultralow-voltage (ULV) FGUVMOS operational transconductance amplifier
(FGUVMOS-OTA), and a Gm-C filter where the FGUVMOS-OTA is used. The OTA
has no internal nodes, rail-to-rail operation and dynamic load. The
cut-off frequency of the Gm-C filter is tunable over more than 5
decades. The circuits may be operated with supply voltages down to 200
mV
A full CMOS seventh-order linear phase filter based on g<sub>m</sub>-C biquads with a -3-dB frequency of 200 MHz is realized in 0.35-μm CMOS process. The linear operational transconductance amplifier is based on complementary differential pairs in order to achieve both low-distortion figures and high-frequency operation. The common-mode feedback (CMFB) employed takes advantage of the filter architecture; incorporating the load capacitors into the CMFB loop improves further its phase margin. A very simple automatic tuning system corrects the filter deviations due to process parameter tolerances and temperature variations. The group delay ripple is less than 5% for frequencies up to 300 MHz, while the power consumption is 60 mW. The third-harmonic distortion is less than -44 dB for input signals up to 500 mV<sub>pp</sub>. The filter active area is only 900 × 200 μm<sup>2</sup>. The supply voltages used are ±1.5 V.
The design of a mixer-first wideband receiver with RF bandwidth of 260 MHz suitable for 5G applications below 6 GHz is presented. The transimpedance amplifier immediately following the passive mixer is based on a low-power modified regulated cascode with enhanced selectivity, instead of a conventional shunt-feedback architecture. At the mixer output, thanks to a positive feedback capacitance multiplication, a third-order low-pass filtering in the current domain is performed. A simplified non-linear model is used to demonstrate that, thanks to the improved selectivity, linearity close to the band edge is highly improved. Wide bandwidth, high linearity, and low power are thus achieved. Measurements on a 28-nm CMOS chip prototype show alternate channel IIP3, IIP2, and P1 dB of +22, +70, and +3 dBm, respectively. Receiver (RX) noise figure (NF) is 5.5 dB, while power consumption is 21.6 mW (in the signal path) and 7.8 mW/GHz (for local oscillator (LO) generation) with 1.8-/1.2-V supply.
60GHz wireless communication requires analog baseband circuits having a bandwidth of about 1GHz. This paper presents a wide bandwidth current-mode low pass filter technique which involves current amplifiers, resistors and capacitors. The proposed current-mode filter is obtained by replacing an integrator employing an op-amp with another integrator employing a current amplifier. With the low input impedance current amplifier having little variation of the input impedance, the proposed filter is expected to improve linearity and power efficiency. The proposed current amplifier which employs super source follower topology with complementary input is suitable for the filter because of its class AB operation. Although simulation results shows the conventional current amplifier which employs super source follower topology without the complementary input has 12Ω variation and 30Ω input impedance, the proposed current amplifier has 1Ω variation and 21Ω input impedance. A fourth order 1GHz bandwidth filter which involves the proposed current amplifiers is designed in a 65nm CMOS technology. The filter can achieve IIP3 of 1.3dBV and noise of 0.6mVrms with power consumption of 13mW under supply voltage of 1.2V according to simulation results with layout parasitic extraction models. Active area of the filter is 380μm×170μm.
A method to design low-power low-area active RC filters is presented. The output voltages of the operational amplifiers are scaled and buffered, allowing the use of single stage topologies for less power consumption and eliminating the compensation capacitor. Tuning of the filter characteristic is also done by switching the currents through the output buffers, which removes the need for capacitor banks. The advantages of the proposed method are incorporated to present a general low-power biquad with small die area. The biquad section is then used to design a low-power baseband filter for Bluetooth receivers with 600-KHz cutoff frequency. The fourth-order filter, fabricated in a 0.18-μm CMOS process, consumes 0.5 mW with a die area of 0.13 mm
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A 5th order gm-C filter complete with calibration circuits with wide tuning range and cut-off frequency up to the GHz range is presented. To simplify calibrations, integrators are designed to have a relatively low static gain of 32dB, regulated with negative resistors. Transconductance and gain are continuously controlled with a master-slave approach leading to a remarkably stable filter shape and cut-off frequency accuracy within ±3% over a 0°-100° temperature range and ±5% supply variation. A test-chip has been realized in a 28nm Low Power CMOS technology. The cut-off frequency is tunable from 220MHz to 3.3GHz with power dissipation scaling from 5mW to 30mW. THD is -40dB at -24dBV input signal while the integrated input equivalent noise is lower than 400μVrms, corresponding to an SNR better than 39dB.
A CMOS 80-400 MHz fifth order Chebyshev Gm-C low pass filter with a unique auto tuning system is presented. Both Gm and C are tuned digitally leading to a 5X tuning range. A digital magnitude-locked loop liked tuning system is proposed. The tuning system uses a digital calibration scheme, broadening the tuning range dramatically. A fifth order Chebyshev Gm-C filter with the proposed auto tuning system was designed with TSMC 0.13 mu m RF CMOS process for verification. Measurement results show that the cut-off frequency of the filter can be tuned between 80-400 MHz, with an average tuning error of no larger than 3.6%. The dynamic range of the filter for THD less than 1% is 60 dB. The power dissipation is only 5.5mW with 1.2V supply voltage.
This paper presents an analog baseband beamforming topology, which combines phase shifting, signal combination, and biquadratic lowpass filtering in one block. This reduces the number of stages cascaded in a receiver chain, leading to a shorter signal path, thus improving the dynamic range. Flexibility of the proposed solution is illustrated with different possible implementations depending on the top-level chip floorplan. It is shown that the proposed structure does not introduce extra power consumption compared to the conventional approach, while obtaining a higher SNR. A four-antenna-path version of the proposed topology is implemented in 40 nm low-power CMOS as a prototype together with a variable gain block forming a complete analog baseband section for a phased-array receiver. The functionality includes beamforming with a resolution better than 6.8 degrees, fourth-order lowpass filtering with a 1 GHz cutoff frequency, variable gain between 10.6 and 30 dB and automatic DC offset compensation. Output IP3 above 10 dBm and output noise below 4.2 mVrms over the whole gain range yield an SFDR larger than 31.2 dB, which is sufficient for 16-QAM modulation according to IEEE 802.11ad. The circuit consumes between 30 and 42 mW.
A novel large input range source-follower based filter architecture is proposed offering a increased 1-dB compression point, without increased power consumption. An alternative feedback mechanism enables single-ended use and simplifies the bias scheme. Simulation has confirmed a 250 MHz second order filter stage consuming 40 uA @ 1.2V supply in a 0.13 um CMOS technology with 1-dB compression point at a differential peak to peak input amplitude of 1.4V, more than doubling the input range of previous implementations with similar power dissipation.
A low-power analog baseband section suitable for 60-GHz receivers using orthogonal frequency-division multiplexing (OFDM) with 16 quadrature amplitude modulation (16-QAM) modulation is presented in this paper. Power efficiency is achieved by combining active-RC with source-follower-based topologies in order to synthesize a custom sixth-order transfer function. The complete chain consists of the cascade of a first-order transimpedance amplifier with finely programmable gain, a fourth-order source-follower-based filter, and a coarse gain first-order programmable gain amplifier. The prototype is implemented in 90-nm CMOS. It achieves a 1-GHz cutoff frequency and programmable gain from 0 to 20 dB with 1-dB step control, drawing 9.5 mA (0–9 dB gain range) or 10.8 mA (10–20 dB gain range) from a 1-V supply. An 8.2-dBm third-order input intercept point and a $-$145-dBm/Hz input-referred noise power density are measured at 0- and 20-dB gain, respectively. The entire circuit occupies an area of $hbox{400 }times hbox{ 390} muhbox{m}^{2}$.
A 4th-order programmable continuous-time filter (CTF) for
hard-disk-drive (HDD) read channels was developed with 65-nm CMOS
process technology. The CTF cutoff frequency and boost are programmable
by switching units of the operational trans-conductance amplifier (OTA)
banks and the capacitor banks. The switches are operated by lifted
local-supply voltage to reduce on-resistance of the transistors. The CTF
characteristics were robust against process technology variations and
supply voltage and temperature ranges due to the introduction of a
digitally assisted compensation scheme with analog auto-tuning circuits
and digital calibration sequences. The digital calibration sequences,
which fit into the operation sequence of the HDD read channel,
compensate for the tuning circuits of the process technology variations,
and the tuning circuits compensate for the CTF characteristics over the
supply voltage and temperature ranges. As a result, the CTF had a
programmability of 100-1000-MHz cutoff frequency and 0-12-dB boost.
As of today, the highest cut-off frequency low-pass continuous-time analog filters are in the frequency band of 1 to 3GHz [2,4–6], targeting applications like UWB communications or hard disk drives. Nevertheless, bands much higher, of about 10GHz, are to be addressed in the near future. This paper demonstrates an active low-pass filter tunable from 1 to 10GHz in 65nm CMOS, which is to our knowledge the highest ever cutoff frequency reported.
This paper reviews the measurement and modeling issues of the channel thermal noise in MOSFETs as a result of the aggressive reduction of the channel length into the sub-100 nm regimes. It also shows the noise performance of devices in 65 nm CMOS technology.
In this paper we report a 3rd-order Gm-C filter based on pseudo-differential continuous-time transconductors for applications in low-voltage systems over VHF range. By using a 0.18 μm pure digital CMOS process, a prototype low pass filter with -3 dB frequency programmable from 38 MHz to 213 MHz confirms the feasibility of the proposed filter in applications such as data storage systems.
This paper describes the analysis and predistortion of a precise gain GmC-leapfrog filter. A 1.2-V 240-MHz fifth-order continuous-time low-pass GmC-filter is used as a design example. A method of mapping the transconductor losses is presented. Furthermore, it is proposed that the load and source resistors can be removed from the filter prototype to relax the trade-offs in the design of precise gain filters. In addition, the effects of the Miller-capacitor are studied. An accurate predistortion result can be achieved with the techniques discussed in this paper.
A 3rd-order continuous-time filter with a cut-off frequency of 235MHz in 120nm CMOS is presented. A linearization technique of an operational transconductance amplifier (OTA) is proposed. The gain of this filter is digitally programmable between 0.5dB and -5dB. The third-harmonic distortion of this filter is -49dB in maximum gain for a 400mV peak-to-peak differential output signal. Two identical filters were implemented on one chip to measure the mismatch which is lower than 0.7 dB in amplitude and 7deg in phase
In this paper, a linearity improvement technique is proposed for a low-distortion Gm-C bandpass filter operating in high IF ranges. The proposed transconductor eliminates Gm" value at the output by superposing the opposite non-linear behaviors of two differential structures in parallel. For the bandpass filter, instead of conventional biquad structure, a resonant-coupling structure is adopted for a flat frequency response which is insensitive to process and temperature variations. Fabricated in 65 nm CMOS process, the implemented 80 MHz bandpass filter shows a flat bandpass characteristic with 0.1 dB ripple, third-order harmonic rejection of 27 dB, IIP3 of -2 dBm, and NF of 21.5 dB, while consuming 11 mA from 1.2-V supply. The filter occupies the chip size of 0.5 × 0.5 mm2.
Novel building blocks for designing high-order current-mode filters by employing current mirrors as the elementary active elements are introduced in this paper. As a design example, a fifth-order elliptic current-mode filter is designed using only grounded capacitors. Simulation results using transistor parameters of a typical CMOS 0.35- technology are in a good agreement with the theoretically expected. A comparison with the corresponding current mirror based filter topologies realized using the leapfrog and the wave techniques has been also performed. For this purpose, new leapfrog and wave filter topologies are introduced. Comparison results confirm the benefits offered by the proposed filter configurations.
A new configuration realizing first-order canonical current
processing all-pass filters based on current differencing buffered
amplifier, a recently introduced active element, is proposed. Using this
configuration, two types of first-order current-mode all-pass filters
are derived. They employ only a single active element and a bare minimum
number of passive components. No component-matching constrains are
required. Because of the high performance of the current differencing
buffered amplifier, they are suitable for wideband applications. The
derived filters are cascadable because of their high output impedances
and they use fewer active and/or passive components compared to their
previously reported counterparts. As an application of the proposed
first-order all-pass networks, a new current-mode high-Q bandpass
filter, which offers a number of advantages over its counterparts, is
also given
When it comes to integratability, the zero-intermediate frequency
(IF) receiver is an alternative for the heterodyne or IF receiver. In
recent years, the zero-IF receiver has been introduced in several
applications, but its performance cannot be compared to that of the IF
receiver yet. This lower performance is closely related to its baseband
operation, resulting in filter saturation and distortion, both caused by
DC-offsets and self-mixing at the inputs of the mixers. The low-IF
receiver has a topology which is closely related to the zero-IF
receiver, but it does not operate in the baseband, only near the
baseband. The consequences are that, as for the zero-IF receiver, the
implementation of a low-IF receiver can be done with a high degree of
integration, however, its performance can be better. In this paper, the
fundamental principles of the low-IF receiver topology are introduced.
Different low-IF receiver topologies are synthesized and fully analyzed
in this paper. This is done by applying the complex signal technique-a
technique used in digital applications to the study of analog receiver
front ends
An IF bandpass filter based on a low distortion transconductor
- H Le-Thai
H. Le-Thai, et al.: "An IF bandpass filter based on a low distortion
transconductor," IEEE J. Solid-State Circuits 45 (2010) 2250 (DOI:
10.1109/JSSC.2010.206399).