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A simple analog rank filter
Abstract
A simple analog rank filter structure is proposed. A matrix-valued
ordinary differential equation (ODE) with initial conditions performs
the sorting. The state realization of this ODE contains integrators,
adders, and multipliers. The multiplication operations make the filter
nonlinear. The structure is a regular array that is only locally
connected
... A rank ®lter [17] can be implemented with only local interconnections.Fig. 5a shows a block diagram of a single cell of the rank ®lter, andFig. ...
This paper presents a variety of applications of an FPAA based on a regular pattern of signal-processing cells and primarily local signal interconnections. Despite the limitations introduced by local interconnections, the presented architecture accommodates a wide variety of linear and nonlinear circuits found in many signal processing systems. Thus it effectively proves that it is possible to improve the performance of an FPAA by means of constraining the interconnection pattern, without significantly limiting the class of circuits it can implement.
We propose a novel approach to the realization of continuous, fuzzy, and multi-valued logic (mvl) circuits. We demonstrate how a general-purpose field programmable analog array (FPAA), with cells realizing simple arithmetic operations on signals, can be used for this purpose. The FPAA, which is being implemented in a bipolar transistor array technology, operates from ±3.3 V or ±5 V power supplies and works in the range of frequencies up to several hundred MHz
The authors point out that because, under certain restrictions, cellular neural networks (CNNs) come very close to some Hamiltonian systems, they are potentially useful for simulating or realizing such systems. They show how to map two one-dimensional nonlinear lattices, the Fermi-Pasta-Ulam lattice (1965) and the Toda lattice (1975), onto a CNN. For the Toda lattice, they show what happens if the signals are driven beyond the linear region of the piecewise-linear output function. Though the system is no longer Hamiltonian, numerical experiments reveal the existence of soliton solutions for special initial conditions. This interesting phenomenon is due to a special symmetry in the CNN system of ordinary differential equations
We propose a novel approach to the realization of continuous,
fuzzy, and multi-valued logic (mvl) circuits. We demonstrate how a
general-purpose field programmable analog array (FPAA), with cells
realizing simple arithmetic operations on signals, can be used for this
purpose. The FPAA, which is being implemented in a bipolar transistor
array technology, operates from ±3.3 V or ±5 V power
supplies and works in the range of frequencies up to several hundred MHz
The electrical networks described model a nonlinear dynamical
system, the finite nonperiodic Toda lattice. Iterative eigenvalue and
singular value algorithms can be extended to ordinary differential
equations and in this way an alternative to digital implementations can
be offered. These differential equations and their properties are
presented. One basic step for finding a VLSI-suited analog circuit
realization is to design network models. Several models for
diagonalization of symmetric tridiagonal matrices are proposed. The
class of circuits discussed has some properties such as invariants like
losslessness or polynomial-type nonlinearity
Analog circuits for eigenvalue calculation or rank filtering can
be applied to real-time signal processing tasks. This paper reports on
experimental results with an analog circuit for these applications. The
circuit is based on a nonlinear dynamical system. Details of the
realization including parasitic effects are discussed. The accuracy of
the circuit has shown to be sufficient for image processing applications
The main task in rank filtering and many other nonlinear filtering
operations is sorting. In this work, a nonlinear dynamical system for
this operation is proposed. The sorting problem is embedded in a higher
dimensional matrix-valued problem. An equivalent analog circuit consists
of basic building blocks like adders, multipliers, and integrators which
set up basic nonlinear processing cells. These processing cells are
locally connected in a one-dimensional array of length N for a rank
filter, with N input data elements taken as the initial values
of the dynamical system. The time for sorting can be estimated
theoretically and indicates fast convergence. In time complexity, the
algorithm is of O ( N ). As opposed to a digital rank
filter, the analog rank filter possesses a parameter to control the
speed of convergence and the accuracy
If one is only interested in the signals associated with
Hamiltonian systems, and not in conserving the energy in individual
circuit elements (nonlinear inductors and capacitors), then such systems
can be built as analog circuits, which implement some signal flow
graphs. Under certain restrictions, cellular neural networks (CNNs) come
very close to some Hamiltonian systems; therefore, they are potentially
useful for simulating or realizing such systems. It is shown how to map
two one-dimensional nonlinear lattices, the Fermi-Pasta-Ulam lattice and
the Toda lattice, onto a CNN. It is demonstrated for the Toda lattice
what happens if the signals are driven beyond the linear region of the
output function. Though the system is no longer Hamiltonian, numerical
experiments reveal the existence of solitons for special initial
conditions. This phenomenon is due to a special symmetry in the CNN
system of ordinary differential equations
In this paper the authors develop a general framework for calculating the eigenvalues of a symmetric matrix using ordinary differential equations. New algorithms are suggested and old algorithms, including $QR$, are interpreted.
The papers are devoted to the study of the time evolution of dynamical
systems, encompassing finite particle systems in the classical sense,
infinite systems of statistical mechanics, and wave-propagation
phenomena described by nonlinear partial differential equations. A close
connection is established between ergodic theory and statistical
mechanics, and it is shown that striking-wave phenomena can be viewed as
significant examples of integrable Hamiltonian systems of infinitely
many degrees of freedom. Specific topics include the time evolution of
large classical systems, ergodic properties of infinite systems, the
laser as a reversible quantum dynamical system with irreversible
classical macroscopic motion, geodesic flow on surfaces of negative
curvature, and nonlinear wave equations. Other papers deal with
integrable systems of nonlinear evolution equations, traveling-wave
solutions of nonlinear diffusion equations, the existence of
heteroclinic orbits, triple collision in Newtonian gravitational
systems, and solutions of the collinear four-body problem which become
unbounded in finite time.
Real-time image processing in an application environment needs a set of low-cost implementations of various algorithms. This paper presents a one chip VLSI median filter based on a systolic processor and working at video rate. It includes its own memory and can be used without any image memory for on-line processing. The architectural choices have made it possible to design a small size chip with a high performance level.
The basic nonlinear operation in median filtering is a sorting of the input data vector. An analog structure for this filtering operation is presented. The sorting operation is embedded in a matrix-valued ordinary differential equation (ODE). The data to be sorted serve as initial values for the ODE. To induce the dynamics of the system a small perturbation is necessary. The circuit structure for the analog median filter consists of basic processing cells containing multipliers, integrators, and adders, arranged in an one-dimensional array. All connections are local only and no external control is necessary
A new architecture is presented for analog median filters, without
the high-accuracy reference voltage, high-speed analog summer, and
linear sawtooth wave generator, thereby making it is easy to implement
by VLSI technology. The features of this architecture are modular,
regular, locally connected and expansible. The throughput is independent
of the window size and the hardware complexity is linearly dependent on
the window size
The deterministic properties of weighted median (WM) filters are
analyzed. Threshold decomposition and the stacking property together
establish a unique relationship between integer and binary domain
filtering. The authors present a method to find the weighted median
filter which is equivalent to a stack filter defined by a positive
Boolean function. Because the cascade of WM filters can always be
expressed as a single stack filter this allows expression of the cascade
of WM filters as a single WM filter. A direct application is the
computation of the output distribution of a cascade of WM filters. The
same method is used to find a nonrecursive expansion of a recursive WM
filter. As applications of theoretical results, several interesting
deterministic and statistical properties of WM filters are derived
A novel median filter using analog tapped delay lines is designed
for real-time signal processing. It requires only N +1 analog
comparators for a window size of size N . As an extension, a
general order-statistics filter can also be realized with moderate
increase of circuit complexity. For current available fabrication
technology for MOS switched-capacitor circuits, the filter can work at a
clock rate up to 10 MHz. This development opens up possibilities for
practical applications of nonlinear filtering in real-time signal
processing, since the analog circuitry is far less complex than the
corresponding digital circuitry
The design and implementation of a VLSI chip for the one-dimensional median filtering operation is presented. The device is designed to operate on 8-bit sample sequences with a window size of five samples. Extensive pipelining and employment of systolic data-flow concepts at the bit level enable the chip to filter at rates up to ten megasamples per second. A configuration for using the chip for approximate two-dimensional median filtering operation is also presented.
Necessary and sufficient conditions for a signal to be invariant under a specific form of median filtering are derived. These conditions state that a signal must be locally monotone to pass through a median filter unchanged. It is proven that the form of successive median filtering of a signal (i.e., the filtered output is itself again filtered) eventually reduces the original signal to an invariant signal called a root signal. For a signal of length L samples, a maximum of frac{1}{2}(L - 2) repeated filterings produces a root signal.
A sorter-based processor architecture is introduced for digital
signal processing purposes. The processor has been optimized to
implement sliding average-type linear structures and three- and
five-sample sorting operations. The specialized processor can be used,
for example, for the several variations of the finite-impulse-response
(FIR) median hybrid (FMH) filters, as well as other types of
ranked-order filters and running-sum averaging operations. FMH filters
with averaging substructures and window lengths of up to 65 samples can
be computed with sampling intervals of less than 20 clock cycles. The
12-bit microprogrammable core processor is designed as a full-custom
very large scale integration (VLSI) circuit. Examples of filter
implementations show that the sorter-based processor architecture is
suitable for several kinds of digital signal processing tasks
Continuous generalization of jacobi methods
- S Paul
- K Hüper