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Design and Implementation of FPGA based Wi-Fi MAC Transmitter
Abstract
WiFi (Wireless Fidelity) is a wireless technology based on a cellular architecture where system is subdivided into cells. WiFi is the wireless way to handle networking. It is also known as 802.11 networking and wireless networking. The big advantage of WiFi is its simplicity. You can connect computers anywhere in your home or office without the need for wires. The computers connect to the network using radio signals, and computers can be up to 100 feet or so apart. WiFi transmitter implements the Basic Service set (BSS) and controlled by the base station called access point. These access points are connected with distribution system. The transmitter is responsible for transmission and generation of various entities like Preamble includes synchronization and Start frame delimiter (SFD), PLCP Header used to decode the frame consists of PLCP_PDU Length word, PLCP Signaling Field and Header Error Check Field and Mac Data Frame. But compared with wired network, wireless communication is having low speed, less range, less reliable, cost effective and less security. We can design and implement some protocol standards to overcome the disadvantages of wireless communication. In this project we are designed and implemented MAC (Medium Access Control) layer functions such as authentication, association, probe request and cyclic redundancy check as hardware to increase speed and security of WiFi WLAN communication. This Design coding, Simulation, Logic Synthesis and Implementation is done using Xilinx ISE. The designed hardware was tested by simulating in the Model Sim 6d and was successfully implemented in the SPARTAN3E FPGA board using Xilinx ISE as a synthesis tool
Wireless communications are a very popular application domain. The efficient implementation of their components (access points and mobile terminals/network interface cards) in terms of hardware cost and design time is of great importance. This paper describes the design and implementation of the HIPERLAN/2 WLAN system on a platform including general purpose microprocessors and FPGAs. Detailed implementation results (performance, code size, and FPGA resources utilization) are presented. The main goal of the design case presented is to provide insight into the design aspects of a complex system based on FPGAs. The results prove that an implementation based on microprocessors and FPGAs is adequate for the access point part of the system where the expected volumes are rather small. At the same time, such an implementation serves as a prototyping of an integrated implementation (System-on-Chip), which is necessary for the mobile terminals of a HIPERLAN/2 system. Finally, firmware upgrades were developed allowing the implementation of an outdoor wireless communication system on the same platform.
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