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European Association for the
Development of Renewable Energies,
Environment and Power Quality
International Conference on Renewable Energies and Power
Quality (ICREPQ’09)
Valencia (Spain), 15th to 17th April, 2009
Efficiency Optimization of the High-Power Isolated DC/DC Converters through
THD and Losses Reduction in Isolation Transformers
D. Vinnikov 1, V. Bolgov 2
1 Department of Electrical Drives and Power Electronics, Tallinn University of Technology
Ehitajate tee 5, 19086 Tallinn (Estonia)
Phone number:+372 6203705, fax number:+372 6203701, e-mail: dm.vin@mail.ee
2 Department of Electrical Engineering and Electrical Machines, Tallinn University of Technology
Ehitajate tee 5, 19086 Tallinn (Estonia)
Phone/Fax number:+372 6203800, e-mail: victor_bolgov@yahoo.com
Abstract. This paper describes a method of improving
efficiency of the high-power transformer-isolated DC/DC
converters by means of proper selection of an inverter switch
duty cycle. The paper revises old suggestions and
recommendations for choosing the maximal duty cycle value on
the basis of physical limits imposed by new solid-state devices.
The resulting improved efficiency of the converter is described
considering losses in separate energy conversion stages.
Keywords
DC/DC converters, efficiency, isolation transformer,
inverter.
1. Introduction
High-power transformer-isolated DC/DC converters have
a wide scope of applications. The most challenging area
is the rolling stock, where the DC/DC converter
topologies are mostly used in auxiliary power supplies
(APS). In general, APS is the power interface between
the traction catenary and the vehicle onboard low-voltage
consumers. The auxiliary power supply is directly
connected to the traction catenary, which means that it
must be fully compliant with specific catenary properties;
the large supply voltage swing being one of those. The
continuous failure-free operation of the APS must be
guaranteed within the following limits of the supply
voltage (in DC traction systems):
nomininnomin UUU ,, 3.167.0
≤
≤, (1)
where Uin,nom is the standardized nominal value of the
traction catenary. Table I provides the visual evaluation
of the lower and upper limits of different traction
catenaries specified by the standard EN50163 [1].
TABLE I. - Standardized Catenary Voltage Fluctuations
NOMINAL
VOLTAGE
Uin,nom
CONTINUOUS
MINIMAL
VOLTAGE Uin,min
CONTINUOUS
MAXIMAL
VOLTAGE Uin,max
600 400 770
750 500 950
1500 1000 1950
3000 2000 3900
In the rolling stock applications, the output voltage at the
rated load should not change over the full range of the
input voltage fluctuations. Based on the accepted voltage
fluctuations (Table I), the line regulation (LR)
requirement for the rolling stock APS supplied from the
traction catenary can be formulated as follows:
%0%100(%)
),(
min),(max),( =⋅
−
=
nomUinO
UinOUinO
U
UU
LR . (2)
where UO is the output voltage of the converter. Thus,
zero-percent line regulation must be considered in the
designing and dimensioning of the APS converter for the
rolling stock [2].
2. Inverter-Transformer Assembly: Design
and Operation
The main specific feature of the APS for the rolling stock
is that its input and output stages need to be galvanically
isolated. The requirement for safety isolation depends on
the integrity of the interconnections between the output
of the power supply and the safety isolation provided by
the load. Reference should be made to the European
standards EN60950 and EN50155. In view of these
requirements, a simplified block-diagram of a typical
DC/DC auxiliary converter for the DC-fed rolling stock
can be proposed (Fig. 1).
CONTROL
SYSTEM
INPUT
FILTE
R
INVERTER-
STAGE
ISOL
A
TION
TRANSFORME
R
RECTIFIE
R
-
STAGE
OUTPUT
FILTE
R
GALVANIC
ISOLATION
GALVANIC
ISOLATION
INDICATES POWER FLOW
INDICATES SIGNAL FLOW
INPUT
D
C
VOLTAG
E
OUTPUT
D
C
VOLTAG
E
OUTPUT VOLTAGE AND
CURRENT FEEDBACKS
INPUT VOLTAGE
FEEDBACK
CONTROL OF INVERTER
SWITCHES
D
C
AC
A
C D
C
Input side Intermediate AC link Output side
Special requirement
by
EN 60950/EN50155
Fig. 1. The required structure of the onboard APS converter for
the DC-fed rolling stock
The isolation transformer and the zero-percent line
regulation required are the main challenges for the
designer. Such multistage energy transfer (Fig. 1) is
always associated with high losses and lack of efficiency
of the developed converter. The most emphasized part
here is the inverter-transformer assembly: its operation
must be precisely coordinated to achieve higher
efficiency and flexibility of the whole converter.
For the described application, the half- and full-bridge
isolated DC/DC converter topologies are most feasible:
despite relative simplicity, they can provide galvanically
isolated output voltage with good regulation properties
and with reduced voltage stress on the primary switching
devices. This research mostly covers the half-bridge
topology based the APS converter (Fig. 2) developed for
the 3 kV DC rolling stock [3]. General specifications are
presented in Table II.
TABLE II. - Technical Specifications of the Experimental
Converter
INVERTER STAGE
Continuous minimal input voltage Uin,min,
VDC 2000
Continuous maximal input voltage Uin,max,
VDC 3900
Nominal input voltage Uin,nom, VDC 3000
Switching frequency fsw, kHz 1
Type of semiconductor switches
Infineon
6.5 kV 200 A
IGBT
ISOLATION TRANSFORMER STAGE
Core type of an isolation transformer
Gammamet
toroidal core
GM14DC
Operating flux density Bm, T 0.6
Ambient temperature Tamb, °C 70
Temperature rise
Δ
T, °C 50
Wiring material PURALIT® litz
MISCELLANEOUS
Converter output voltage UO, VDC 350
Desired output power PO, kW 50
The idea of the control of half-bridge converter operating
under the large input voltage swing is to maintain the
constant volt-seconds applied to the transformer primary
winding (Fig. 3). In other words, the relation UinD (where
Uin is the input voltage and D=ton/Tsw is the transistor
duty cycle) should be constant in all the operating points
of the converter [4]. To compensate the input voltage
variation, the duty cycle of the inverter switch should
change inversely proportional to Uin to maintain a
constant output voltage, UO:
n
DU
Uin
out
⋅
=, (3)
where n is the turns ratio of the isolation transformer
(power losses have been neglected). To achieve a good
design, the operation of the inverter-transformer
assembly should be investigated and analyzed in two
most demanding operating points: at minimum input
voltage, where the switch duty cycle is approaching its
predefined maximum Dmax and at maximum input
voltage, where the duty cycle becomes minimal (Dmin).
These two operating points could be set as boundary
operating points. The duty cycle variation range of any
isolated DC/DC converter with a large input voltage
swing is always lying between these two boundaries.
Another important operating point is the nominal
operating point, which corresponds to the nominal
operating voltage and could be used for the estimation of
the efficiency of the power converter.
Fig. 2. Simplified scheme of the experimental converter. The
required structure of the onboard APS converter for the DC-fed
rolling stock
Fig. 3. Timing diagrams of the inverter-transformer assembly
of the half-bridge DC/DC converter
At a fixed switching frequency and with normal steady-
state operation, the volt-seconds applied to the
transformer windings are constant, independent of the
input voltage and load current:
sw
O
sw
in
onin f
Un
f
DU
tU ⋅
=
⋅
=⋅ , (4)
where Uin is the input voltage, ton is the switch on-state
time, D is the switch duty cycle, UO is the output voltage,
n is the isolation transformer turns ratio, and fsw is the
switching frequency.
3. Selection of the Duty Cycle Variation
Range
The selection procedure of the duty cycle variation range
should always begin from the definition of the maximum
switch duty cycle corresponding to the minimal input
voltage. According to conservative design practice for the
full- and half-bridge converters, several unified values of
the maximum switch duty cycle, such as Dmax=0.45 [5] or
even Dmax=0.4, are used [4]. This is done mostly to
provide a proper safety margin, thus preventing a short
circuit across the supply voltage, which can cause the
destruction of power transistors. The minimum duty
cycle value Dmin in power converters with the large input
voltage swing is generally selected using (5).
max
max,
min,
min D
U
U
D
in
in ⋅= . (5)
The conservative selection procedure of the duty cycle
based on predefined Dmax values is not always useful
because it limits the flexibility and even can reduce the
efficiency of the inverter-transformer assembly. The
selection of Dmax should be individually performed in
respect to the specific properties of the converter, such as
converter topology, application field, transistor types,
isolation transformer specifications, etc. This results in
the influence on the dynamic properties of switching
transistors.
An idea – shifting of Dmax towards its absolute maximum
To improve the efficiency and flexibility of the high-
power half- and full-bridge isolated DC/DC converters,
the authors propose to shift the maximum switch duty
cycle Dmax towards its absolute maximum as close as
possible.
Theoretically, in the investigated transformer-isolated
half-bridge DC/DC converter, the absolute maximum
duty cycle can approach 0.5 (switch on-state time ton,lim is
half the switching period Tsw) but in practice it is always
limited by some certain value Dlim, which can be
expressed as
sw
IDTon
T
tt
D−
=lim,
lim , (6)
where tIDT is the interlock delay time between switching
on and off the opposite arm transistors to prevent cross
conduction followed by the short circuit of the DC-link
and damage of power transistors. To calculate the
interlock delay time, the following equation could be
used:
(
)( )
()
SF
tt
tttt
t
PDDPDD
rfondoffd
IDT ⋅
⎥
⎥
⎦
⎤
⎢
⎢
⎣
⎡
−+
+−+−
=
min,max,
min,max,min,_max,_ , (7)
where td-off,max and td-on,min are the maximal turn-off and
minimal turn-on delay times of the switching transistor,
respectively; tf,max and tr,min are the maximal fall time and
minimal rise time of the switching transistor; tPDD,max and
tPDD,min are the maximal and minimal signal propagation
delays from the control microprocessor to the switching
transistor and SF is the safety factor. In (6) the first four
terms describe the characteristics of the switching
transistor itself plus the gate resistor that is used. The last
two terms are the propagation delay time difference
determined by the control signal propagation chain from
the control circuitry via the gate driver to the switching
transistor. Often the interlock delay time is calculated
from typical datasheet values just multiplying by the
safety factor from field experience. For instance, [6]
proposes to use the safety factor SF=1.2. The discussed
experimental device is based on 6.5 kV 200 A IGBTs
FZ200R65KF1 with dedicated drivers controlled via fiber
optics from a high-performance microcontroller, the
interlock delay time will be about tIDT=9 us, resulting in
the absolute maximum duty cycle Dlim=0.49 at the
switching frequency fsw=1 kHz.
Evidently, such procedure demands special accuracy in
ensuring correct IDT, which must be done for each
application in particular. Thus, in the discussed
application with tIDT=9 us the proposed maximum switch
duty cycle will be Dmax =Dlim =0.49. The selection of the
minimum duty cycle value Dmin should be done by (5).
4. Impact of Different Duty Cycle Variation
Ranges on the Efficiency of the Inverter-
Transformer Assembly
To verify how the selection of the duty cycle variation
range can affect the efficiency of the inverter-transformer
assembly of the high-voltage IGBT-based half-bridge
DC/DC converter, a series of experiments were
performed. The duty cycle variation range was calculated
in accordance with the input voltage boundaries
presented in Table II. The first two ranges A and B were
selected upon the standard procedure with earlier
discussed unified maximum duty cycle values 0.4 and
0.45, correspondingly. The selection of the third duty
cycle variation range C was based on the proposed design
improvement procedure. The investigated duty cycle
variation ranges are presented in Table III.
TABLE III. - Duty Cycle Variation Ranges Used in the
Analysis
CASE
STUDY
Dmax
(Uin,max=
2000 V)
Dnom
(Uin,nom=
3000 V)
Dmin
(Uin,max=
3900 V)
A 0.4 0.27 0.21
B 0.45 0.3 0.23
C 0.49 0.33 0.25
Further, the efficiency of the half-bridge inverter and the
isolation transformer will be analyzed and compared for
these three operating points with similar conditions (see
Table I for details).
A. Operation Conditions and Losses of a Half-Bridge
Inverter
With the duty cycle being shifted towards maximum, the
rms voltage applied to the transformer’s primary winding
will be increased due to the longer conduction time of the
IGBT. For the same transferred power, the rms value of
the primary current should proportionally decrease. As a
consequence, the rms current of the switching transistors
will be decreased, thus having a positive influence on the
inverter losses. The comparison of the rms currents of the
switching transistor for the different operating voltages
and duty cycle values is presented in Table IV.
TABLE IV. - Impact of the Duty Cycle Variation Range on the
Operating Values of the Inverter Switches
OPERATING
POINT
Uin,min
(2000 V)
Uin,nom
(3000 V)
Uin,max
(3900 V)
CASE STUDY A
Switch duty cycle D 0.4 0.27 0.21
Switch average
current, Ic,av (A) 25 16.7 12.8
Switch rms current,
Ic,rms (A) 39.5 32.1 28.0
CASE STUDY B
Switch duty cycle D 0.45 0.3 0.23
Switch average
current, Ic,av (A) 25 16.7 12.8
Switch rms current,
Ic,rms (A) 37.3 30.4 26.7
CASE STUDY C
Switch duty cycle D 0.49 0.33 0.25
Switch average
current, Ic,av (A) 25 16.7 12.8
Switch rms current,
Ic,rms (A) 35.7 29.0 25.6
531
512
557
500
560
620 680
740
800
Case study C
Average losses (W)]
608
699
630
721
658
746
Case study B
Case study A
Maximal input voltage - minimum duty cycle: U
in
,
ma
x
D
min
Nomimal input voltage - nominal duty cycle: U
in
,
nom
D
nom
Minimal input voltage - maximum duty cycle: U
in
,
min
D
ma
x
Fig. 4. Average losses of half-bridge inverter operating with
different switch duty cycles and input voltages
The analysis (Fig. 4) shows that on an increase of the
switch duty cycle at the maximal input voltage by 22.5%,
the total losses of the half-bridge inverter could be
reduced by 8.1%. The proportional increase of the duty
cycle insures a 7.5% and 6.3% loss reduction at the
nominal and minimal input voltages, respectively.
Although the presented loss reduction increases the
efficiency of the inverter only by some fractions of
percent, the cooling effort could be reduced, thus
resulting in a more space-saving design.
B. Operation Conditions and Efficiency of the Isolation
Transformer
The shifting of Dmax towards its absolute maximum will
be followed by the decrease of the amplitude value of the
transformer secondary voltage. Neglecting losses in the
rectifier diodes and output filter components, the
transformer secondary amplitude voltage could be
estimated by (8).
D
U
UO
amp ⋅
=2
sec, , (8)
where UO is the converter output voltage. Table V shows
the impact of the duty cycle variation range change on
the main specifications of the isolation transformer.
It is obvious that due to shifting of Dmax towards its
absolute maximum, the turns number of the transformer
will also change. Due to an increased duty cycle, the
amplitude value of the transformer secondary voltage
will be reduced, thus decreasing voltage stress on the
rectifier diodes. During the analysis it was assumed that
the general specifications of the isolation transformer
(core type, volume, operating flux density, ambient
temperature and temperature rise, cross-section and type
of winding wires, etc. as well as input voltage swing and
operating frequency) remain the same for all the
investigated cases (see Table I).
Further, based on the data presented in Tables I and V,
three different isolation transformers were evaluated and
compared for the whole operation range in terms of
losses and efficiency. Cases A, B and C correspond to the
transformers designed to operate at Dmax values of 0.4,
0.45 and 0.49, respectively. Each transformer operation
was analyzed in three operating points – at Umin, Unom and
Umin with the corresponding Dmin, Dnom and Dmax. The
comparison between cases A, B and C at those operating
points is demonstrated below in Figs. 8-12.
It should be mentioned that due to duty cycle changes, to
match the input voltage, the converter assembly
encounters variable harmonic content. The square wave
pulses (Fig. 1) used in the DC/DC converter can be
presented as a fundamental component and a set of
higher harmonic components by applying the Fourier
transformation
tNDN
N
U
tu nn
nn
amppr
ωπ
π
cossin
1
4
)(
5,3,1
,⋅
⋅
=∑
∞
=
, (9)
where Upr,amp is the amplitude value of the square wave
primary voltage of the isolation transformer and D is the
inverter switch duty cycle corresponding to the voltage.
TABLE V. - Impact of the Duty Cycle Variation Range on the
Specifications of the Isolation Transformer
OPERATING
POINT
Uin,min
(2000 V)
Uin,nom
(3000 V)
Uin,max
(3900 V)
CASE STUDY A
Switch duty cycle D 0.4 0.27 0.21
Primary amplitude
voltage Upr,amp (V) 1000 1500 1950
Primary rms voltage
Upr,rms (V) 894.4 1102 1264
Primary rms current
Ipr,rms (A) 55.9 45.4 39.6
Second. amplitude
voltage Usec,amp (V) 437.5 648.2 833.3
Secondary rms
voltage Usec,rms (V) 390.6 481.2 551.9
Secondary rms
current Isec,rms (A) 128 103.9 90.7
Turns ratio 2.29
Primary turns 41
Secondary turns 18
CASE STUDY B
Switch duty cycle D 0.45 0.3 0.23
Primary amplitude
voltage Upr,amp (V) 1000 1500 1950
Primary rms voltage
Upr,rms (V) 948.7 1162 1323
Primary rms current
Ipr,rms (A) 52.7 43 37.8
Second. amplitude
voltage Usec,amp (V) 388.9 583.3 760.9
Secondary rms
voltage Usec,rms (V) 369.1 452.1 514.8
Secondary rms
current Isec,rms (A) 135.5 110.5 97.1
Turns ratio 2.57
Primary turns 42
Secondary turns 16
CASE STUDY C
Switch duty cycle D 0.49 0.33 0.25
Primary amplitude
voltage Upr,amp (V) 1000 1500 1950
Primary rms voltage
Upr,rms (V) 990 1219 1379
Primary rms current
Ipr,rms (A) 50.5 41 36.3
Second. amplitude
voltage Usec,amp (V) 357.1 535.7 696.4
Secondary rms
voltage Usec,rms (V) 353.6 345.4 492.5
Secondary rms
current Isec,rms (A) 141.4 114.8 101.6
Turns ratio 2.8
Primary turns 42
Secondary turns 15
Assuming a lossless converter with a purely resistive
load, we can consider the secondary voltage, the primary
and secondary current and the primary and secondary
powers to be of the same harmonic content. Then the
total harmonic distortion (THD) could be defined as the
ratio of the sum of the powers of all harmonic
components to the power of the fundamental harmonic:
1
5,3,1
P
P
THD n
n
∑
∞
=
=. (10)
In the considered cases, equations (9) and (10) take into
account odd harmonics up to 49th order.
Fig. 5 shows the dependence of THD on the duty cycle,
estimated for the full duty cycle variation range
theoretically available for the half-bridge inverter. This
figure helps us to understand the plot presented in Fig. 6.
The latter shows the transformer power at the
fundamental and higher harmonics. As can be seen, at
different operating points, the relationship between the
powers transferred at the fundamental and higher
frequencies can vary according to the changes in THD.
0
50
100
150
200
0,1 0,2 0,3 0,4 0,5
D
THD (%
)
Fig. 5. THD as a function of inverter switch duty cycle
C
B
A
C
B
AC
B
A
C
B
A
C
B
AC
B
A
0
12500
25000
37500
50000
0,2 0,3 0,4 0,5
D
Power (W)
Pow er at fundamental frequenc y, oper ating point Umax, Dmin
Pow er at fundamental frequenc y, oper ating point Unom, Dno
m
Pow er at fundamental frequenc y, oper ating point Umin, Dmax
Pow er at higher frequencies, oper ating point Umax, Dmin
Pow er at higher frequencies, oper ating point Unom, Dnom
Pow er at higher frequencies, oper ating point Umin, Dmax
Fig. 6. Power transferred through isolation transformer at the
fundamental and higher frequencies in case studies A, B and C,
respectively
Fig. 7 demonstrates the total losses of the three
transformers split into losses at the fundamental and
higher frequencies. As can be seen, the total power losses
decrease at any voltage if an isolation transformer is
designed to operate with a higher maximal duty cycle
value. The fundamental losses can increase or decrease
depending on the fundamental component of the power at
the chosen duty cycle. But the power losses at higher
frequencies always decrease even at minimal operational
voltage and maximal duty cycle value while the higher
maximal duty cycle value is being chosen to design a
DC/DC converter.
B
A
C
A
B
C
C
B
A
C
B
AB
ACABC
C
B
AA
BC
A
BC
0
200
400
600
800
0,2 0,25 0,3 0,35 0,4 0,45 0,5
D
Power loss (W)
Total pow er losses , operating point Umax, Dmin
Total pow er losses , operating point Unom, Dnom
Total pow er losses , operating point Umin, Dmax
Pow er losses at f undamental frequency , operating point Umax,
Dmin
Pow er losses at f undamental frequency , operating point Unom,
Dno m
Pow er losses at f undamental frequency , operating point Umin,
Dmax
Pow er losses at higher fr equency, oper ating point Umax, Dmin
Pow er losses at higher fr equency, oper ating point Unom, Dnom
Pow er losses at hi
g
her f re
q
uenc
y,
o
p
eratin
g
p
oint Umin
,
Dmax
Fig. 7. Power losses in an isolation transformer: total, at the
fundamental and higher frequencies in case studies A, B and C,
respectively
C
B
A
ABC
ABC
AB
CAB
CABC
0
6
13
19
25
0,2 0,3 0,4 0,5
D
Additional loss factor
Additional loss factor for primary w inding, operating point
Umax , Dmin
Additional loss factor for primary w inding, operating point
Uno m, Dno m
Additional loss factor for primary w inding, operating point
Umin, Dma x
Additional loss factor for secondar y w inding, operating point
Umax , Dmin
Additional loss factor for secondar y w inding, operating point
Uno m, Dno m
Additional loss factor for secondar y w inding, operating point
Umin, Dma x
Fig. 8. Harmonic-loss factors for primary and secondary
windings in case studies A, B and C, respectively
That phenomenon can be explained by the following
facts. The optimal transformer design rule of the copper
and core loss equalization will not work for middle-
frequency (500...2000 Hz) high-power transformers,
because the copper losses are dominating. They are
usually more than 90% from the total losses of the
transformer. Copper losses can approximately be
expressed as follows:
2sec
2
sec,1
2
,ALrmsALprrmsprcopper FRIFRIP ⋅⋅+⋅⋅= , (11)
where Rpr and Rsec are the resistances of the winding
materials, FAL1 and FAL2 are the additional loss factors
taking into account the rise of AC resistance compared to
the DC resistance in the primary and secondary windings.
As seen from Fig. 8, the harmonic loss factors are
overcoming the rise of THD if the converter operates
under high duty cycle and low voltage values (curve for
the operating point Umin, Dmax in Fig. 8). As a result, the
isolation transformers designed for the higher maximal
duty cycle value demonstrate higher efficiency at any
operational voltage and duty cycle (Fig. 9).
C
B
A
C
B
AA
BC
97,6
98
98,4
98,8
99,2
0,2 0,3 0,4 0,5
D
Efficiency (%)
Transf ormer eff ic iency , operating point Umax, Dmin
Transf ormer eff ic iency , operating point Unom, Dnom
Transf ormer eff ic iency , operating point Umin, Dmax
Fig. 9. Transformer efficiency in case studies A, B and C,
respectively
98,5
98,6
98,8
98,9
99,0
1000 1238 1475 1713 1950
U( V )
Efficiency, %
Transf ormer efficiency, case study C
Transf ormer efficiency, case study B
Transf ormer efficiency, case study A
Fig. 10. Comparison of the efficiency of different isolation
transformer designs for the same operating voltage range
Fig. 10 shows the comparison of the efficiency of the
discussed isolation transformer designs estimated for the
whole primary voltage range. The transformer designed
with the highest maximal duty cycle (case study C)
features about 0.3% efficiency rise compared to the
conventional one (case study A). In the case of other
transformer designs operating at higher temperatures, the
energy efficiency improvement was of 1...2%, resulting
in 0.5...1 kW less power dissipation of the 50 kVA
isolation transformer. If the isolation transformer was
designed with very low losses, e.g. efficiency was near
99.5%, then the impact of proper selection of the nominal
duty cycle on the transformer efficiency was negligible
(reduction of losses was less than 15 W).
5. Conclusions
In this paper, efficiency improvements of the high-
voltage isolated DC/DC converter by means of the
improved selection of the variation range of the duty
cycle of the inverter switch are discussed. A new
extended approach of the inverter duty cycle selection is
proposed. To verify the proposals, the efficiency of the
inverter and isolation transformer was estimated and
compared for three different duty cycle variation ranges.
It was found that the new method provides an efficiency
rise of the high-voltage half-bridge isolated DC/DC
converter. In the case of the investigated rolling stock
auxiliary power supply with the rated power of 50 kW
even moderate efficiency improvement in 1% will be
followed by the 0.5 kW…1 kW smaller heat dissipation,
thus resulting in a reduced cooling effort and, therefore,
higher power density of the designed converter.
Acknowledgement
Authors thank Estonian Science Foundation (Grant No.
7425 “Research of Dynamic Performance of High-
Voltage IGBTs” and Grant No. 8020 “Research of
Advanced Control and Diagnostics Systems for the High-
Power IGBT Converters”) for financial support of this
study.
References
[1] Speisespannugen von Bahnnetzen, Deutsche Fassung
EN50163:1995 (1996).
[2] D. Vinnikov, Research, Design and Implementation
of Auxiliary Power Supplies for the Light Rail
Vehicles, Ph.D. dissertation, TUT press (2005).
[3] T. Jalakas; D. Vinnikov and J. Laugis, “Development
of 50-kW Isolated DC/DC Converter with High-
Voltage IGBTs”, in Proc. CPE 2007, pp. 1-6.
[4] A.I. Pressmann, Switching Power Supply Design,
Mc Graw Hill (1991).
[6] Lloyd H. Dixon, Magnetics Design for switching
Power Supplies, Section 4: Power Transformer
Design, Texas Instruments (2001).
[5] Zhang Xi, Deadtime calculation for IGBT modules,
Infineon Technologies AG (2008).
[7] T. Jalakas; D. Vinnikov and J. Laugis, “Interlock
Delay Time Minimization and its Impact on the
High-Voltage Half-Bridge DC/DC Converter”
(unpublished).
