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Group Theoretical Aspects of Reversible Logic Gates.
Abstract
Logic gates with three input bits and three output bits have a privileged position within fundamental computer science: they are a sufficient building block for constructing arbitrary reversible boolean networks and therefore are the key to reversible digital computers. Such computers can, in principle, operate without heat production. As there exist as many as 8!=40,320 different 3-bit reversible truth tables, the question arises as to which ones to choose as building blocks. Because these gates form a group with respect to the operation ‘cascading’, we can apply group theoretical tools, in order to make such a choice.
... Lineaire reversibele functies (al dan niet homogeen) werden reeds aangewend bij de synthese van algemene (d.w.z. niet noodzakelijk lineaire) functies [31]. Ze hebben echter ook nut op zichzelf: Aaronson en Gottesman gebruiken ze bijvoorbeeld bij de simulatie van stabilizer circuits [30]. ...
... Deze vormen een groep isomorf met 2 w : GL(w, 2), het semi-direct product van 2 w (de groep van alle binaire vectoren van lengte w) en GL(w, 2). In [31] worden de eigenschappen van deze deelgroepen van S 2 w nader bekeken. ...
... Die kunnen voorgesteld worden in een rechthoekig diagram zoals op Figuur 4.1 (b), dat geldt voor n = 35, p = 7 en q = 5. Op dit Young tableau is de permutatie(3,23,30,31,18,11,12,33,34,13,5)(20,35)aangebracht. We beschouwen dus q verzamelingen ('rijen'), elk van p elementen. ...
Eén van de voornaamste uitdagingen bij de verdere ontwikkeling van digitale schakelingen, is de beperking van de warmte-generatie. Warmte zorgt namelijk voor een slechtere werking van circuits en natuurlijk ook voor een (onnodig) hoge energieconsumptie. In de komende jaren zal één gedeelte van de warmtedissipatie steeds belangrijker worden, namelijk de warmtedissipatie veroorzaakt door het weggooien van informatie. Inderdaad, elke weggegooide bit zorgt voor een hoeveelheid warmte. Deze warmte kan alleen vermeden worden door informatieverlies tegen te gaan. Digitale schakelingen die dit toelaten, worden reversibele schakelingen genoemd. Reversibiliteit is ook van belang bij zogenaamde ‘quantum computers’. Dit zijn computers die gebruik maken van de principes van de kwantummechanica. Deze zullen in de toekomst krachtige rekeninstrumenten opleveren. Op basis van kwantummechanica kunnen we aantonen dat elk bouwblokje van een quantum computer reversibel moet zijn. Dit doctoraatswerk geeft een aantal methodes om reversibele schakelingen te synthetiseren. Synthese van reversibele schakelingen onderscheidt zich op een aantal punten van klassieke synthese. Zo moeten we gebruik maken van andere bouwblokken (poorten), aangezien klassieke poorten niet reversibel zijn en is het belangrijk het aantal ingangen zoveel mogelijk te beperken. Bovendien wordt in dit werk steeds getracht om het aantal poorten in de circuits te minimaliseren.
... The permutation notation of an arbitrary exchange gate has the form of a product of 2 w−2 disjoint transpositions. The exchangers (together with the identity gate) form a group E w of order w!, which is a subgroup242526 of R w , and is isomorphic to the symmetric group S w . We remind that the subgroup C w only allows permutations within the duos ...
... An inverter is a gate where an output P i is either equal to its corresponding input A i or to latter's inverse NOT A i . The inverters of width w form a subgroup [25] ...
... The total chain consists of 2w links. The subgroup F w = I w : E w is the semidirect product of I w and E w and has been introduced before [25]. It has w!2 w elements.Table 4Table 5. ...
Reversible logic plays a fundamental role both in ultra-low power electronics and in quantum computing. It is therefore important to have an insight into the structure of the group formed by the reversible logic gates and their cascading into reversible circuits. Such insight is gained from constructing chains of maximal subgroups. The subgroup of control gates plays a prominent role, as it is a Sylow 2-subgroup.
... In this section, we introduce some basic concepts and results on permutation group theory from [19] and binary reversible logic from [20] [21] [22]. ...
... We introduce a permutation group [23] [21] [19] and its relationship with reversible circuits. ...
... In this section, we introduce some basic concepts and results on permutation group theory from[19]and binary reversible logic from[20][21][22]. Definition 1 (Binary Reversible Gate). ...
Reversible circuits play an important role in quantum computing. This paper studies the realization problem of reversible circuits. For any n-bit reversible function, we present a constructive synthesis algorithm. Given any n-bit reversible function, there are N distinct input patterns different from their corresponding outputs, where N≤2n, and the other (2n−N) input patterns will be the same as their outputs. We show that this circuit can be synthesized by at most 2n⋅N ‘(n−1)’-CNOT gates and 4n2⋅N NOT gates. The time and space complexities of the algorithm are Ω(n⋅4n) and Ω(n⋅2n), respectively. The computational complexity of our synthesis algorithm is exponentially lower than that of breadth-first search based synthesis algorithms.
... Many binary universal reversible logic gates have been proposed [5] [12] [13] [14] [15]. There exists only one 1*1 gate, which is an inverter (a wire is not considered as a gate). ...
... The major constraints of reversible logic synthesis are: (i) the fan-out of every signal, including primary inputs, is one, (ii) the graph of the reversible circuit must be a dag (directed acyclic graph), which means that there must be no loops of gates or internal loops in a gate, and (iii) many of the practical functions are not themselves reversible and need to make reversible before implementing them with reversible gates. Systematic logic synthesis algorithms for reversible logic are still very immature, but some methods have been proposed [15] [16] [17] [18] [19] [20] [21]. Most of the papers discuss design using Feynman, Toffoli, and Fredkin gates. ...
... The simplest structure for composition is cascades. Reversible logic synthesis using cascades of gates is presented in [15] [17] [21]. The cascades have the same number of intermediate signals at every level. ...
Reversible circuits are currently on of top approaches to power minimization and the one whose importance will be only growing with time. In this paper, the well known Feynman gate is generalized to k*k gate and a new generalized k*k family of reversible gates is proposed. A synthesis method for multi-output SOP function using cascades of the new gate family is presented. For utilizing the benefit of product sharing among the output functions, two graph-based data structures are used. Another synthesis method for AND-OR-EXOR function using cascades of the new gate family and generalized Feynman gate is also presented. Synthesis method for single-output ESOP function using cascades of the new gate family is also presented. All these synthesis methods are technology independent and generate very few garbage outputs and need few input constants.
... There have been extensive work in constructing reversible gates which have certain properties such as universality, symmetry, etc. [1-7, 9, 12, 17, 19, 20, 22]. In particular, there are the synthesis algorithms by composition [15, 12], decomposition [15], factorization [23]., EXOR logic [4, 8, 15, 18, 24], group-theoretic methods [19, 20], synthesis to regular structures [14, 16, 17, 22], synthesis of various forms of reversible cascades [2, 7, 8, 9, 10, 11, 12, 15] and spectral methods [10, 11]. The Miller's gate [10] was proposed for quantum logic realizations or in emerging reversible technologies. ...
... The new gates can be used to synthesize reversible circuits of minimum " scratchpad register width " for arbitrary reversible functions. The problem is formulated in terms of group theory and solved by using the algebraic software GAP for logic synthesis [19, 20]. Our result is not only interesting theoretically in comparison with other families of gates [18], but also of practical importance in realization of current quantum computers due to the small possible width of the scratchpad register (this width is limited by 7 in 2002). ...
... We realize n-input functions with the width of n. Our method is based on group theory [19, 20]. ...
Reversible logic plays an important role in the synthesis of circuits for quantum computing. In this paper, we introduce families of reversible gates based on the majority Boolean function (MBF) and we prove their properties in reversible circuit synthesis. These gates can be used to synthesize reversible circuits of minimum “scratchpad register width” for arbitrary reversible functions. We show that, given a MBF f with 2k+1 inputs, f can be implemented by a reversible logic gate with 2k+1 inputs and 2k+1 outputs, i.e., without any constant inputs. We also demonstrate new gates from this family with very efficient quantum realizations for majority-based applications. They can be used to synthesize any reversible function of the same width in conjunction with inverters and Feynman (2-qubit controlled-NOT) gates. The gate universality problem is formulated in terms of elementary group theory and solved using the algebraic software GAP.
... There has been recently much research effort on developing algorithms for synthesis of reversible circuits [1] [2] [3] [4] [5]. The previous approaches are either not optimal, time consuming or cannot be applied to 4 qubit circuits. ...
... Group theory has been demonstrated as a powerful tool for analysis in many applications. Few preliminary works on using group theory for reversible logic synthesis have been proposed [2] [5]. GAP [8] is a mathematical analysis package for group theory applications. ...
... It is composed of a set of efficient and fast algorithms for manipulating set and group operations. It was used to prove the universality of a given reversible logic sets [5] [10]. ...
We present fast algorithms to synthesize exact minimal reversible circuits for various types of gates and costs. By reducing reversible logic synthesis problems to group theory problems, we use the powerful algebraic software GAP to solve such problems. Our algorithms are not only able to minimize for arbitrary cost functions of gates, but also orders of magnitude faster than the existing approaches to reversible logic synthesis. In addition, we show that the Peres gate is a better choice than the standard Toffoli gate in libraries of universal reversible gates.
... A gate is said to be reversible if it is used to synthesize a reversible function or a reversible circuit [7]. A function is reversible if the number of inputs is equal to the number of outputs, and each input pattern maps to a uniquely output pattern (bijection) [8]. Synthesizing circuits with pure quantum gates improves the cost and the time efficiency of these circuits since no heat dissipation and no information destroyed from the system, in addition, we gain the advantages of quantum computing [7]. ...
... Definition 2. 8 The universal library of synthesis is the smallest set of building blocks used in the synthesis process [1]. ...
We present new algorithms to synthesize exact universal reversible gate
library for various types of gates and costs. We use the powerful algebraic
software GAP for implementation and examination of our algorithms and the
reversible logic synthesis problems have been reduced to group theory problems.
It is shown that minimization of arbitrary cost functions of gates and orders
of magnitude are faster than its previously counterparts for reversible logic
synthesis. Experimental results show that a significant improvement over the
previously proposed synthesis algorithm is obtained compared with the existing
approaches to reversible logic synthesis.
... Although studies of reversible computing were initiated in the 1960s [31] [6] and a number of universal reversible logic gates have been proposed, general problems of universality of such gates have attracted the attention of researchers only very recently. Few papers have been devoted so far to universality of reversible gates and most of them consider binary gates [51] [14] [26]. ...
... Although studies of reversible computing were initiated in the 1960s [31, 6] and a number of universal reversible logic gates have been proposed, general problems of universality of such gates have attracted the attention of researchers only very recently. Few papers have been devoted so far to universality of reversible gates and most of them consider binary gates [51, 14, 26]. In this paper, we are concerned entirely with universality of general ternary reversible gates. ...
A set of p-valued logic gates (primitives) is called universal if an arbitrary p-valued logic function can be realized by a logic circuit built up from a finite number of gates belonging to this set. In the paper, we consider the problem of determining the number of universal single-element sets of ternary reversible logic gates with two inputs and two outputs. We have established that over 97% of such sets are universal.
... . ( 10 ) General HHL Algorithm Quantum Circuit Implementation: In 2012, Yudong Cao et al. proposed an efficient and general quantum circuit design implementation [14]. In this design, the Group Leader Optimization Algorithm was used to find the circuit decomposition of the [16]. Then simply multiply the offset angles of all the revolving gates in the circuit by a factor of 2, 4, and 8 to get the operators [6]. ...
In 2019, Yonghae Lee et al. combined the circuit implementation of the HHL quantum algorithm with a classical computer, and designed a hybrid HHL quantum circuit optimization algorithm to reduce experimental errors caused by decoherence and so on. However, the optimization is achieved only in the auxiliary quantum coding phase, and no quantum resource reduction is done on the quantum phase estimation and inverse quantum phase estimation stages. At the same time, the circuit optimization illustration on the 2th-order linear equation system just has the result and no specific process. In this paper, based on the idea of the hybrid HHL algorithm and the general quantum circuit implementation framework of HHL, a global optimization HHL algorithm is proposed. The feasibility of the global optimization HHL algorithm is verified by IBM's qiskit. The detail circuit optimization illustrations on the 4th-order linear equations show that the global optimization HHL algorithm can effectively reduce quantum resources without losing the fidelity of the results. Thus the global optimization HHL algorithm can further avoid some result errors than the existing implementation methods.
... In this paper, two methods for calculating the quantum cost are used: the cost015 metric [28] and cost115 metric [29]. In the cost015 metric: the quantum cost of a one-qubit gate is 0, two-qubit gate is 1 and three-qubit gate is 5 [30]. ...
The synthesis and optimization of quantum circuits are essential for the construction of quantum computers. This paper proposes two methods to reduce the quantum cost of 3-bit reversible circuits. The first method utilizes basic building blocks of gate pairs using different Toffoli decompositions. These gate pairs are used to reconstruct the quantum circuits where further optimization rules will be applied to synthesize the optimized circuit. The second method suggests using a new universal library, which provides better quantum cost when compared with previous work in both cost015 and cost115 metrics; this proposed new universal library “Negative NCT” uses gates that operate on the target qubit only when the control qubit’s state is zero. A combination of the proposed basic building blocks of pairs of gates and the proposed Negative NCT library is used in this work for synthesis and optimization, where the Negative NCT library showed better quantum cost after optimization compared with the NCT library despite having the same circuit size. The reversible circuits over three bits form a permutation group of size 40,320 (23!), which is a subset of the symmetric group, where the NCT library is considered as the generators of the permutation group.
... Recently, the study of reversible logic synthesis problem using group theory is rising rapidly. Investigation on the universality of the basic building blocks of reversible circuits has been presented [8,9]. A relation between the reversible logic synthesis problem and Young subgroups has been discussed [10]. ...
Reversible logic has been considered as an important solution to the power dissipation problem in the existing electronic devices. Many universal reversible libraries that include more than one type of gates have been proposed in the literature. This paper proposes a novel reversible n-bit gate that is proved to be universal for synthesizing reversible circuits. Reducing the reversible circuit synthesis problem to permutation group allows Schreier-Sims Algorithm for the strong generating set-finding problem to be used in the synthesize of reversible circuits using the proposed gate. A novel optimization rules will be proposed to further optimize the synthesized circuits in terms of the number of gates, the quantum cost and the utilization of library to achieve better results than that shown in the literature.
... The quantum cost of any reversible circuit is the number of elementary gates (2-qubit gates) used to build the circuit [14][15][16]. There are two methods of calculating the quantum cost, which are: cost015 metric, which consider the quantum cost of any 1 × 1 reversible gate as zero, the quantum cost of any 2×2 reversible gate as one, and the quantum cost of the other reversible gates is calculated by counting the number of elementary gates used to build them [7,17]. The cost115 metric, is similar to cost015 but it consider the quantum cost of the 1 × 1 gates as one [7,15,16]. ...
Quantum computers require quantum processors. An important part of the processor of any computer is the arithmetic unit, which performs binary addition, subtraction, division and multiplication, however multiplication can be performed using repeated addition, while division can be performed using repeated subtraction. In this paper we present two designs using the reversible $R^3$ gate to perform the quantum half adder/ subtractor and the quantum full adder/subtractor. The proposed half adder/subtractor design can be used to perform different logical operations, such as $AND$, $XOR$, $NAND$, $XNOR$, $NOT$ and copy of basis. The proposed design is compared with the other previous designs in terms of the number of gates used, the number of constant bits, the garbage bits, the quantum cost and the delay. The proposed designs are implemented and tested using GAP software.
... The initial method for reversible logic synthesis is really a very striking model of how mathematics and reversibility are related. According to work by [35,36], they used reversible synthesis as a cascade of gates in the form of a serial composition that formed a group. Considering their result, it is possible to use the known methods from the group theory. ...
We have defined a new method for automatic construction of reversible logic circuits by using the genetic programming approach. The choice of the gate library is 100% dynamic. The algorithm is capable of accepting all possible combinations of the following gate types: NOT TOFFOLI, NOT PERES, NOT CNOT TOFFOLI, NOT CNOT SWAP FREDKIN, NOT CNOT TOFFOLI SWAP FREDKIN, NOT CNOT PERES, NOT CNOT SWAP FREDKIN PERES, NOT CNOT TOFFOLI PERES and NOT CNOT TOFFOLI SWAP FREDKIN PERES. Our method produced near optimum circuits in some cases when a particular subset of gate types was used in the library. Meanwhile, in some cases, optimal circuits were produced due to the heuristic nature of the algorithm. We compared the outcomes of our method with several existing synthesis methods, and it was shown that our algorithm performed relatively well compared to the previous synthesis methods in terms of the output efficiency of the algorithm and execution time as well.
... , y n , respectively. This duality has been used for reversible logic synthesis in the last decade [6,13], but has also seen use as a theoretical foundation for the analysis of reversible circuit logic [15,16]. Unlike the usual formulation of the symmetric group S n , we will consider its elements to be permutations of the set {0, . . . ...
Previously, Soeken and Thomsen presented six basic semantics-preserving rules for rewriting reversible logic circuits, defined using the well-known diagrammatic notation of Feynman. While this notation is both useful and intuitive for describing reversible circuits, its shortcomings in generality complicates the specification of more sophisticated and abstract rewriting rules.
In this paper, we introduce Ricercar, a general textual description language for reversible logic circuits designed explicitly to support rewriting.
Taking the not gate and the identity gate as primitives, this language allows circuits to be constructed using control gates, sequential composition, and ancillae, through a notion of ancilla scope. We show how the above-mentioned rewriting rules are defined in this language, and extend the rewriting system with five additional rules to introduce and modify ancilla scope. This treatment of ancillae addresses the limitations of the original rewriting system in rewriting circuits with ancillae in the general case.
To set Ricercar on a theoretical foundation, we also define a permutation semantics over symmetric groups and show how the operations over permutations as transposition relate to the semantics of the language.
... Since the presence of those redundant lines is considered as the cost of the circuits [9], it is desirable not to use the redundant lines. For that reason, the most fundamental model is the reversible circuits without redundant lines [1], [3], [4], [6]- [8], [10]. We deal with the reversible logic circuits without redundant input/output lines. ...
We present a new lower bound on the number of gates in reversible logic circuits that represent a given reversible logic function, in which the circuits are assumed to consist of general Toffoli gates and have no redundant input/output lines. We make a theoretical comparison of lower bounds, and prove that the proposed bound is better than the previous one. Moreover, experimental results for lower bounds on randomly-generated reversible logic functions and reversible benchmarks are given. The results also demonstrate that the proposed lower bound is better than the former one.
... Looking at reversible circuit as permutations is not a novel idea. This duality has been used for reversible logic synthesis [7], [8] but also as theoretical foundation for reversible logic analysis [9], [10]. Though the many results have shown these to be interesting approaches, we will take a different approach for this work. ...
We investigate the subclass of reversible functions that are self-inverse and
relate them to reversible circuits that are equal to their reverse circuit,
which are called palindromic circuits. We precisely determine which
self-inverse functions can be realized as a palindromic circuit. For those
functions that cannot be realized as a palindromic circuit, we find alternative
palindromic representations that require an extra circuit line or quantum gates
in their construction. Our analyses make use of involutions in the symmetric
group $S_{2^n}$ which are isomorphic to self-inverse reversible function on $n$
variables.
... Some work on local optimization of such circuits via equivalences has also been done [12,8]. In a different direction, group theory has recently been employed as a tool to analyze reversible logic gates [19] and investigate generators of the group of reversible gates [5]. ...
Reversible or information-lossless circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requirement in the emerging field of quantum computation. We investigate the synthesis of reversible circuits that employ a minimum number of gates and contain no redundant input-output line-pairs (temporary storage channels). We prove constructively that every even permutation can be implemented without temporary storage using NOT, CNOT and TOFFOLI gates. We describe an algorithm for the synthesis of optimal circuits and study the reversible functions on three wires, reporting distributions of circuit sizes. Finally, in an application important to quantum computing, we synthesize oracle circuits for Grover's search algorithm, and show a significant improvement over a previously proposed synthesis algorithm.
... The study of reversible logic synthesis problem using group theory is arising rapidly. Investigation on the universality of the basic building blocks of reversible circuits has been done [9,10]. A relation between Young subgroups and the reversible logic synthesis problem has been proposed [11]. ...
The reversible circuit synthesis problem can be reduced to permutation group. This allows Schreier-Sims Algorithm for the strong generating set-finding problem to be used to synthesize reversible circuits using the NCT library. Applying novel optimization rules to minimize the number of gates gives better quantum cost than that shown in the literature. Applications on how to integrate any three irreversible Boolean functions on a single 3-bit reversible circuit will be shown.
... There exist many universal reversible gates [1,3,5,8,11]. There exists only one 1*1 reversible gate called inverter (A→A). ...
Minimizing the number of "garbage bits" is the main challenge of reversible logic synthesis. Because garbages are directly related to the size of qubit register, they are absolutely critical for current quantum technology. But in CMOS reversible/adiabatic circuits, the number of gate levels is more important. This paper presents an efficient adder circuit with minimum garbage, constant-input and quantum cost that can be mapped on current technology. It has been analyzed and demonstrated that the results of proposed adder shows better performance compared to similar type of existing designs.
... Such permutations form groups, whose structures can be exploited. Several attempts have been made to use these properties in synthesis [23][24][25]. Some researchers have explored other domains of logic function representation. ...
This study gives a brief overview of the current trends in reversible logic synthesis with emphasis on template matching. The basic building block for reversible circuits considered here is the multiple-control Toffoli gate. Some approaches to synthesis are reviewed and the challenges are explained. Since many practical functions are not reversible, they must be embedded into reversible ones, if they are to be implemented using reversible logic. The complexity of such embeddings is expounded. A two phase synthesis is described where particular attention is devoted to the optimisation phase via template matching. Insights into the properties of the templates, have led to algorithms that aid the generation of templates. Until recently, the application of templates has been guided by different heuristics. A review of an exact template matching algorithm with a discussion of the implications of such an algorithm is given. Exact matching affects both the generation as well as the application of templates. Results from a prototype implementation are encouraging.
... Relevant publications are as follows: [Toffoli, 1980] introduced the Toffoli gate, which is a universal reversible logic gate (see also [Storme et al., 1999], which studies universal reversible logic gates in general). ¶ ¶ Bennet's classic paper [Bennett, 1973] studied the notion of a reversible Turing machine. ...
We use constructions in monoid and group theory to exhibit an adjunction between the category of partially ordered monoids and lazy monoid homomorphisms and the category of partially ordered groups and group homomorphisms such that the unit of the adjunction is injective. We also prove a similar result for sets acted on by monoids and groups.
We introduce the new notion of a lazy homomorphism for a function f between partially ordered monoids such that f(m ○ m′) ≤ f(m) ○ f(m′) .
Every monoid can be endowed with the discrete partial ordering ( m ≤ m′ if and only if m=m′) , so our constructions provide a way of embedding monoids into groups. A simple counterexample (the two-element monoid with a non-trivial idempotent) and some calculations show that one can never hope for such an embedding to be a monoid homomorphism, so the price paid for injecting a monoid into a group is that we must weaken the notion of a homomorphism to this new notion of a lazy homomorphism.
The computational significance of this is that a monoid is an abstract model of computation – or at least of ‘operations’ – and, similarly, a group models reversible computations/operations. With this reading, the adjunction with its injective unit gives a systematic high-level way of faithfully translating an irreversible system into a ‘lazy’ reversible one.
Informally, but perhaps informatively, we can describe this work as follows: we give an abstract analysis of how we can sensibly add ‘undo’ (in the sense of ‘control-Z’).
... An arbitrary boolean function can be implemented using exclusively such gate. Storme et al. [6] have shown that not less than 38,976 different logic gates (all with three inputs and three outputs) are candidates to play the role of universal reversible building block. Instead of working with a single block, one can equally well use a set of building blocks. ...
In principle, any reversible logic circuit can be built by using a single building block (having three logic inputs and three logic outputs). We demonstrate that, for a exible design, it is more advantageous to use a broad class of reversible gates, called control gates. They form a gen- eralization of Feynman's three gates (i.e. the NOT, the CONTROLLED NOT, and the CONTROLLED CONTROLLED NOT). As an illustration, two reversible 4-bit carry-look-ahead adders in 0.8 m c-MOS have been built.
... Recently two papers [15,16] were published on studies of cascade connections of reversible (3,3)gates. As the number of arbitrary two-gate circuits is much greater than the number of cascade circuits and cascades implement only balanced functions we think that considering arbitrary twogate circuits is a better way to measure efficiency of gates. ...
In contrast to conventional gates, reversible logic gates have the same number of inputs and ouputs, each of their output function is equal to 1 for exactly half its input assignments and their fanout is always equal to 1. It is interesting to compare compositional properties of reversible and conventional gates. We present such a comparison based on an exhaustive study of logic circuits.
... In [30], Shende et al presented a top-down structure using the Cosine-Sine decomposition and introduced and used the quantum multiplexer for recursive implementation of quantum gates. Group theory has also been employed as a tool to analyze reversible gates [31] and investigate generators of the group of reversible gates [32]. ...
1. Abstract Quantum information processing technology is in its pioneering stage and no efficient method for synthesizing quantum circuits has been introduced so far. This paper introduces an efficient analysis and synthesis framework for quantum logic circuits. The proposed synthesis algorithm and flow can generate a quantum circuit using the most basic quantum operators, i.e., the rotation and controlled-rotation primitives. We will introduce the notion of quantum factored forms, and develop a canonical and concise representation of quantum logic circuits in the form of quantum decision diagrams (QDD's) which are amenable to efficient manipulation and optimization including recursive unitary functional bi-decomposition. This representation will produce a rigorous graph-based framework for the analysis and synthesis of quantum logic circuits. Subsequently, an effective QDD- based algorithm will be developed and applied to automatic synthesis of quantum logic circuits. vectors (quantum states.) A key problem is thus how to construct a minimum-cost realization of this kind of quantum logic circuit. Automated synthesis of standard Boolean logic circuits is a well- studied area with many efficient algorithms. However, no efficient method for synthesizing quantum circuits has been introduced so far. Previous work on quantum logic synthesis is mostly based on search- based approaches, which require enormous computational complexity (e.g., matrix decomposition, local circuit transformations, spectral techniques, and evolutionary approaches.) In this paper a canonical decision diagram based representation of quantum circuits is presented and a CAD methodology and novel techniques for synthesis of quantum logic circuits based on these decision diagrams are described. Quantum computation can utilize a series of steps, each logically reversible, and this in turn allows physical reversibility (9)(10). Hence, every quantum circuit is reversible and classical binary reversible synthesis and quantum synthesis are closely related research areas. Feasibility of reversible logic circuits has been technologically demonstrated (16); the proposed approach is also applicable to synthesis of such circuits. The reminder of this paper is organized as follows: In section 3, some fundamental aspects of quantum mechanics is presented. Section 4, summarizes the previous work on quantum circuit synthesis. In section 5, the proposed technique is presented which includes the introduction of quantum factored forms, quantum decision diagrams (QDD's) and QDD-based quantum circuit synthesis. The conclusions are provided in section 6.
... 7. Group-theoretic methods including use of algebraic software such as GAP [73,81,85]. The set of all reversible functions forms a non-Abelian group (denoted S n ) with respect to the composition operation. ...
... Recently, the study of reversible logic synthesis problem using group theory is gaining more attention. Investigation on the universality of the basic building blocks of reversible circuit has been done [24,4]. A relation between Young subgroups and the reversible logic synthesis problem has been proposed [5]. ...
Many universal reversible libraries that contain more than one gate type have
been proposed in the literature. Practical implementation of reversible
circuits is much easier if a single gate type is used in the circuit
construction. This paper proposes a reversible n-bit gate that is universal for
reversible circuits synthesis. The proposed gate is extendable according to the
size of the circuit. The paper shows that the size of the synthesized circuits
using the proposed gate is comparable with the size of the synthesized circuits
using the hybrid reversible libraries for 3-in/out reversible circuits.
... Recently, the study of reversible logic synthesis problem using group theory is gaining more attention. Investigation on the universality of the basic building blocks of reversible circuit has been done [28,6]. A relation between Young subgroups and the reversible logic synthesis problem has been proposed [7]. ...
The reversible circuit synthesis problem can be reduced to permutation group.
This allows Schreier-Sims Algorithm for the strong generating set-finding
problem to be used to find tight bounds on the synthesis of 3-bit reversible
circuits using the NFT library. The tight bounds include the maximum and
minimum length of 3-bit reversible circuits, the maximum and minimum cost of
3-bit reversible circuits. The analysis shows better results than that found in
the literature for the lower bound of the cost. The analysis also shows that
there are 1960 universal reversible sub-libraries from the main NFT library.
... A set of reversible gates is needed to design reversible circuits. Group Theory has recently been employed as a tool to analyse reversible logic gates and investigate generators for the group of reversible gates [6], [7]. In this work, we study Cayley graphs associated to the Symmetric Group S 2 n in order to analyse reversible circuit synthesis methods. ...
We propose the theory of Cayley graphs as a framework to analyse gate counts
and quantum costs resulting from reversible circuit synthesis. Several methods
have been proposed in the reversible logic synthesis literature by considering
different libraries whose gates are associated to the generating sets of
certain Cayley graphs. In a Cayley graph, the distance between two vertices
corresponds to the optimal circuit size. The lower bound for the diameter of
Cayley graphs is also a lower bound for the worst case for any algorithm that
uses the corresponding gate library. In this paper, we study two Cayley graphs
on the Symmetric Group $S_{2^n}$: the first, denoted by $I_n$, is defined by a
generating set associated to generalized Toffoli gates; and the second, the
hypercube Cayley graph $H_n$, is defined by a generating set associated to
multiple-control Toffoli gates. Those two Cayley graphs have degree $n2^{n-1}$
and order $2^n!$. Maslov, Dueck and Miller proposed a reversible circuit
synthesis that we model by the Cayley graph $I_n$. We propose a synthesis
algorithm based on the Cayley graph $H_n$ with upper bound of $(n-1)2^{n}+1$
multiple-control Toffoli gates. In addition, the diameter of the Cayley graph
$H_n$ gives a lower bound of $n2^{n-1}$.
... In [13], an approach has been introduced that synthesizes the reversible function in a first step and then attempts to reduce the number of gates via template matching. Techniques from group theory are exploited in an algorithm proposed in [14]. The authors of [15] introduced a nonsearch-based algorithm running transformations to synthesize reversible functions with controlled-NOT (CNOT) gates. ...
Synthesis of reversible logic has become a very important research area in recent years. Applications can be found in the domain of low-power design, optical computing, and quantum computing. In the past, several approaches have been introduced that synthesize reversible networks with respect to a given function. Most of these methods only approximate a minimal network representation. In this paper, exact algorithms for the synthesis of multiple-control Toffoli networks are presented, i.e., algorithms that guarantee to find a network with the minimal number of gates. Our iterative algorithms formulate the synthesis problem as a sequence of decision problems. The decision problems are encoded as Boolean satisfiability (SAT) or SAT modulo theory (SMT) instances, respectively. As soon as one of these instances becomes satisfiable, a Toffoli network representation for the given function has been found. We show that choosing the encoding for synthesis is crucial for the resulting runtimes. Furthermore, we discuss the principal limits of the SAT and SMT approaches. To overcome these limits, we propose a method using problem-specific knowledge during synthesis. In addition, better embeddings to make irreversible functions reversible are considered. For the resulting synthesis problems, an improvement is presented that reduces the overall runtime by automatically setting the constant inputs to their optimal values. Experimental results on a large set of benchmarks demonstrate the differences between three exact synthesis algorithms. In addition, a comparison with the best-known heuristic results is provided. In summary, the results show that, for some benchmarks, the heuristic approaches have already found the minimal network, while for other benchmarks, significantly smaller networks exist.
... In [9] a method is introduced that synthesizes the reversible function in a first step and then based on transformations (using so called templates) a realization with fewer gates is computed. Techniques of group theory can also be used in the synthesis of reversible logic functions [17]. The authors of [15] introduced a non-search based algorithm running transformations to synthesize reversible functions with CNOT gates. ...
Synthesis of reversible logic has become a very impor- tant research area. In recent years several algorithms - heuristic as well as exact ones - have been introduced in this area. Typically, they use the specification of a reversible function in terms of a truth table as input. Here, the posi- tion of the outputs are fixed. However, in general it is irrel- evant, how the respective outputs are ordered. Thus, a syn- thesis methodology is proposed that determines for a given reversible function an equivalent circuit realization modulo output permutation. More precisely, the result of the syn- thesis process is a circuit realization whose output functions have been permuted in comparison to the original specifi- cation and the respective permutation vector. We show that this synthesis methodology may lead to significant smaller realizations. We apply Synthesis with Output Permutation (SWOP) to both, an exact and a heuristic synthesis algo- rithm. As our experiments show using the new synthesis paradigm leads to multiple control Toffoli networks that are smaller than the currently best known realizations.
... Although studies of reversible computing were initiated in the 1960s [17, 2] and a number of universal reversible logic gates have been proposed, general problems of universality of such gates have attracted the attention of researchers only very recently. Few papers have been devoted so far to universality of reversible gates and they consider almost exclusively binary gates [28, 7, 13]. In this paper, we are concerned entirely with universality of general multiple-valued reversible gates. ...
A set of p-valued logic gates (primitives) is called universal if an arbitrary p-valued logic function can be realized by a logic circuit built up from a finite number of gates belonging to this set. In this paper, we consider the problem of determining the number of universal single-gate libraries of p-valued reversible logic gates with two inputs and two outputs, under the assumption that constant signals can be applied to an arbitrary number of inputs. We have proved some properties of such gates and established that over 97% of ternary gates are universal.
In 2019, Yonghae Lee et al. combined the circuit implementation of the Harrow–Hassidim–Lloyd (HHL) algorithm with a classical computer, and designed a hybrid HHL algorithm to reduce experimental errors caused by decoherence and so on. However, the improvement is achieved only in the auxiliary quantum coding phase, and no quantum resource reduction is done on the quantum phase estimation and inverse quantum phase estimation stages. At the same time, the circuit improvement illustration on a 2×2\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$2\times 2$$\end{document} linear system just has the result and no specific process. In this paper, based on the idea of the hybrid HHL algorithm and a generic circuit of HHL algorithm, an improved circuit implementation of the HHL algorithm is proposed. The feasibility of the improved circuit implementation of the HHL algorithm is verified by IBM's qiskit. The improved circuit illustrations on a 4×4\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$4\times 4$$\end{document} linear system show that the improved circuit implementation of the HHL algorithm can effectively reduce quantum resources without losing the fidelity of the results. Thus the improved circuit implementation of the HHL algorithm can further avoid some result errors than the existing implementation methods.
With the unprecedented growth in VLSI technology in recent years, managing power dissipation has become a challenging task for many researchers. In this aspect, reversible logic emerges as one of the basis of future lossless computing system that promises zero energy dissipation, meanwhile classical physics cannot survive due to constant scaling of transistors and the exponential growth of transistor density in integrated circuits. It has applications in various domain such as low power VLSI, fault-tolerant designs, quantum computing, nanotechnology, DNA computing, optical computing, cryptography, and informatics. There are many existing works for the synthesis of reversible logic circuits; some are exact methods while others based on heuristic approaches. In this survey, we review a range of evolutionary computation approaches to the problem of optimal synthesis of reversible Logic—GA (Genetic Algorithm) based, PSO (Particle Swarm Optimization) based, ACO (Ant Colony Optimization)-based circuits where aim is to obtain a near-optimal solution by efficiently exploring the entire search space. This study provides an algorithmic review with comparative study on metaheuristic-based reversible logic synthesis methods proposed in existing literatures. Comparison of experimental results based on large number of benchmark circuits conform that evolutionary algorithms-based technique enables optimal or near-optimal solutions with lesser synthesis time.
The process that the quantum reversible circuit realizes the information transformation can be demonstrated by unitary matrix. Matrix can better reflect the quantum state evolution and the physical properties of the quantum computation. Elementary Matrix transformation based algorithm for 4-qubit reversible circuits synthesis is proposed in this paper. The algorithm skillfully uses the matrix representation and transformation of the quantum circuit and the circuit rules of the adjacent matrix to construct any 4-qubit circuit given permutation with lower cost.
Many universal reversible libraries of gates that contain more than one gate type have been proposed in the literature. Synthesis of reversible circuits is much simpler and more practical if a single gate type is used in the circuit construction. This paper proposes a novel reversible n-bit gate that is universal for reversible circuits synthesis. The proposed gate is extendable according to the number of bits in the circuit. The paper shows that the size of the synthesized circuits using the proposed gate is comparable with the size of the synthesized circuits using the known reversible libraries of gates.
We describe a scalable protocol for optimizing the quantum cost of the
3-bit reversible circuits built using NCT library. This technique takes into account
a group theory approach. The algorithm analyzes the equivalent quantum circuits
obtained by decomposing the reversible circuit to its elementary quantum gates and
then applies optimization rules to reduce the number of the used elementary quantum
gates. We apply the obtained algorithm using different quantum cost metrics that
compare favorably with the relevant methods.
With the growing emphasis on low-power design methodologies, and the result that theoretical zero power dissipation is possible only if computations are information lossless, design and synthesis of reversible logic circuits have become very important in recent years. Reversible logic circuits are also important in the context of quantum computing, where the basic operations are reversible in nature. Several synthesis methodologies for reversible circuits have been reported. Some of these methods are termed as exact, where the motivation is to get the minimum-gate realization for a given reversible function. These methods are computationally very intensive, and are able to synthesize only very small functions. There are other methods based on function transformations or higher-level representation of functions like binary decision diagrams or exclusive-or sum-of-products, that are able to handle much larger circuits without any guarantee of optimality or near-optimality. Design of exact synthesis algorithms is interesting in this context, because they set some kind of benchmarks against which other methods can be compared. This paper proposes an exact synthesis approach based on an iterative deepening version of the A* algorithm using the multiple-control Toffoli gate library. Experimental results are presented with comparisons with other exact and some heuristic based synthesis approaches.
This paper investigates a universal approach of synthesizing arbitrary ternary logic circuits in quantum computation based on the truth table technology. It takes into account of the relationship of classical logic and quantum logic circuits. By adding inputs with constant value and garbage outputs, the classical non-reversible logic can be transformed into reversible logic. Combined with group theory, it provides an algorithm using the ternary Swap gate, ternary NOT gate and ternary Toffoli gate library. Simultaneously, the main result shows that the numbers of qutrits we use are minimal compared to other methods. We also illustrate with two examples to test our approach.
This paper gives a brief overview of the current trends in reversible logic synthesis. The basic building block for reversible circuits considered here is the multiple-control Toffoli gate. Some approaches to synthesis are reviewed and challenges are explained. Since many practical functions are not reversible, they must be embedded into reversible ones, if they are to be implemented using reversible logic. The complexity of such embeddings is expounded. A two phase synthesis is described were particular attention is devoted to the optimization phase via template matching.
Reversible circuits play an important role in quantum computation. The realization of reversible quantum circuits is required for any quantum computer to be universal. This paper1 studies the realization and synthesis problem of reversible circuits. Using group theory, we present two sets of new 3-bit reversible logic gates, which included g1g2g3 and nine complex gates, respectively. It is shown that any 3-bit reversible logic circuit is realizable by cascading NOT and Feynman gates, and at most one instance of our proposed gates. Given any n-bit reversible function, there are N distinct input patterns different from their corresponding outputs, where N ≤ 2n, and the other (2n - N) input patterns will be the same as their outputs. According to a synthesis example, it demonstrates that the main results are constructive and practical than others.
In this paper, we investigate the synthesis of ternary reversible circuits in the absence of ancilla bits. We demonstrated that 2-qudit ternary Swap, NOT and 1-controlled-NOT gates are universal for realization of arbitrary ternary n-qudit reversible circuits without ancilla qudits, and all even ternary n-qudit reversible circuits can be constructed by ternary NOT and ternary 1-controlled-NOT gates without ancilla qudits. The realization approach is constructive. This result is significantly different from the binary case.
Because of recent nano-technological advances, nano-structured systems have become highly ordered, making it quantum computing schemas possible. We propose an approach to optimally synthesise quantum circuits from non-permutative quantum gates such as controlled-square-root-of-not (i.e., controlled-V). Our approach reduces the synthesis problem to multiple-valued optimisation and uses group theory. We devise a novel technique that transforms the quantum logic synthesis problem from a multi-valued constrained optimisation problem to a permutable representation. The transformation enables us to use group theory to exploit the symmetric properties of the synthesis problem. Assuming a cost of one for each two-qubit gate, we found all reversible circuits with quantum costs of 4, 5, 6, etc., and give another algorithm to realise these reversible circuits with quantum gates. The approach can be used for both binary permutative deterministic circuits and probabilistic circuits such as controlled random-number generators and hidden Markov models.
We introduce a Reversible Programmable Gate Array (RPGA) based on regular structure to realize binary functions in reversible logic. This structure, called a 2 * 2 Net Structure, allows for more efficient realization of symmetric functions than the methods shown by previous authors. In addition, it realizes many non-symmetric functions even without variable repetition. Our synthesis method to RPGAs allows to realize arbitrary symmetric function in a completely regular structure of reversible gates with smaller "garbage" than the previously presented papers. Because every Boolean function is symmetrizable by repeating input variables, our method is applicable to arbitrary multi-input, multi-output Boolean functions and realizes such arbitrary function in a circuit with a relatively small number of garbage gate outputs. The method can be also used in classical logic. Its advantages in terms of numbers of gates and inputs/outputs are especially seen for symmetric or incompletely specified functions with many outputs.
Ultra-low power dissipation for nanoscale circuits
and future technologies such as quantum computing require
reversible logic. Existing methods of reversible logic synthesis
attempt to minimize gate count, quantum cost, garbage count
and try to achieve scalability for large Boolean functions.
Several notable heuristics for reversible logic synthesis employ
a method based on repeated transformation, demonstrating
excellent performance compared to available optimal results. In
this paper, we suggest two novel techniques to the transformationbased
synthesis flow for improving synthesis outcome. The first
technique is based on properties of Boolean functions and the
second technique incorporates generalized Fredkin gates during
synthesis flow. We present theoretical results and experimental
evidence in support of our strategies.
The (2w)! reversible logic gates of width w, i.e. reversible logic gates with w inputs and w outputs, together with the action of cascading, form a group R. We define a subgroup K, consisting of the SWITCHED gates. There are [(2w−1)!]2 such gates. They partition the group R into 2w−1 + 1 double cosets. This allows us to decompose an arbitrary reversible gate into the cascade of three gates: a SWITCHED gate, an upside-down simple control gate and a second SWITCHED gate. We present an algorithm to perform this factorization, and thus provide a method of implementing an arbitrary reversible gate into hardware. The algorithm can be used to automate the implementation of a reversible function in future (c-MOS) technologies, realizing low-cost computing.
We present fast algorithms to synthesize exact minimal reversible circuits for various types of gate and cost. By reducing
reversible logic synthesis problems to permutation group problems, we use the powerful algebraic software GAP to solve such
problems. Our approach can minimize for arbitrary cost functions of gates. In addition, we show that Peres gates are a better
choice than the standard Toffoli gates in libraries of universal reversible gates.
This paper presents a constructive synthesis algorithm for any n-qubit reversible function. Given any n-qubit reversible function, there are N distinct input patterns different from their corresponding outputs, where N les 2<sup>n</sup>, and the other (2<sup>n</sup> - N) input patterns will be the same as their outputs. We show that this circuit can be synthesized by at most 2nldrN '(n - 1)'-CNOT gates and 4n<sup>2</sup> ldr N NOT gates. The time complexity of our algorithm has asymptotic upper bound O(n ldr 4<sup>n</sup>). The space complexity of our synthesis algorithm is also O(n ldr 2<sup>n</sup>). The computational complexity of our synthesis algorithm is exponentially lower than the complexity of breadth-first search based synthesis algorithm.
Reversible logic gates of a certain logic width w form a group (isomorphic to the symmetric group of order (2 w )!). Study of the subgroups of this group both teaches us a lot about properties of reversible gates and guides us to synthesize particular circuits. After design, circuits are implemented in prototype silicon chips.
Reversible quantum circuits are a necessary subclass of quantum computation and its realization is required for any quantum computer to be universal. This paper investigates how to synthesis of arbitrary ternary non-reversible logic circuits by adding inputs with constant value and garbage outputs. Group theory has been also used to solve the synthesis of reversible logic circuits. Our algorithm uses the SNT (ternary Swap gate, ternary NOT gate, ternary Toffoli gate) library, by reducing the ternary non-reversible logic circuit synthesis problem to group theory representation. The main result shows the relationship of ternary non-reversible logic circuits and the reversible circuits. The realization approach is constructive and can be further used to develop software for synthesis of arbitrary d-level circuits. This result is significantly different from the binary non-reversible logic circuits.
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