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Novel Floating General Element Simulators Using CBTA
Abstract and Figures
In this study, a novel floating frequency dependent
negative resistor (FDNR), floating inductor, floating capacitor
and floating resistor simulator circuit employing two
CBTAs and three passive components is proposed. The presented
circuit can realize floating FDNR, inductor, capacitor
or resistor depending on the passive component selection.
Since the passive elements are all grounded, this circuit is
suitable for fully integrated circuit design. The circuit does
not require any component matching conditions, and it has
a good sensitivity performance with respect to tracking errors.
Moreover, the proposed FDNR, inductance, capacitor
and resistor simulator can be tuned electronically by changing
the biasing current of the CBTA or can be controlled
through the grounded resistor or capacitor. The high-order
frequency dependent element simulator circuit is also presented.
Depending on the passive component selection, it
realizes high-order floating circuit defining as V(s) = snAI(s)
or V(s) = snBI(s). The proposed floating FDNR simulator
circuit and floating high-order frequency dependent element
simulator circuit are demonstrated by using SPICE simulation
for 0.25 μm, level 7, TSMC CMOS technology parameters.
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... Capacitance multiplier circuits have also been realized in the literature by utilizing several active blocks such as OTA [36], Op-amp [37], CBTA [38], CCTA [39], CDTA [40], CCDDCC [41], CFTA [42,43], CFOA [44], DVCC [45,46], DVCCTA [47], CCII [48][49][50][51][52][53][54][55][56][57], CCII with OTA [58,59], VCG-CCII [60], DXCCII [61], CFOA [23,25,[62][63][64][65][66][67][68][69], ICFOA [70],VCII [71], and VDGA [72]. Considering the historical development of the capacitance multiplier, it may be more frequently used and CFO of CCII-based circuits. ...
... An Op-Amp based Miller Capacitor multiplier is proposed in [37]. In [38], two CBTAs and three passive components were used to implement a capacitor multiplier. In the studies conducted up to this time, the design has been designed for capacitor multiplier circuits using either more than one active element [41,42,45,46,58] or too many (three or more) passive elements [37,38,40,45,46]. ...
... In [38], two CBTAs and three passive components were used to implement a capacitor multiplier. In the studies conducted up to this time, the design has been designed for capacitor multiplier circuits using either more than one active element [41,42,45,46,58] or too many (three or more) passive elements [37,38,40,45,46]. In this study, only one CFTA (commercially available) and two passive elements (R and C) were designed. ...
Inductance simulators and capacitor multipliers can be used to implement several electronic devices such as active filters, oscillators, cancellation of parasitic elements and phase shifting circuits. In this work, grounded inductance simulators (GISs) and grounded capacitor multipliers (GCMs) employing only one active component Current Follower Transconductance Amplifier (CFTA) and two passive elements (R and C) have been proposed. The aim of this work is to implement inductance simulators and capacitor multipliers using the minimum number of active elements which commercially available. The performance of the proposed circuits verified by using the LTSpice. To support the theoretical study, all simulation results are provided.
... These devices allow the adjustment of the multiplication or conversion constant; thus, they also ensure electronic adjustability. They are known as impedance multipliers, intended especially for large-range variation in capacitance values (see, for example, [5][6][7][8][9][10] and references cited therein) or inductance values converted from capacitance values (examples available in [11][12][13][14][15][16][17][18][19][20][21][22][23][24] and references cited therein). These impedance multipliers and converters are very popular for so-called fractional-order designs [25]. ...
... Therefore, the final devices are significantly smaller (typically comparable to a package of standard 0.5 W or smaller resistors fabricated in through-hole assembling technology) than wirebased bulky and heavy coils. Unfortunately, standardization of the usage of real inductors in common practice in electronically adjustable systems has several issues, namely (a) the absence of the electronic adjustability of inductance values, (b) the real serial resistance of fabricated inductors (the full inductance modeling involves also other parasitic elements [3], but serial resistance (R S in Figures 1-3) is the most significant issue [14,22]) and (c) if active inductors based on impedance simulators (converters) are used, there is an identical problem with serial resistance [11][12][13][14][15][16][17][18][19][20][21][22][23][24][25]. where, when particular feature is available, the numerator equals 1; if not, 0 is inserted. ...
This work presents a novel methodology to adjust the inductance of real coils (electronically) and to cancel out serial losses (up to tens or even hundreds of Ohms in practice) electronically. This is important in various fields of electromagnetic sensors (inductive sensors), energy harvesting, measurement and especially in the instrumentation of various devices. State-of-the-art methods do not solve the problem of cancellation of real serial resistance, which is the most important parasitic feature in low- and middle-frequency bands. In this case, the employment of serial negative resistance is not possible due to stability issues. To solve this issue, two solutions allowing the cancellation of serial resistance by the value of the passive element and an electronically adjustable parameter are introduced. The operational ranges are between 0.1 and 1 mH and 0.1 and 10 mH, valid in bandwidths from hundreds of Hz up to hundreds of kHz. The proposed concepts are experimentally tested in two applications: an electronically tunable oscillator of LC type and an electronically tunable band-pass RLC filter. The presented methodology offers significant improvements in the process of circuit design employing inductors and can be beneficially used for on-chip design, where serial resistance issues can be very significant.
... This circuit facilitates lossless floating inductance, capacitance, and resistance simulation circuits with electronic tunability. Furthermore, in Ayten et al., 19 floating FDNR, inductor, capacitor, and resistor simulator circuits employing two CBTAs and three admittances are discussed. Moonmuang et al. 20 explore two floating-type series and parallel immittance simulator circuits utilizing two VDTAs and two impedances. ...
A new synthetic floating simulator topology is proposed which realizes lossy parallel inductance (R-L), lossy parallel capacitance (R-C), lossy parallel C-D, and lossless floating capacitance multiplier (FCM) circuits using only three current feedback operational amplifiers (CFOA) as active elements and three impedances. In all the presented circuits, the value of L, C, and D is independently controllable through a single resistance without requiring any matching condition for passive elements. A novel feature of the proposed circuit involves a straightforward adjustment in the CFOA connections, allowing the circuit to function as either a floating lossless immittance simulator or a floating series-type lossy immittance simulator. Various application examples of the presented circuits such as lead compensator, lag compensator, first-order high-pass filter, and fourth-order Butterworth filter are also given to justify the theoretical analysis. To validate the workability of the proposed circuits, several analyses are conducted, including frequency analysis, transient analysis, Monte-Carlo analysis, and temperature analysis, using the macro-model of AD844 in the SPICE simulation tool. Experimental results of the parallel R-L simulator and application examples are also provided using commercially available IC AD844-type integrated CFOAs.
... Early designs using GIC-based inductances and FDNRs were based on operational amplifiers, resistors and capacitors [2,9,17,21,29,31,[37][38][39][40]42] for use in second-order and higher-order filter designs. Subsequent grounded and floating FDNR implementations (in some cases as series resonators) were not mimicking the GIC but were synthesized directly to realize some using only one opamp [33], and some employing OTA (operational transconductance amplifier) [5,19,22,27,34]. Switched-capacitor (SC)-based implementations were also investigated [13,16,51]. ...
In this paper, we analyze the effect of opamp finite gain-bandwidth-product (GBW) on the performance of generalized impedance converter (GIC)-based frequency-dependent negative resistance (FDNR) realizations. Their use for realizing a resonator as well as second-order low-pass filter and a high-order filter is also investigated. The effect of finite GBW of the opamps on the pole-frequency, pole-Q and transmission zeroes of resonators and low-pass filters is presented together with simulation results.
... In analog circuits, designers are interested to obtain the high value of capacitors using active blocks since the active component's size has been reduced significantly with technology advancement in comparison of passive components. A number of capacitance multiplier circuits have been implemented in the past using different active components like second-generation current controlled current conveyor (CCCII) [1], current feedback operational amplifier (CFOA) [2,21,31,34,42], operational transconductance amplifier (OTA) [3,4,24], secondgeneration current conveyor (CCII) [3,4,6,13,23], current buffered transconductance amplifier (CBTA) [8], current differencing transconductance amplifier (CDTA) [12], current operational amplifier (COA) [23], dual-X second-generation current conveyor (DXCCII) [29], current feedback transconductance amplifier (CFTA) [30], thirdgeneration current conveyor transconductance amplifier (CCIIITA) [33], electronically controllable second-generation current conveyor (ECCII) [36], second-generation voltage conveyor (VCII) [37,38], differential voltage current conveyor transconductance amplifier (DVCCTA) [40], fully balanced voltage differencing buffered amplifier (FB-VDBA) [41], inverting second generation current conveyor (ICCII) [43], differential voltage current conveyor (DVCC) [44] and inverting current feedback operational amplifier (ICFOA) [45]. The brief summary of recently developed capacitance multiplier circuits is given as follows. ...
A new circuit realization of capacitance multiplier based on active block, current follower differential input transconductance amplifier is introduced in the paper. The circuit employs one current follower differential input transconductance amplifier, two resistors and one capacitor. The proposed capacitance multiplier has a good range of multiplication factor (up to 30). Multiplication factor of the proposed circuit is adjustable by external resistor and by bias current as well. The comprehensive study of the proposed circuit including non-idealities and parasitic element effects has been carried out. The proposed capacitance multiplier circuit is simulated on Cadence Virtuoso using 0.18 μm gpdk CMOS technology and post layout simulation results are demonstrated to validate the working of the proposed circuit. The layout of the used active block occupies an area of 26.26 μm × 28.79 μm. The proposed circuit shows good performance against transistors mismatch, process and temperature variations. Moreover, the experimental results of the circuit using off-the-shelf integrated circuits are also carried out to demonstrate its practicality. In the last, the transpose structure of the proposed capacitance multiplier circuit is also explored. The obtained transposed structure is realized using active element namely, voltage differencing buffered amplifier.
... Gyrator, Generalized Impedance Converter (GIC), and Negative Impedance Converter (NIC) are also used for tuning of Capacitance multiplier (C multiplier) circuit. Such C multiplier circuits have been deployed for appropriate tuning of filters [1], [2], [3], [4], [5], [6], [7], [8], [9], [10], [11], [12] and [13] oscillators [14], PLLs [15] and series resonators [16]. Commercially available active elements such as Operational Transconductance Amplifier (OTA) [17], [18] and [19] and Op-amp [1] and [15] and AD 844 (CFOA) [20], and [21], [22] and [23] based C multipliers are reported in the literature. ...
This paper presents a method for capacitance scaling of Fractional Capacitor (FC) which is implemented using Current Feedback Operational Amplifiers (CFOA) based Capacitance Multipliers (C Multipliers). The circuit facilitates the change in FC value without changing component values in R-C network used for FC modelling or fabricating a new FC. The performance of the proposed circuit is examined for non ideal effects of CFOA. Effective impedance of scaled FC is examined through MATLAB simulations. The functionality of the realized scalers is verified using SPICE simulations where the FC is modelled using domino RC ladder network. Simulation results for impedance magnitude and phase responses are presented for various scaling factors and are compared with theoretical counterparts. The circuit application of proposed FC scaler is demonstrated through implementation of fractional order lossy and lossless integrators; and may be extended to fractional order filters, oscillators, controllers etc.
A new active building block namely, subtractor connected first-generation current conveyor (S-CCI) is introduced in this paper. A simulated floating inductor (SFI) and two new quadrature oscillators (QOs) employing only one S-CCI are introduced as application examples. The introduced SFI employs two resistors with a single matching requirement and a grounded capacitor. Each of the introduced QOs has one grounded resistor, one floating resistor, and two grounded capacitors without any matching problems. Non-ideality analyses are performed. Furthermore, a third-order filter application is given. A layout of the S-CCI in
$0.18 \mu \text{m}$
technology occupying the area of about
$71\,\,\mu \text{m}\,\,\times 44\,\,\mu \text{m}$
is given. Also, numerous post layout simulations based on the SPICE program are accomplished. Moreover, several experiments are realized to confirm the theory.
In this communication, a new capacitance multiplier configuration employing a single operational transresistance amplifier (OTRA) has been presented. The proposed circuit is capable of providing both positive and negative multiplication factors depending on the value of resistances used. Moreover, the proposed circuit is made electronically tunable by implementing the resistors using identical MOS transistors operating in triode region. Non-ideal analysis has also been carried out to justify the theoretical propositions. The validation of the proposed capacitance multiplier structure has been done through PSPICE simulations using CMOS OTRA implemented with 0.18 µm TSMC technology parameters. Sample experimental results have also been included using off-the-shelf available IC AD844 type CFOA IC.
The advantages of Floating Serial RL simulators in ladder filter implementations are discussed. Floating Serial RL simulators can be used in ladder filter applications, or in the implementation of the chaotic circuits, and also in the realization of serial resonance circuits. The ladder filters are the circuits that show very low sensitivity to component tolerances and they also cannot be used because conveniently sized inductors are components that are not suitable for integrated circuits, hence the methods to simulate the behavior of lossless ladder filter are important. Floating lossy inductance simulators are more useful as compared to lossless ones with respect to the number of components.
Active RC filters designed using non-cascade filter synthesis method exhibit some advantages — namely low sensitivities. However these parameters are paid on the other hand due to the necessity to use more complicated building blocks which should be able to realize a circuit simulation of required ideal RLC ladder prototype elements (e.g., ideal inductors). That fact unfortunately brings higher filter sensitivities to real parasitic properties of active function blocks. Usage of new modern active elements (operational amplifiers with high GBW) and possibilities of goal-directed lossy RLC ladder prototypes enables to design optimized ARC filter realizations with simple and economic active building blocks. These simple grounded active selective blocks working only with one active element enable in present time to design active filters with optimized parameters and minimized influence of real active elements for frequency range up 1 MHz. In paper here are some parameters of simple and economic building selective blocks with modern active elements at higher frequencies discussed and briefly new possibilities of ARC lowpass filter optimization in some practical examples presented.
In this study, six grounded inductance simulator circuits are presented including additional useful features in comparison to previous dual-X current conveyor (DXCCII) based implementations. To demonstrate the performance and usefulness of the presented circuits, one of them is used to construct a fifth order Butterworth highpass filter and a current-mode multifunction filter as application examples. Simulation results are given to confirm the theoretical analysis. The derived DXCCII and its applications are simulated using CMOS 0.35 μm technology.
This paper proposes a generalised impedance convertor using dual-output secondgeneration current conveyors (DO-CCIIs) that can simulate floating inductance, capacitive multiplier and frequency dependent negative resistor (FDNR). The proposed circuit employs only two DO-CCIIs and three passive elements. The circuit is canonic/minimal in the number of passive components and can be easily modified to simulate voltage tunable floating impedances. PSPICE simulation results are included that validate the working of the circuit.
In this article, a general all-pole current transfer function synthesis procedure using current backward transconductance amplifiers (CBTAs) is proposed. The proposed configuration uses n current backward transconductance amplifiers and n grounded capacitors as the only type of passive elements. The circuit is eligible to realize any all-pole transfer characteristics with a given strictly Hurwitz (stable) denominator polynomial. Further, it is straightforward to find the values of the passive elements from the coefficients of this polynomial by using the Routh–Hurwitz algorithm as in the realization of a two-element kind passive network synthesis. In this sense and as far as the author's knowledge, it is the only active structure that can be synthesized like a passive two-element kind Cauer circuit. The simulations that are performed using PSPICE exhibit satisfactory results coherent with the theory. Copyright © 2011 John Wiley & Sons, Ltd.
A new floating FDNR circuit is proposed using two differential voltage current conveyors and a minimum number of passive elements. Since passive elements are all grounded, this circuit is suitable for fully integrated circuit design. Moreover it does not require any element matching condition. It has a good sensitivity performance due to tracking errors. Finally the proposed FDNR circuit can be controlled through a grounded resistor.
In this study, a novel immittance simulator circuit is proposed. The proposed circuit can simulate any one of the floating positive or negative inductor simulator (±L), positive or negative capacitor simulator (±C) and positive or negative resistor simulator (±R). It uses only one current backward transconductance amplifier (CBTA) and two grounded passive components. The proposed simulator can be tuned electronically by changing the transconductance value of the CBTA. Moreover, the circuit does not require any conditions of component matching. It has a good sensitivity performance with respect to the tracking errors and the passive components. The performance of the proposed immittance simulator is demonstrated on the fourth-order voltage- and current-mode band-pass filters by using Pspice simulations based on the 0.25μm TSMC level-7 CMOS technology parameters.
In this article, a novel simulator circuit using two differential voltage current conveyors (DVCCs) and three grounded passive components is suggested. Depending on the passive component selection, the developed topology can realise synthetic floating inductors, floating capacitors and floating frequency dependent negative resistors. It does not suffer from passive component matching constraints. As an application example of the proposed simulation circuit, a voltage-mode multifunction filter for simultaneously providing low-pass, band-pass, high-pass and notch responses from the same structure is given. The suggested filter example is composed of only grounded passive components without requiring critical matching conditions, which is suitable for integration. Further, signal limitations of the simulator circuits are discussed. In order to show the performance of the introduced circuit and verify the claimed ideas, we perform simulations using SPICE.
Some new current feedback amplifier (CFA)-based active Resistance- Capacitance (RC) circuits are presented for the realization of an ideal grounded supercapacitor (Y(s)∈= ∈s2D) type Frequency Dependent Negative Resistance (FDNR). The D-element is then resonated with additional RC sections to derive multifilter function circuits. The filter function have been tested for continuous resonant frequency (f0) tunability in a range of 30∈KHz∈-∈f0∈-∈300∈KHz with high quality (1∈<∈ Q∈<∈10) response. Analysis assuming non-ideal CFA devices with finite port errors indicate that the circuits are practically active-insensitive. Experimental verification of the circuit characteristics had been carried out with both hardware implementation using Analog Devices (AD) 844 CFA-chip and by PSPICE macromodel simulation.
