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Abstract—The main function of the grid-connected
converter in many applications is to control the DC-link
voltage with high performance, i.e. strong disturbance
rejection capability and good dynamic response. Take the
grid connected PWM rectifier of a motor drive system as an
example, good disturbance rejection capability is essential
for the DC-link voltage control to address the varying loads
on the motor side, and the dynamic process of the DC-link
voltage control is preferred to be fast and overshoot-free, so
as to adaptively adjust the DC-link voltage according to the
motor speed and reduce the switching losses. However, the
performance of the conventional PI-based DC-link voltage
control is not always satisfying and can be further improved.
In this paper, the generalized predictive control (GPC)
method is applied to the DC-link voltage control of a grid-
connected converter for the first time, which can provide
both good disturbance rejection capability and satisfying
dynamic performance. Moreover, stability analysis of the
proposed GPC-based DC-link voltage control strategy is
theoretically studied, and a parameter tuning guideline is
provided. The effectiveness and advantages of the proposed
method are validated with experimental results.
Index terms— DC-link voltage, generalized predictive
control (GPC), Grid-connected converter.
I. INTRODUCTION
Special Issue Commemorating 40 years of WEMPEC 2020
Fellow, IEEE
II. MATHEMATICAL MODEL
+
-
C
Grid
VSC
g
L
a
i
b
i
c
i
DC
i
DC
V
L
i
CAP
i
a
v
b
v
c
v
g
R
Load
u
DC DC L
dV i i
dt C
-
=
Vi
DCL
C
( 1) ( ) ( ) / ( ) /
DC DC DC s L s
V k V k i k T C i k T C + = + -
Ts
k
1
dq dq g
dq dq dq
g g g
R
dj
dt L L L
= - - -
uv
i i i
uv
dqdq
ω
Lg Rg
33
( ) ( )
22
DC DC d d q q d d q q
V i v i v i u i u i= + +
III. PROPOSED GPC-BASED DC-LINK VOLTAGE CONTROL
AND IMPLEMENTATION
A. General Structure Introduction
d
q
B. GPC for DC-Link Voltage Control
()
( 1) ( )
()
( 1) ( ) /
10 ()
( 1) 1 1 ( ) /
()
( ) [0 1] ()
DC DC s DC
DC DC s
mm
mm
DC
DC DC
m
hk
kk
yk
V k V k T C ik
V k V k T C
Vk
Vk Vk
+
+
= +
+
=
AB
xx
C
xmyh
Am Bm Cm
N
()
mk= + YΩx F H
( 1)
( 2)
()
yk
yk
y k N
+
+
=
+
Y
()
( 1)
( 1)
hk
hk
h k N
+
=
+ -
H
mm
2
mm
mm
N
=
CA
CA
Ω
CA
mm
mmm mm
12
m m m m m m m m
00
NN--
=
CB
C A B C B
F
C A B C A B C B
* T * T
min ( ) ( )J
= - - +
HY Y Q Y Y H R H
* * * * T
=[ ]
DC DC DC
V V VY
QdiagQQQNRdiagRRRN
Q Qkq
RRkrR_stepk
R_step
T 1 T *
( ) [ ( )]
mk
-
= + -H F QF R F Q Y Ωx
*1
1
1
DC
iz-
=
-WH
1 0 0
N
=W
C. AC Current Reference Calculation
d
q
3
2
DC DC d d
V i u i
d
*
*23
DC DC
dd
Vi
iu
=
D. Current Constraint
d
d
d
__d low d d up
i i i
__
*
33
22
d d low d d up
DC
DC DC
u i u i
i
VV
E. GPC for AC Current Control
*
DC
V
DC
V
+-
Vdc
PI
converter DC
bus
DC
V
*
d
i
*
q
i
id
PI
dq
i
*
dq
v
PWM
iq
PI
+-
dq
i
×
÷
2/3
DC
V
×
d
u
*
DC
i
Vdc
GPC
*
DC
V
DC
V
×
÷
2/3
converter DC
bus
DC
V
DC
V
×
d
u
*
d
i
*
q
i
*
dq
i
idq
GPC
dq
i
dq
i
*
dq
v
*
DC
i
PWM
1
1
1
1
( 1) ( )
1 0 0
( 1) ( )
1 0 0
( 1) ( ) /
/
( 1) ( )
1 1 0
( 1) ( )
1 0 1
s
s
dd
s
qq
s s s
s s s
dd
sm
dd
s
mm
s
m
kk
R
L
i k i k
R
i k i k
L T L
R T L
i k i k
L
i k i k
R
L
+
-
+
--
+
=+
+
-
+
--
B
xx
A
()
()
()
()
()
()
() 0 0 1 0
( ) 0 0 0 1 ()
()
d
q
d
q
d
dd
md
hk
yk
vk
vk
ik
ik
ik
ik ik
ik
=
C
* * * * * * * T
=[ ]
d q d q d q
i i i i i iY
QjQjdQjqRjRjdRjq
dq
*
1
*1
1
d
q
v
z
v-
=
-
WH
1 0 0
0 1 0
N
=
W
IV. STABILITY ANALYSIS AND DESIGN REMARKS
A. Transfer Functions
d
()k
T
2 2 2 2[ ( ) ( )]
N
= M I I,
is used
to exploit the current reference to the whole prediction horizon.
T 1 T
( + )-
=T F QF R F Q
is obtained from (8), and all the
other matrices are defined previously in Section II
1
() ()
open mm
zz-
-G=I A B WTΩ
1
*1
()
()
() ( ) ( )
mm
closed m
mm
z
yk
zy k z
-
-
-
-
I A B WT
G = = C M
I + I A B WTΩ
11
,1
(1 )( )
()
() () ()
mm
ym
mm
zz
yk
zkz
--
-
--
-
I A B
G = = C I + I A B WTΩ
B. Stability Analysis
1
() 0
mm
z-
-
=
det I + I A B WTΩ
N
*()yk
()uk
1
()
mm
z-
-I A B
()
m
xk
m
C
()yk
Ω
W
M
+-
T
U
GPC
PMSM
1d
Nd d
1Nd
Nd Nd
d Nd
1Nd
1d
2dd
21d
1d
2dd
2Nd d
Disturbance
1
1z-
-
()k
Q
R
R RdiagR
RRNRkrR_stepkr
R_step
r
rR_step
R_step
R_step
C
C
C
r
R_step
R_step
Rg
Lg
N
r
N
N
r R_step
R_step
R_step
N r
R_step
N r
R_step
Parameters
Impacts
Prediction
horizon N
Large
Good stability
Small
Tend to be critically stable (resonance)
Weighting
factor r
Large
Tend to be critically stable (resonance)
Small
Good stability
Coefficient
R_step
Large
Outer loop: critically stable (resonance)
Inner loop: little impact
Small
Outer loop: unstable
Inner loop: little impact
Plant parameter
mismatch
Little impact
Green: starting points
Blue: ending points
Red: other points
Zoom in
Prediction horizon N increases from 10 to 200
Imag
Real
Weighting factor r increases from 1e-2 to 3.48e7
Green: starting points
Blue: ending points
Red: other points
Zoom in
Imag
Real
Coefficient R_step increases from 0.5 to 1.5
R_step=0.5
R_step=0.55 R_step=0.6
R_step=0.65
Green: starting points
Blue: ending points
Red: other points
Zoom in
Imag
Real
Estimated C increases from 1.2 mF to 46mF
Green: starting points
Blue: ending points
Red: other points
Zoom in
Imag
Real
Prediction horizon N increases from 1 to 20
Green: starting points
Blue: ending points
Red: other points
Imag
Real
Green: starting points
Blue: ending points
Red: other points
Weighting factor r increases from 1e-7 to 348
Imag
Real
Green: starting points
Blue: ending points
Red: other points
Coefficient R_step increases from 0.2 to 1.2
Imag
Real
Estimated Rg increases from 0.2 Ω to 7.67 Ω
Green: starting points
Blue: ending points
Red: other points
Imag
Real
Estimated Lg increases from 4 mH to 153.4 mH
Green: starting points
Blue: ending points
Red: other points
Imag
Real
C. Disturbance Rejection Analysis
ddd-
d-
qq
N
N
N
r
R_step
R_step
N
N
rR_step
N r
R_step
N r
R_step
D. Parameter Design Remarks
N
rR_step
Gclosedz
stepGclosedz
N
N
Vdc
N
N
N
N
-40
-20
0
20
40
100101102103
Frequency (Hz)
Phase (deg) Magnitude (dB)
-180
-90
0
90
180
N increases from 10
to 20, 50, 100, 200
N increases from 10 to
20, 50, 100, 200
-40
-20
0
20
40
100101102103
-180
-90
0
90
180
Phase (deg) Magnitude (dB)
Frequency (Hz)
r increases from 1e1 to 1e2, 1e3,
1e4 and 1e5
r increases from 1e1 to 1e2,
1e3, 1e4 and 1e5
-60
-40
-20
0
20
40
100101102103
-180
-90
0
90
180
Frequency (Hz)
Phase (deg) Magnitude (dB)
R_step decreases from 1.1
to 1, 0.95, 0.9, and 0.8
-40
-20
0
20
40
100101102103
-180
-90
0
90
180
Frequency (Hz)
Phase (deg) Magnitude (dB)
Estimated C increases from
3 to 4.5, 6, 9 and 12 mF
Estimated C increases from
3 to 4.5, 6, 9 and 12 mF
-80
-60
-40
-20
0
100101102103
0
90
180
270
360
Frequency (Hz)
Phase (deg) Magnitude (dB)
N increases from 1 to
2, 5, 10, 20
N increases from 1 to
2, 5, 10, 20
-80
-60
-40
-20
0
100101102103
0
90
180
270
360
Phase (deg) Magnitude (dB)
Frequency (Hz)
r increases from 1e-5 to 1e-4,
1e-3, 1e-2 and 1e-1
r increases from 1e-5 to 1e-4,
1e-3, 1e-2 and 1e-1
-100
-80
-60
-40
-20
100101102103
0
90
180
270
360
Frequency (Hz)
Magnitude (dB)
Phase (deg)
R_step decreases from 1.2
to 1, 0.8, 0.6, and 0.4
R_step decreases from
1.2 to 1, 0.8, 0.6, and 0.4
-80
-60
-40
-20
0
100101102103
0
90
180
270
360
Frequency (Hz)
Estimated Rg increases from
0.2 to 0.5, 1, 2 and 5 mF
Phase (deg) Magnitude (dB)
-80
-60
-40
-20
100101102103
0
90
180
270
360
Magnitude (dB)
Phase (deg)
Frequency (Hz)
Estimated Lg increases from
5 to 10, 20, 40 and 80 mF
Estimated Lg increases from
5 to 10, 20, 40 and 80 mF
N
rR_step
r
r
r
r
r
r
R_step
R_step
R_step
N
N r
R_stepNr
R_step
NrR_step
r NR_step
R_stepNr
V. EXPERIMENTAL VALIDATION
d
In the experiments, the following three indexes are mainly
concerned: the step response speed, the overshoot, the peak
and duration of the transient processes caused by disturbances.
Parameters
Values
DC capacitance
Line inductance
0.02 H
Line resistance
Sampling frequency
5 kHz
Grid voltage (phase to phase, peak)
40 V
Fixed DC load resistance
1
Switchable DC load resistance
3
A. Dynamic Performance Test
N=10 N=20 N=50
N=100 N=200
Vdc (V)
Time (s)
r=1e5 r=1e4 r=1e3
r=1e2 r=1e1
Vdc (V)
Time (s)
R_step=1.1 R_step=1 R_step=0.95
R_step=0.9 R_step=0.8
Vdc (V)
Time (s)
Preliminary selection of N
(as large as the processor allows)
Switching
frequency Computation
capability
Select weighting factor r
(balance between response speed and
noise rejection)
Select coefficient R_step
(fine-tune the step response, remove
overshoot, should not be too small)
Final selection of N
(reduce N until system performance
starts to be deteriorated)
Converter PC host
Adjustable
Transformer Dspace
DC loads
d
B. Disturbance Rejection Test
d
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
-4
-2
0
2
4
0 0.5 1 1.5 2
iabc (A)
Time (s)
ia ib ic
-2
0
2
4
00.5 1 1.5 2
idq (A)
Time (s)
id iq
0.18 s
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.1 s
-4
-2
0
2
4
00.5 11.5 2
iabc (A)
Time (s)
ia ib ic
-2
0
2
4
00.5 11.5 2
idq (A)
Time (s)
id iq
98
99
100
101
102
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.08 s
1.3 V
-4
-2
0
2
4
0 0.5 1 1.5 2
iabc (A)
Time (s)
ia ib ic
-2
0
2
4
0 0.5 1 1.5 2
idq (A)
Time (s)
id iq
98
99
100
101
102
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.08 s
1.3 V
-4
-2
0
2
4
0 0.5 1 1.5 2
iabc (A)
Time (s)
ia ib ic
-2
0
2
4
0 0.5 1 1.5 2
idq (A)
Time (s)
id iq
C. Comparison with Cascaded PI
Kp
Ki Kp Ki
d
Performance indexes
GPC
PI
Overshoot
Vdc ↑
0 V
1 V
Vdc ↓
0 V
0 V
Response
speed
Vdc ↑
0.13 s
0.13 s
Vdc ↓
0.1 s
0.15 s
Disturbance
rejection
Transient
peak
DC Load ↑
1.2 V
2.9 V
DC Load ↓
1.2 V
2.9 V
Vgrid ↑
0 V
2.5 V
Vgrid ↓
0 V
1.5 V
Transient
duration
DC Load ↑
0.08 s
0.4 s
DC Load ↓
0.08 s
0.4 s
Vgrid ↑
0 s
0.45 s
98
99
100
101
102
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
-4
-2
0
2
4
00.5 1 1.5 2
iabc (A)
Time (s)
ia ib ic
-2
0
2
4
0 0.5 1 1.5 2
idq (A)
Time (s)
id iq
-20
0
20
40
60
0 0.5 1 1.5 2
udq (V)
Time (s)
ud uq
Grid voltage decreases
from 40 V to 32 V
98
99
100
101
102
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
-4
-2
0
2
4
00.5 11.5 2
iabc (A)
Time (s)
ia ib ic
-2
0
2
4
00.5 11.5 2
idq (A)
Time (s)
id iq
-20
0
20
40
60
00.5 1 1.5 2
udq (V)
Time (s)
ud uq
Grid voltage increases
from 32 V to 40 V
Vgrid ↓
0 s
0.4 s
D. Parameter Mismatch Test
98
106
114
122
0 0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
Vdc by GPC
Vdc by PI
Vdc ref.
118
120
122
0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
Vdc by GPC Vdc by PI
Vdc ref.
Zoom in
98
106
114
122
0 0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
Vdc by GPC
Vdc by PI
Vdc ref.
98
100
102
0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
Vdc by GPC Vdc by PI
Vdc ref.
Zoom in
95
100
105
00.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
Vdc by GPC Vdc by PI
Vdc ref.
95
100
105
0 0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
Vdc by GPC Vdc by PI
Vdc ref.
95
100
105
00.2 0.4 0.6 0.8 1
Vdc (V)
Time (s)
Vdc by GPC Vdc by PI
Vdc ref.
95
100
105
00.2 0.4 0.6 0.8 1
Vdc (V)
Time (s)
Vdc by GPC Vdc by PI
Vdc ref.
95
105
115
125
00.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
115
120
125
0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
Zoom in
95
105
115
125
00.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
95
100
105
0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
Zoom in
95
100
105
00.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
95
100
105
0 0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
95
100
105
00.2 0.4 0.6 0.8 1
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
95
100
105
00.2 0.4 0.6 0.8 1
Vdc (V)
Time (s)
100% C 200% C
400% C Vdc ref.
95
105
115
125
00.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
115
120
125
0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
Zoom in
95
105
115
125
00.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
95
100
105
0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
Zoom in
95
100
105
0 0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
E. Roles of Outer and Inner Loops (Simulation)
Fig. 20
Fig. 20
Lg
Fig.
20
r
Fig. 20
C
95
100
105
0 0.1 0.2 0.3 0.4 0.5
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
95
100
105
00.2 0.4 0.6 0.8 1
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
95
100
105
0 0.2 0.4 0.6 0.8 1
Vdc (V)
Time (s)
100% C 50% C
25% C Vdc ref.
(c) DC-link voltage step responses with different outer GPC tunings
(d) Grid voltage steps down with different outer GPC tunings
Fig. 20 Simulation results with different inner and outer GPC tunings.
VI. CONCLUSION
ACKNOWLEDGEMENT
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95
100
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130
1.5 1.7 1.9 2.1
Vdc (V)
Time (s)
Well tuned Inner GPC r×10
Lg overestimated Vdc_ref
99
99.2
99.4
99.6
99.8
100
100.2
100.4
100.6
100.8
101
2.2 2.3 2.4 2.5 2.6 2.7
Vdc (V)
Time (s)
Well tuned Inner GPC r×10
Lg overestimated Vdc_ref
90
95
100
105
110
115
120
125
130
1.5 1.7 1.9 2.1
Vdc (V)
Time (s)
Well tuned Outer GPC r×10
C overestimated Vdc_ref
99
99.2
99.4
99.6
99.8
100
100.2
100.4
100.6
100.8
101
2.2 2.3 2.4 2.5 2.6 2.7
Vdc (V)
Time (s)
Well tuned Outer GPC r×10
C overestimated Vdc_ref
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APPENDIX
A. Extra Experimental Results with Different PI Parameters
Ki
Kp
Kp
Kp Ki
Kp Ki
KpKi
KpKiKpKiKpKiKpKiKpKi
Vdc reference steps up
Vdc reference steps down
DC load steps up
DC load steps down
(a)
(b)
(c)
(d)
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.15 s
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.1 s
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.08 s
1.3 V
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.08 s
1.3 V
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.76 s
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.72 s
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.96 s
3.3 V
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.83 s
3 V
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.4 s
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.36 s
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.6 s
4.1 V
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.53 s
4.4 V
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.27 s 0.78 s
1.8 V
90
100
110
120
130
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.68 s
0.24 s
2.3 V
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.42 s
4.8 V
0.74 s
90
95
100
105
110
00.5 11.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.37 s
5.4 V
0.72 s
(e)
(f)
B. PI Tuning with Linear Control Toolbox (MATLAB)
Kp Ki
C. Simulation Results of Disturbance Rejection with Grid
Voltage Step
(a) Grid voltage increase (PI
(b) Grid voltage decrease (PI
90
100
110
120
130
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.15 s 0.52 s
1.4 V
90
100
110
120
130
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.24 s
90
95
100
105
110
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.39 s
2.9 V
90
95
100
105
110
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
3 V
0.42 s
90
100
110
120
130
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.1 s 0.44 s
2.7 V
90
100
110
120
130
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.32 s
0.06 s 5.6 V
90
95
100
105
110
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
0.34 s
2 V
90
95
100
105
110
0 0.5 1 1.5 2
Vdc (V)
Time (s)
Vdc Vdc ref.
2.2 V
0.31 s
Vdc by GPC Vdc by PI
Vdc ref.
Vdc by GPC Vdc by PI
Vdc ref.
compared with GPC)
compared with GPC)
(c) Grid voltage increase (DC-link
capacitance overestimated)
(d) Grid voltage decrease (DC-link
capacitance overestimated)
(e) Grid voltage increase (DC-link
capacitance underestimated)
(f) Grid voltage decrease (DC-link
capacitance underestimated)
Tao Wang
Z. Q. Zhu
Nuno M. A. Freire
David A. Stone
Martin P. Foster
100% C 200% C
400% C Vdc ref.
Zoom in
100% C 200% C
400% C Vdc ref.
Zoom in
100% C 50% C
25% C Vdc ref.
Zoom in
100% C 50% C
25% C Vdc ref.
Zoom in