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59-71GHz Wideband MMIC Balanced Power
Amplifier in a 0.13um SiGe Technology
Nejdat Demirel
#*1
, Eric Kerhervé
*2
, Robert Plana
∆3
, Denis Pache
#4
, Didier Belot
#5
#
STMicroelectronics, R&D, 38920 Crolles, France
1
nejdat.demirel@st.com,
4
denis.pache@st.com,
5
didier.belot@st.com
*
IMS, University of Bordeaux, 33405 Talence, France
2
eric.kerherve@ims-bordeaux.fr
∆
LAAS, University of Toulouse, 31077 Toulouse, France
3
plana@laas.fr
Abstract— This paper presents the performance of a wideband
0.13µm BiCMOS SiGe power amplifier (PA) for millimeter wave
(mmW) applications. The design and the measured results of a
monolithic integrated low-voltage PA are reported. A balanced
four-stage common emitter circuit topology was used to achieve
greater than 17dB of power gain from 59 GHz to 71GHz. As a
result, the amplifier delivers 18dBm of maximum RF output
power and 14.5dBm output power at 1dB compression. The
circuit shows 7.8% of power added efficiency (PAE) from a 1.8V
supply voltage at 65 GHz. The power amplifier was fully
integrated including matching elements and bias circuit. The
matching networks use coplanar waveguide (CPW) lines and
MIM capacitors for high integration purpose.
I. INTRODUCTION
The new paradigms coming out for telecommunications are
referred to as “Internet of Things” which translates into new
issues for the wireless architectures. One solution deals with
the exploration of the mmW range where the data rate
capabilities are almost unlimited, the interference are
minimized. This motivates new applications as WLAN
(Wireless Local Area Network)/ WPAN (Wireless Personal
Area Network) applications at 60 GHz, automotive radars at
77 GHz or others applications above 100 GHz for short range
communication or imaging. In order to maintain a very low
cost solution and a strong demand of miniaturization, it is
foreseen to develop systems fully integrated on a silicon
substrate through a System On Chip (SOC) approach
integrating a receiver part and a transmitter part [1]-[2].
It has to be emphasized that most of these applications
could be portable and there is a strong issue concerning the
power efficiency of the fabricated system. In order to
accommodate with the battery technologies that feature low
driven voltage, it is important to assess wireless architecture
featuring high performance and low voltage. Traditional RF
circuits used in this frequency band are based on expensive
III-V semiconductor technologies. The choice of the
technology will have an impact on both, the architecture
performance and manufacturing cost of the equipment. It has
to be outlined that today the conventional architectures are
limited by many drawbacks: a low integration density, a high
cost and a relatively high driven voltage. These drawbacks
could be overcome by silicon based technologies and more
precisely by using the Silicon Germanium (SiGe)
Heterojunction Bipolar Technology (HBT) that has already
demonstrated impressive performances in terms of cut-off
frequency and maximum oscillation frequency. However,
there are still some issues to solve or to overcome with the
SiGe based technologies. The main issue deals with the
avalanche breakdown voltages (BVCEO and BVCBO) which
are further and further reduced. This will drastically impact
the architecture and the power capabilities of this technology
and there is a strong need to develop power amplifier
featuring high power, high efficiency with low supply voltage.
Nevertheless, the quality factor of the passive on silicon has
made significant progress due to the multiplication of metal
level and the use of appropriate design rules to get rid from
the eddy current and ohmic losses. It has to be outlined that
moving to higher frequency range will result in a reduced
dimension for the passive that will reduce the circuit
integration.
This paper describes a 59-71GHz four-stage SiGe
monolithic microwave integrated circuit (MMIC) power
amplifier (PA) operating at very low voltage (1.8V) which
features 8%-10% Power Added Efficiency (PAE), with 20dB
gain and 18dBm of maximum output power, making it
suitable for mmW WLAN applications. The topology selected
for the PA is described in Section II. Amplifier
characterization and experimental results are described in
Section III.
II. P
OWER AMPLIFIER IMPLEMENTATION
The differential PA is designed in a 0.13um SiGe BiCMOS
technology with cutoff frequencies fT/fmax= 230/280 GHz [3].
The process has six metal layers with four copper bottom
layers, two thick layers, and an aluminum layer as top metal.
The SiGe HBT breakdown voltages are BVCEO=1.6V and
BVCBO=5.5V. The design kit includes interconnect model of
CPW line up to 110GHz. The CPW transmission line
(
ε
eff=4.2, loss=0.5dB/mm) has 70 to 50Ω characteristic
impedance range from 6µm to 12µm widths. These
impedances are used in the design to reduce the coupling to
nearby lines and to minimize the coupling to the lossy 15 Ω-
cm substrate.
978-2-87487-011-8 © 2009 EuMA 29 September
-
1 October 2009, Rome, Italy
Proceedings of the 39th European Microwave Conference
1852
The half-schematic of the amplifier is shown in Fig1. In
order to obtain a high gain, the PA consists of four common-
emitter stages. The common-emitter topology was preferred
for his simplicity and for stability problem reasons with
respect to other topologies. The first three stages are
optimized to achieve maximum gain. The output stage is
optimized to achieve the maximum output power. The output
transistors have been also driven near to their practical limits,
related to high-current effects and avalanche breakdown [4].
The use of class-AB operation for the output stage provides a
good trade-off between linearity and efficiency. A current
mirror biasing circuit has been used on each stage of the
balanced PA to provide an optimum condition for the power
device as function of temperature and output power.
Integrated input and output matching networks present 100 Ω
differential impedances at the input and the output. The
matching networks use MIM capacitors and coplanar
transmission lines (~100-200µm). The use of transmission
lines is preferred to obtain better value accuracy of the passive
elements. The disadvantage of transmission lines is their large
surface occupancy.
Fig. 2 Photography of the wideband power amplifier (total chip size:
1.06*1.06 mm²).
The input and output pads have been optimized to reduce
its value. The RF pads represent a capacity of approximately
15fF. Morever, between transmission lines and the other
components, interconnections (ico) lines (~5-25µm) have
been added to a parasitic representation of the design.
Parasitic capacitance and resistance have been extracted and
added to the design (parasitic not shown in the figure).
The risk of oscillations is elevated when using several
stages. A stability study is made separately on each stage. For
the millimeter-wave applications, the transistor has a very
high gain at low frequency which may cause low frequency
oscillations. The solution adopted to make the amplifier
unconditionally stable is to add a resistor in parallel with a
capacitor to introduce losses at the low frequencies.
Fig2 shows the wideband mmW PA photography. The chip,
including pads, consumes an area of 1.12mm². On-chip DC
bypass capacitors (15pF) are included for supply voltage in
each stage of the balanced amplifier.
III. M
EASUREMENTS
Fig. 3 Measured S-parameters (S11, S21, S12 and S22) of the power
amplifiers biased at Vcc=1.8V.
Fig. 1 Half-schematic of the wideband balanced PA including real element values.
1853
Differential designs need a more complex measurement
setup including a differential signal generation and external
baluns. In reference [5], it was found that adding 3dB (Pin and
Pout) to single-ended measurement gives the same results as a
fully differential measurement. All the measurements
presented in this paper have been done on 50Ω single-ended
impedance. The measurements were performed on wafer
using ground-signal-ground probes (GSG) with 100µm of
pitch.
A. Small-Signal Measurements
The S-parameters plotted in Fig3 were measured by using a
110 GHz network analyzer from Agilent Technologies. The
differential PA consumes a total quiescent current of 310 mA
for a DC power of 560 mW. The measured small-signal gain
is 20dB at 65GHz, and the 3dB bandwidth is 59 to 71GHz.
The S11 and S22 are below -10 dB from 58 to 81 GHz and
from 60 to 70 GHz, respectively. The output-to-input isolation
is better than 40dB over the bandwidth. Summary of the PA
small-signal results are presented in Table I.
TABLE I
S
UMMARY OF SMALL-SIGNAL MMW PA PERFORMANCES
Input-Matching BW (<-10dB) 58-81GHz
Output-Matching BW (<-10dB) 60-70GHz
Maximum Gain 20GHz
Small-Signal Gain > 17 dB
(3dB Bandwidth)
59-71GHz
Output-to-Input Isolation <-40dB
Quiescent Power Dissipation 560mW
B. Large-Signal Measurements
Fig. 4 Measured gain, output power and power added efficiency versus input
power (Vcc=1.8V) at 65GHz (solid) and 60GHz (dashed).
Measured output power, gain and PAE as function of input
power at 60 and 65GHz are plotted in Fig.4. This figure
includes 3dB power (Pin and Pout) which is possible in a
differential mode (the measurements were made in single
ended configuration). This measurement is done with a supply
voltage of 1.8V. The large-signal measurements show that the
circuit achieves a maximum output power of 18.8 dBm at
60GHz. A maximum of PAE of 9.8% is obtained at 60GHz,
while the maximum of PAE at 65GHz is 7.8%. The output
1dB gain compression point (P1dB) is 13.5 dBm at 60GHz
with 18dB of power gain, while P1dB at 65GHz is 14.5dBm
with 20dB of power gain. The variation of the large-signal
parameters versus supply voltage is measured at 65GHz and
shown in Fig.5. The maximum of PAE is 8.5% obtained from
a 1.7V supply voltage. The 1dB compression point is
15.4dBm and 21dB of power gain can be achieved from a
1.9V supply voltage. Summary of the PA large-signal results
are presented in Table II.
Fig. 5 Measured large-signal compression at 65GHz for a supply range of
1.6-1.9V.
Table III compares the performances of the presented
mmW PA with other power amplifiers designed in 0.13µm
SiGe technology above 60GHz. Promising results in high
frequency performance of SiGe technology may lead to the
development of low-cost transceivers in mmwaves.
TABLE II
A
MPLIFIER PERFORMANCE SUMMARY
Freq
Gain
(dB)
Psat
(dBm)
P1dB
(dBm)
Peak
PAE(%)
Vcc
(V)
60GHz 18.3 18.8 13.5 9.8 1.8
65GHz 20.5 18 14.5 7.8 1.8
65GHz 21 18.09 15.4 7 1.9
1854
IV. CONCLUSIONS
A wideband Si-based MMIC PA has been realized with
high integration using CPW distributed elements.
Measurement results at 65GHz indicate that SiGe transistors
in common-emitter configuration are able to generate
14.5dBm at their 1dB compression point and 18dBm at
saturation with 8% of peak PAE. The chip demonstrates high
level of mm-wave integration achievable in today’s
production silicon technology and feasibility of low-cost mm-
wave systems for sensor and radio applications.
A
CKNOWLEDGMENT
The authors acknowledge technical support for testing
provided by Magali De Matos and Victor Dupuy. Fabrication
and technology support was provided by Sébastien Pruvost
from STMicroelectronics. The authors thank Conseil Régional
d'Aquitaine for the support on the NANOCOM millimeter-
wave test bench.
R
EFERENCES
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Letters, IEEE Volume 18, Issue 3, March 2008 Page(s):209 – 211.
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TABLE III
C
OMPARISON OF MMWAVE POWER AMPLIFIERS IN 0.13µM SIGE TECHNOLOGY
Freq. Mode
P1dB
[dBm]
Psat
[dBm]
Peak PAE
[%]
Power Gain
[dB]
Supply
Voltage (V)
Pdc (mW) Ref.
60GHz Differential 13.5 18.8 9.8 18 .3 1.8 560 This work
65GHZ Differential 14.5 18 7.8 20.5 1.8 560 This work
60GHz Differential 13.1 20 12.7 18 4 240 [6]
61GHz Single 14.5 15.5 19.7 18.8 3.3 132 [7]
61.5GHz Differential 8.5 14 4.2 12 4 264 [8]
61.5GHz Differential 11.2 16.2 4.5 10.8 2.5 375 [9]
77GHz Single 14.5 17.5 12.8 17 1.8 297 [10]
77GHz Single 12 14.4 15.7 19 2.5/1.8 161 [11]
77GHz Differential 11.6 12.5 4.5 6.1 2.5 325 [5]
77GHz Differential - 18.5 5.4 - -5.5 - [12]
1855
