Floating Inductance Simulator Using Single VDTA

Abstract

In this paper, the realization of a floating simulated inductance circuit has been presented. The realized floating inductance circuit uses single voltage differencing transconductance amplifier (VDTA) and only one grounded capacitor, results in simple and canonical structure as well as attractive for integration. The resulting equivalent inductance value of the proposed simulator can be adjusted electronically by external bias currents of the VDTA. In order to demonstrate the usefulness of the proposed circuit, the second-order voltage mode band pass active-RLC filter is also suggested. PSPICE simulation results are employed to confirm the theoretical analysis.

Full text

Floating Inductance Simulator
Using Single VDTA
Pratya Mongkolwai and Worapong Tangsrirat
Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang (KMITL),
Chalongkrung road, Ladkrabang, Bangkok 10520, Thailand
Tel/Fax: +66-2-326-4205
E-mail: m.pratya@gmail.com , drworapong@gmail.com
Abstract— In this paper, the realization of a floating simulated
inductance circuit has been presented. The realized floating
inductance circuit uses single voltage differencing
transconductance amplifier (VDTA) and only one grounded
capacitor, results in simple and canonical structure as well as
attractive for integration. The resulting equivalent inductance
value of the proposed simulator can be adjusted electronically by
external bias currents of the VDTA. In order to demonstrate the
usefulness of the proposed circuit, the second-order voltage
mode band pass active-RLC filter is also suggested. PSPICE
simulation results are employed to confirm the theoretical
analysis.
I. INTRODUCTION
It is well-known fact that the floating inductor is one of the
important elements in circuit design, such filters and
oscillators. However, it is impractical to fabricate a large-
valued inductor in the integrated circuit technology because
its characteristic is far from the ideal behavior, and it requires
a large chip area. Although on chip inductors in spiral is a
new research area, they still occupy a large chip area and have
low quality factor (Q), and their values are very small, usually
in order of 1 nH. Therefore, to overcome this problem,
several floating inductance simulator circuits using various
high-performance active devices have been reported in the
technical literature [1]-[9]. However, all of these reported
circuits have either one or more active elements, or more than
two passive elements for floating inductance simulation.
Recently, the concept of the newly versatile active building
block, namely voltage differencing transconductance
amplifier (VDTA), has been introduced [10]. This element
can be compared with the previously introduced current
differencing transconductance amplifier (CDTA) element [11],
in which the current differencing unit at the front-end is
replaced by the voltage differencer. This means that the
VDTA is composed of the current source controlled by the
difference of two input voltages and a multiple-output
transconductance amplifier, providing electronic tuning
ability through its transconductance gains. Therefore, the
VDTA device is very suitable for electronically tunable active
circuit synthesis. Another advantageous feature of the use of
the VDTA as an active element is that compact structures in
some applications can be achieved easily [12]. All these
advantages make the VDTA an alternative choice for the
implementation of analog signal processing circuits.
In this work, we present a circuit configuration using a
VDTA as a novel active device for simulating floating
inductance. The proposed floating inductance simulator
circuit employs one VDTA and one grounded capacitor,
which is resistorless structure. It is worth nothing that the
circuit containing only grounded capacitor has considerable
advantages in reducing cost and in fully integrated circuit
design [13]. The equivalent inductance value of the proposed
simulated inductor can be adjusted electronically by changing
the transconductance value of the VDTA. To demonstrate the
performance of the proposed circuit, it is used to construct a
second-order RLC bandpass filter and performance
verifications are performed by PSPICE simulation.
II. DESCRIPTION OF THE VDTA
As symbolically shown in Fig.1, the VDTA device is an
active five-terminal building block, when p and n are input
terminals, and z, +x and -x are output terminals. The terminal
relations of this device can be expressed by the following
matrix equation [10], [12] :
⎥
⎥
⎥
⎦
⎤
⎢
⎢
⎢
⎣
⎡
⎥
⎥
⎥
⎦
⎤
⎢
⎢
⎢
⎣
⎡
−
−
=
⎥
⎥
⎥
⎦
⎤
⎢
⎢
⎢
⎣
⎡
−
+
z
n
p
mS
mS
mFmF
x
x
z
v
v
v
g
g
gg
i
i
i
00
00
0 (1)
where gmF and gmS are the first and second transconductance
gains of the VDTA, respectively. From eq.(1), the differential
input voltage from p and n terminals (vp – vn) is transformed
into the current through the terminal z (iz) by the
transconductance gmF. The voltage drop at the terminal z (vz)
is then converted to output currents at the terminals +x (ix+)
and -x (ix-) by the transconductance gmS. In general, the
transconductance gains of the VDTA can be controlled
electronically by the external bias voltage/current.

v
p
v
x-
i
p
p
VDTA
v
z
i
x-
z
i
z
v
n
i
n
v
x+
i
x+
nx-
x+
Fig.1. Circuit representation of the VDTA.
III. PROPOSED FLOATING INDUCTANCE SIMULATOR
The proposed floating inductance simulator circuit is
shown in Fig.2. The circuit consists of only one VDTA and
one grounded capacitor, results in a resistorless and canonical
structure. Routine circuit analysis of Fig.2 using eq.(1) yields
the short-circuit admittance matrix as follows :
⎥
⎦
⎤
⎢
⎣
⎡
⎥
⎦
⎤
⎢
⎣
⎡
+−
−+
=
⎥
⎦
⎤
⎢
⎣
⎡
2
1
1
2
111
11
V
V
sC
gg
I
ImSmF (2)
From above expression, we see that the proposed circuit of
Fig.2 simulate a floating inductor with an equivalent
inductance value of Leq = C1/gmFgmS. This reveals that the
value of Leq can be adjusted electronically through either gmF
or gmS of the VDTA. In addition, if we let V1 = 0 or V2 = 0,
then the proposed circuit can be used as a grounded inductor.
V
1
I
1
p
VDTA
C
1
z
V
2
I
2
nx-
x+
Z
in
Fig.2. Proposed floating inductance simulator circuit.
IV. PERFORMANCE SIMULATION AND APPLICATION
EXAMPLE
The performance of the proposed circuit was verified using
PSPICE simulation. In simulations, the VDTA was
performed by the schematic CMOS implementation given in
Fig.3 [12] with supply voltages +V = -V = 1.8 V. The CMOS
transistors in VDTA implementation were simulated the 0.35
µm TSMC process parameters. The dimensions of MOS
transistors are given in Table 1.
TABLE I
DIMENSIONS OF MOS TRANSISTORS IN FIG.2.
Transistors W (μm) L (μm)
M1 – M2 , M5 – M6 16.1 0.7
M3 – M4 , M7 – M8 28 0.7
M9 – M12, M14 – M17 56 0.7
M13 , M18 7 0.7
-V
+V
x-
M
7
M
8
M
5
M
6
i
x-
x+
i
x+
I
BF
M
3
M
4
M
1
M
2
z
i
z
n
p
I
BS
M
9
M
10
M
11
M
12
M
13
M
14
M
15
M
16
M
17
M
18
Fig.3. Internal CMOS structure of the VDTA used in simulations.

In Fig.3, the structure is realized by two Arbel-Goldminz
transconductances [14]. In this case, the gmF- and gmS–values
of this element are determined by the output transistor
transconductance, which can respectively be approximated
as :
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
≅43
43
21
21 gg gg
gg gg
gmF (3)
and ⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
≅87
87
65
65 gg gg
gg gg
gmS (4)
where
i
i
oxBii L
W
CIg
μ
=is the transconductance value of
the i-th MOS transistor (i = 1, 2, …, 8), IBi is the bias current
of the i-th transistor,
μ
is the effective carrier mobility, Cox is
the gate-oxide capacitance per unit area, and W and L are the
effective channel width and length, respectively.
The impedance of the proposed floating inductance
simulator circuit in Fig.3 relative to frequency is shown in
Fig.4. The passive component value is selected as : C1 = 1
nF, while the VDTA’s transconductances were varied as : gm
= gmF = gmS ≅ 0.27 mA/V (IB = IBF = IBS = 20
μ
A), gm ≅ 0.54
mA/V (IB = 80
μ
A) and gm ≅ 0.81 mA/V (IB = 180
μ
A), to
obtain Leq = 13.74 mH, 3.43 mH, 1.52 mH, respectively. As
expected, Fig.4 shows that the simulation results are in close
agreement with the ideal results.
1k
100
Frequency (Hz)
Phase
(degree)
75
50
25
0
100M
Mag.
(
Ω
)
1M
10k
1k
110k 100k 1M 10M 100M
Ideal Simulated
g
m
(mA/V)
0.27
0.54
0.81
Fig.4. Ideal and simulated magnitude and phase responses
of the proposed floating inductor circuit of Fig.2.
To demonstrate an application of the proposed floating
inductor of Fig.2, it is employed in the RLC bandpass filter
shown in Fig.5. The floating inductor circuit is simulated
with the following component values : C1 = 1 nF and : gm =
gmF = gmS ≅ 0.27 mA/V (IB = IBF = IBS = 20
μ
A), which results
in Leq = 13.74 mH. Fig.6 shows the frequency responses of
the bandpass filter of Fig.5, which appears that the ideal and
simulated magnitude and phase responses are in good
agreement for a set of selected values over several decades.
Furthermore, in order to demonstrate the electronic
controllability of the proposed floating inductor, the value of
Leq in Fig.5 was changed to 13.74 mH, 3.43 mH and 1.52 mH,
by adjusting the transconductance gain gm to be 0.27 mA/V,
0.54 mA/V and 0.81 mA/V, respectively. This tuning leads to
obtain the center frequency fc =
ω
c/2π ≅ 91.5 kHz, 183.2 kHz
and 275.2 kHz, respectively. The simulated magnitude
responses of the bandpass filter in Fig.5 with electronically
variable Leq are depicted in Fig.7. From the results, the
corresponding fc are obtained as : 95.6 kHz, 181.3 kHz and
267.4 kHz, respectively.
L
eq
v
o
+
-
R
= 5 k
Ω
C
= 220 pF
v
in
+
-
Fig.5. RLC bandpass filter.
Frequency (Hz)
1k
20
Gain
(dB) Phase
(degree)
0
-20
-40
-60
100
50
0
-50
-100 10k 100k 1M 10M
Ideal
Simulated
Fig.6. Ideal and simulated frequency responses of Fig.5.
Frequency (Hz)
1k
20
Voltage gain (dB)
0
-20
-40
-60 10k 100k 1M 10M
L
eq
= 13.74 mH (
f
c
= 91.5 kHz)
L
eq
= 3.43 mH (
f
c
= 183.2 kHz)
L
eq
= 1.52 mH (
f
c
= 275.2 kHz)
Fig.7. Simulated magnitude responses of Fig.5 with variable Leq.
V. CONCLUSIONS
This paper describes a floating inductance simulator circuit
with electronically tunable feature based on the use of the
voltage differencing transconductance amplifier (VDTA) and
only one grounded capacitor. The important gain of floating
inductance simulator can be adjusted electronically by
changing bias currents of the VDTA. PSPICE simulation
results verify that the performances of the proposed circuit are
in good agreement with the prediction of the analysis
performed.

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