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Implementation of Direct Sequence Spread Spectrum Communication System Using FPGA

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This paper presents the designed and implementation of spread spectrum technology for data transfer to overcome the interference problems associated with narrow band, very high frequency and ultra high frequency data transfer systems. The spread spectrum communication is used to reduce jamming of communication and provides a heightened secure communication. In this paper, the design and analyzes are implemented by Field Programmable Gate Array (FPGA) for baseband spread spectrum communication system using Pseudo Noise Sequences (PNS) for spreading digital data. The sequence generator and direct sequence spread spectrum (DSSS) for a single user is implemented in a FPGA module. The generated pseudo noise sequences are investigated for autocorrelation, cross correlation and balance properties. The bit error rates performance of the system is evaluated in multiuser environment under AWGN and reveals that, the DSSS system using pseudo noise sequences as spreading sequences significantly outperforms for the conventional PN
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International Journal of Advanced Engineering, Management and Science (IJAEMS) [Vol-3, Issue-5, May- 2017]
https://dx.doi.org/10.24001/ijaems.3.5.13 ISSN: 2454-1311
www.ijaems.com Page | 488
Implementation of Direct Sequence Spread
Spectrum Communication System Using FPGA
R.Prabhu1, R.Nagarajan2, N.Karthick3, S.Suresh4
1Asst. Professor, Department of Electronics and Communication Engineering, Gnanamani College of Technology, Namakkal,
India.
2Professor, Department of Electrical and Electronics Engineering, Gnanamani College of Technology, Namakkal, India.
3Asst. Professor, Department of Electronics and Communication Engineering, Gnanamani College of Technology, Namakkal,
India.
4Asst. Professor, Department of Electrical and Electronics Engineering, Gnanamani College of Technology, Namakkal, India
Abstract This paper presents the designed and
implementation of spread spectrum technology for data
transfer to overcome the interference problems associated
with narrow band, very high frequency and ultra high
frequency data transfer systems. The spread spectrum
communication is used to reduce jamming of
communication and provides a heightened secure
communication. In this paper, the design and analyzes are
implemented by Field Programmable Gate Array (FPGA)
for baseband spread spectrum communication system
using Pseudo Noise Sequences (PNS) for spreading digital
data. The sequence generator and direct sequence spread
spectrum (DSSS) for a single user is implemented in a
FPGA module. The generated pseudo noise sequences are
investigated for autocorrelation, cross correlation and
balance properties. The bit error rates performance of the
system is evaluated in multiuser environment under AWGN
and reveals that, the DSSS system using pseudo noise
sequences as spreading sequences significantly
outperforms for the conventional PN sequences system
Keywords Bit Error Rates (BER), Field Programmable
Gate Array (FPGA), Direct Sequence Spread Spectrum
(DSSS), Pseudo Noise (PN) and Spread Spectrum (SS).
I. INTRODUCTION
The spread spectrum (SS) has been defined as a means of
transmission in which the signal occupies bandwidth much
in excess of the minimum necessary to send the
information, the band spread is accomplished by utilizing a
code which is independent of the data and a synchronized
reception with the code at the receiver is used for de-
spreading and subsequent data recovery. The SS
communications are mostly used today for military,
industrial, avionics, scientific and civil. The merits of using
SS include the low power spectral density. As the signal is
spread over a large frequency band, the power spectral
density is getting very low, so other communications
systems do not suffer from this kind of communications.
However the Gaussian Noise level is increasing [1].
The ability to utilize the satellite pay load channels,
which is achievable as the transmitted signal is spread in
such a way that it become noise like and thus would not
interfere with the pay load traffic and interference limited
operation. The security due to unknown random codes, as
the applied codes is in principle unknown to a hostile user.
This means that it is not easy to possible to detect the
message of another user. Applying spread spectrum implies
the reduction of multi path effects and random access
possibilities. As users can start their transmission at any
arbitrary time and better anti-jam performance. The cost
paid is the need of a larger bandwidth which already present
due to the usage of the existing communication channels
and the need for good synchronization at the receiver to
detect the reception of the signal [2].
The spread spectrum techniques for digital communication
were originally developed for military applications because
of their high security and their susceptibility to interference
from other interceptors. Now a day spread spectrum
techniques are being used in variety of commercial
applications such as mobile and wireless communication
[3]. In order to spread the bandwidth of the transmitting
signals, the binary pseudo noise (PN) sequences have been
used extensively in spread spectrum communication
systems. One of the most commonly used PN sequences in
direct sequence spread spectrum (DSSS) is maximal length
sequences (m-sequences) [4]. The length of m-sequences
depends on the number of shift registers used in the circuit.
The good correlation properties can be achieved with m-
sequences. The ability to predict future sequence is
nevertheless possible though difficult; therefore
transmission is not completely secured [5]. The number of
sequences generated by linear feedback shift registers
(LFSR) may be insufficient for wideband DSSS with a very
large number of users. In addition, LFSR techniques
provide limited flexibility in incorporating security into
multiple user systems [6].
The use of chaotic sequences as spreading sequences has
been proposed in the literature because of its sensitivity to
International Journal of Advanced Engineering, Management and Science (IJAEMS) [Vol-3, Issue-5, May- 2017]
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initial conditions and has characteristics similar to random
noise. However reliable electronic hardware
implementations of chaos based PN sequence generators
based on recursion of maps realized by piecewise linear
analogue functions and output quantization have not been
possible due to manufacturing process variations among
different integrated circuit production lots, transistor
mismatches and electronic noise [7]. The pseudo-chaotic
sequence generator modified version is presented in this
paper. The non linear feedback shift registers (NLFSR),
have shown that chaotic spreading sequence can be used as
an inexpensive alternative to the LFSR sequences such as
m-sequences and gold sequences.
II. SPREAD SPECTRUM
The electromagnetic spectrum refers to the full range of all
frequencies of electromagnetic radiation and also to the
characteristic distribution of electromagnetic radiation
emitted or absorbed by that particular object. The devices
used to measure an electromagnetic spectrum are called
spectrograph or spectrometer. The visible spectrum is the
part of the electromagnetic spectrum that can be seen by
the human eye. The wavelength of visible light ranges
from 390 to 700 nm. The absorption spectrum of a chemical
element or chemical compound is the spectrum of
frequencies or wave lengths of incident radiation.
The emission spectrum refers to the spectrum of radiation
emitted due to an atom or molecule making
a transition from a higher to a lower energy state. The light
from many different sources contains various colors, each
with its own brightness or intensity. A rainbow, or prism,
sends these component colors in different directions,
making them individually visible at different angles [8].
The graph of the intensity plotted against the frequency
showing the brightness of each color is the frequency
spectrum of the light. When all the visible frequencies are
present equally, the perceived color of the light is white,
and the spectrum is a flat line. Therefore, the flat line
spectrums in general are often referred to as white, whether
they represent light or another type of wave phenomenon
(sound, for example, or vibration in a structure). In radio
and telecommunications, the frequency spectrum can be
shared among many different broadcasters [9].
The radio spectrum is the part of the electromagnetic
spectrum corresponding to frequencies lower below
300 GHz, which corresponds to wavelengths longer than
about 1 mm. The microwave spectrum corresponds to
frequencies between 300 MHz to 300 GHz, wavelength
between the distances of one meter to one millimeter. Each
broadcast radio and TV station transmits a wave on an
assigned frequency range, called a channel. When many
broadcasters are present, the radio spectrum consists of the
sum of all the individual channels, each carrying separate
information and spread across a wide frequency spectrum.
Any particular radio receiver will detect a single function of
amplitude (voltage) vs. time [10]. The radio then uses
a tuned circuit or tuner to select a single channel or
frequency band and demodulate or decode the information
from that broadcaster. If made a graph of the strength of
each channel vs. the frequency of the tuner, it would be the
frequency spectrum of the antenna signal [8].
The different SS techniques are available, but all have
one idea in common: the key (also called code or sequence)
attached to the communication channel. The manner of
inserting this code defines precisely the SS technique in
question. The term spread spectrum refers to the expansion
of signal bandwidth, by several orders of magnitude in
some cases, which occurs when a key is attached to the
communication channel. The formal definition of SS is
more precise: spread spectrum is an RF communications
system in which the baseband signal bandwidth is
intentionally spread over a larger bandwidth by injecting a
higher frequency signal [11], [12].
As a direct consequence, energy used in transmitting the
signal is spread over a wider bandwidth and appears as
noise. The ratio (in dB) between the spread baseband and
the original signal is called processing gain. The typical SS
processing gains run from 10dB to 60dB. To apply an SS
technique, simply inject the corresponding SS code
somewhere in the transmitting chain before the antenna,
that injection is called the spreading operation. The effect is
to diffuse the information in a larger bandwidth.
Conversely, can remove the SS code (dispreading
operation) at a point in the receive chain before data
retrieval. The effect of a dispreading operation is to
reconstitute the information in its original bandwidth.
Obviously, the same code must be known in advance at
both ends of the transmission channel [13]. The spread
spectrum operation diagram is shown in Figure 1.
Fig.1: Spread Spectrum
The quadrature phase shift keying (QPSK) uses four points
on the constellation, equispaced around a circle with four
phases; QPSK can encode two bits per symbol, with gray
coding to minimize the BER sometimes misperceived as
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twice the BER of binary phase shift keying (BPSK). The
mathematical analysis shows that QPSK can be used either
to double the data rate compared with a BPSK system while
maintaining the same bandwidth of the signal, or
to maintain the data rate of the BPSK but halving the
bandwidth needed. In this latter case, the BER of QPSK is
exactly the same as the BER of BPSK and deciding
differently is a common confusion when considering or
describing QPSK. The transmitted carrier can undergo
numbers of phase changes [14].
The given radio communication channels are allocated by
agencies such as Federal Communication
Commission giving a prescribed (maximum) bandwidth,
the advantage of QPSK over BPSK becomes evident: the
QPSK transmits twice the data rate in a given bandwidth
compared to BPSK - at the same BER. The engineering
penalty that is paid is that QPSK transmitters and receivers
are more complicated than the ones for BPSK. However,
with modern electronics technology, the penalty in cost is
very moderate [15].
As with BPSK, there are phase ambiguity problems at the
receiving end, and differentially encoded QPSK is often
used in practice. The implementation of QPSK is more
general than that of BPSK and also indicates the
implementation of higher order PSK. Writing the symbols
in the constellation diagram in terms of the sine and cosine
waves used to transmit them:
This yields the four phase’s π/4, 3π/4, 5π/4 and 7π/4 as
needed. This results in a two-dimensional signal space with
unit basis functions
The first basis function is used as the in-phase
component of the signal and the second as the quadrature
component of the signal. Hence, the signal constellation
consists of the signal-space 4 points. The factors of 1/2
indicate that the total power is split equally between the two
carriers. Comparing these basis functions with that for
BPSK show clearly how QPSK can be viewed as two
independent BPSK signals [3].
III. DIRECT SEQUENCE SPREAD SPECTRUM
The Pseudo Noise (PN) is defined as a coded sequence of
1’s and 0’s with certain auto correlation properties. The
system of sequences used in spread spectrum
communication is usually periodic in that a sequence of
1’s and 0’s repeats itself exactly with a known period. The
m-sequence represents a commonly used periodic PN
sequence. Such sequences are long periods and require
simple instrumentation in the form of a LFSR. Indeed,
they possess the longest possible period for this method of
generation [16]. The generated m-sequence is always
periodic with a period of N=2𝑚-1 where m indicates is the
length of the shift register. The Figure 2 shows the block
diagram of PN Sequence Generator.
Figure 2 Block Diagram of PN Sequence Generator
There are many types of spread spectrum techniques as:
Direct sequence, frequency hopping, time hopping and
hybrid system. The direct sequence contrasts with the other
spread spectrum process, in which a broad slice of the
bandwidth spectrum is divided into many possible
broadcast frequencies. In general, frequency hopping
devices use less power and are cheaper, but the
performance of DS-CDMA systems is usually more
reliable. Thus, in this paper deal only with direct sequence
spread spectrum method. In direct sequence spread
spectrum the base-band waveform is XOR by the PNS
sequence in order to spread the signal. After spreading, the
signal is modulated and transmitted [17], [18].
Fig.3: Block Diagram of DSSS
The Figure 3 shows the block diagram of DSSS. The
bandwidth expansion factor also called the processing gain
(K), can be defined as the ratio between the transmitted
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spread spectrum signal bandwidth (B) and the bandwidth of
the original data sequence (B message) where the
processing gain is nearly the ratio of the spread bandwidth
to the information rate R (bits/s) and it is much greater than
unity. The spread spectrum transmitter use similar transmits
power levels to narrow band transmitters. Because spread
spectrum signals are so wide, they transmit at a much lower
spectral power density, than narrow band transmitters. The
spread and narrow band signals can occupy the same band,
with little or no interference. The interference rejection
capability arises from low mutual correlation between the
desired signal and the interfering signal ensured by the
codes [19], [20].
This capability is the main reason for all the interest in
spread spectrum today. The given equation represents the
DSSS signal.
Sss = √ (2 Es/Ts) [m(t) p(t)] cos (2 π fc t + θ )
Where:
m(t) is the data sequence,
Ts is duration of data symbol.
p(t) is the PCS spreading sequence,
fc is the carrier frequency,
θ is the carrier phase angle at t=0
The spread spectrum having the following advantages such
as: jamming resistance for intended or unintended jamming.
A single channel is shared among multiple users.
Interception is hampered due to reduced signal/background
noise level. The relative timing between transmitter and
receiver is determined. In DSSS a sine wave is pseudo
randomly phase modulated with a continuous string of
pseudo noise code symbols called "chips", each of these
chips has a much shorter duration than an information bit.
In effect information signal is modulated by chips sequence
which is much faster. Therefore, the chip rate is much
higher than information signal bit rate. In DSSS the chip
sequences produced by the transmitter to modulate the
signal is known at receiver end and receiver uses the same
chip sequences to demodulate [21], [22].
IV. FPGA IMPLEMENTATION OF DSSS
SYSTEM
In this paper, the conventional PN sequence system is
replaced by PCS (pseudo-chaotic sequence) for a DSSS
system. The block diagram of the implemented DSSS
system with transmitter and receiver, and inter connection
between them is shown in Figure 3. In this Figure 3 shows
that channel is the only connection between transmitter and
receiver; assuming clock has been synchronized and
channel is ideal. In this DSSS system, we spread the data
bits using PCS sequence which are generated by using PCS
generator. To generate PCS sequence, need to initialize the
8 bit registers R1 to R8 of PCS generator. To load eight
registers of the PCS generator to set load=1 and the
corresponding registers R1 to R8 are selected. The 8 bit
initial values to each of these 8 registers are loaded using 8
pin of the register unit [23].
After loading the initial values to all the 8 registers, ready
out pin gives a signal to the user. At the same time a signal
ready is set to high which gives an indication to the control
circuit that it can start its operation. Initially before loading
the initial values to the registers R1 to R8, the control
circuit signals busy and done are not enabled i.e., busy =1
and done=0. As soon as ready=1, then the signal busy=0.
The tracking and synchronization of the receiver can be
done easily by sending first 8 bit data as “11111111”. In
that condition, the massage source sends a signal in the
form of reload signal to the control circuit to indicate that
it is ready to send the data. Once this is happens the 8 bit
data is sent parallels and stored in a buffer register of
control circuit in the next clock cycle [24].
Fig.4: Block Diagram of Transmitter
After receiving the 8 bit data frame, the control circuit
enables the PCS generator by setting the signal run=1, also
enables the multiplier by setting enable=1 and indicates the
buffer that it is busy by setting the signal busy=1. During
this time the PCS generator starts generating the 32-bits of
PCS sequence. The control circuit then transfers one bit at
a time serially to the multiplier where it is multiplied by
the 32-bits of generated PCS sequence resulting in a 32-
bits of spread sequence and the same is transmitted. After
the first data bit is spread by 32-bits of PCS sequence, the
second data bit is received in the multiplier and is
multiplied by the next 32-bits of the PCS sequence. Hence
the PCS generator generates a total of 256 bits to spread all
the 8-bits of data. After transmitting all the 256 bits with
respect to one frame of data i.e., 8-bits of data, the control
circuit makes signal done=1 and busy=0. At that time the
control circuit is ready to accept next frame of 8-bits of
data. In this way the operation of the transmitter repeats
and maintains the gap between the two frames. The Figure
4 shows the block diagram of transmitter [25].
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The internal block diagram of the receiver is shown in
Figure 5. It consists of detector, control circuit, PCS
generator and demodulator. The receiver mainly works in
3 phases: the training phase, the detection phase, and the
dispreading phase. Before the training phase, the 8 bit
registers R1 to R8 are again initialized with the same
initial values used in the transmitter. This is indicated by
setting ready =1 by the PCS generator to the control
circuit. During the training phase the control circuit keeps
the signal ld=1 and enable=0 and run=1. Now the detector
is initialized with a training sequence i.e., the first 256 bits
of the PCS sequence are loaded into the 8 lower registers,
each with 32-bits of the detector. In the detection phase,
the control circuit resets ld=0 and run=0. During this phase
the received data of 256 bits are loaded into the upper 8
registers of detector, each register with 32-bits and is
compared with the bit pattern which is already stored in
the lower 8 registers of the detector [26].
.
Fig.5: Block Diagram of Receiver
The spread spectrum technology is a new type of data
transfer designed to overcome the interference problems
associated with narrow-band very high frequency and
ultrahigh frequency data transfer systems. The spread
spectrum communication is used to reduce jamming of
communication and provides a heightened secure
communication. In this paper we specifies the design and
Field Programmable Gate Array (FPGA) implementation
of a baseband spread spectrum communication system
using Pseudo-Noise Sequences (PNS) for spreading digital
data.
In this paper there are eight bit input massage signal are
used. The splitter block in the circuit split the message
signal for two bits for each clock cycle to produce two
message signals. Hear the splitter block using multiplexer
logic function. The splitter flow control splits a message
into separate fragments, and then sends these fragments one
at a time to the next message processor in the flow. The
segments are identified based on an expression parameter,
usually written in Mule expression language (MEL), but
other formats can be employed also. The collection
aggregator flow control is used to reassemble the parts of
the original message. the re-sequencer flow control to put
the parts back into the original sequence in case they are
shuffled out of order. The splitting and aggregating the
message is especially useful when you intend to process the
split parts in asynchronous flows running on separate
servers. Together, the splitter and aggregator flow controls
allow sharing the workload among several servers and still
being able to reassemble the message after its process.
In this address generator block was generate the two bit
address for each cycle in this address generator using for
counter logic function .first the counter initial position is
‘0’ when we give enable signal means that time will start
for count that was generate for continues two bit address
for each clock. The control unit was control the input
message signal .the control unit was controlled by the
carrier wave generator. The DSSS technique was basically
using for four types of carrier signal there are, Sine wave,
Inv-sine wave, Cos wave and Inv-cos wave. The carrier
wave fully generated after that give one enable signal for
each carrier signal any one signal was reach to the control
unit means the control unit was using for XOR logic
function [27].
The definition of proper sampling is quite simple. Suppose
the sample is a continuous signal in some manner. If you
can exactly reconstruct the analog signal from the samples,
you must have done the sampling properly, even if the
sampled data appears confusing or incomplete. In the
analog signal is a constant DC value, a cosine wave
of zero frequency. Since the analog signal is a series of
straight lines between each of the samples, all of the
information needed to reconstruct the analog signal is
contained in the digital data. According to our definition,
this is proper sampling, the sine wave frequency of 0.09 of
the sampling rate. This might represent, for example, a 90
cycle/second, the sine wave being sampled at 1000
samples/second. Expressed in another way, there are 11.1
samples taken over each complete cycle of the sinusoid
wave. These samples correspond to only one analog signal,
and therefore the analog signal can be exactly
reconstructed, again, an instance of proper sampling. The
situation is made more difficult by increasing the sine
wave's frequency to 0.31 of the sampling rate [28].
Fig.6: Carrier Wave Generators
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The Figure 6 shows the Carrier Wave Generators. The
sampling theorem indicates that a continuous signal can be
properly sampled, only if it does not contain frequency
components above one-half of the sampling rate. For
instance, a sampling rate of 2,000samples/second requires
the analog signal to be composed of frequencies below
1000 cycles/second. If frequencies above this
limit are present in the signal, they will be aliased to
frequencies between 0 and 1000 cycles/second, combining
with whatever information that was legitimately there.
Where:
A= Amplitude of the deviation function from zero.
f = Frequency of oscillations (cycles) that occur each
second
ω =2πf, the angular frequency, the rate of change of the
function argument in units of radians per second
φ = phase, specifies (in radians) where in its cycle the
oscillation is at t =0.
In electronics, a multiplexer (or mux) is a device that
selects one of several analog or digital input signals and
forwards the selected input into a single line. A
multiplexer of 2n inputs has n select lines, which are used
to select which input line to send to the
output. Multiplexers are mainly used to increase the
amount of data that can be sent over the network within a
certain amount of time and bandwidth. A multiplexer is
also called a data selector. Multiplexers can also be used to
implement Boolean functions of multiple variables. An
electronic multiplexer makes it possible for several signals
to share one device or resource, for example one or one
communication line, instead of having one device per
input signal. Conversely, a de multiplexer (or de mux) is a
device taking a single input signal and selecting one of
many data-output-lines, which is connected to the single
input. A multiplexer is often used with a complementary
de multiplexer on the receiving end. An electronic
multiplexer can be considered as a multiple-input, single-
output switch, and a de multiplexer as a single-input,
multiple-output switch [29].
The binary information that is stored within such a device
is specified in some fashion and then embedded within the
hardware in a process is referred to as programming the
device. The word “programming” here refers to a hardware
procedure which specifies the bits that are inserted into the
hardware configuration of the device.ROM is one example
of a PLD. Other such units are the Programmable Logic
Array (PLA), Programmable Array Logic (PAL), and the
FieldProgrammable Gate Array (FPGA). A PLD is an
integrated circuit with internal logic gates connected
through electronic circuits [30].
In our project we go for store the incoming carrier wave to
demodulate process. Why we go for ROM here we are
already store the signal value according to transmission of
the carrier signal for avoid the transmission cycle only.
here our project we store the 256byte of sample values of
our carrier signal .here we can decide which set of signal
first go to the correlator block. The signal is taken out as
per the carrier transmission. The ROM is constructed in
two dimension array. The width is 8 bit and depth is 256
byte. Here we store the 256 byte of samples which is
transmitted in the transmitter side. The function is when
we receive the signal it will stored in ROM. After that
every clock when reset is disabling it will send 64 bit of
data as a output. The ROM hold 256 byte of sample values
so it has 2048 bit values.it will send 64 bit per clock cycle.
Then the output is goes to the correlator block.
The device used is known as correlator or detector. In this
project, we have used a modified version of conventional
detector at the receiver to detect the signal from the
transmitter and to achieve synchronization between the
transmitter and receiver during the communication in
DSSS system that uses PN sequence. The detection of
signal from the intended transmitter at receiver and to
achieve the synchronization between them is very
important in DSSS system specifically when the system
uses pseudo noise sequence. The correlator is constructed
by multiplier with adder. When the input signal is received
from ROM it will split in to 8 bits. It will receive 64 byte
of data and split the 64 byte of data and multiply with
carrier signal samples to every byte data. Finally using
adder we will add all the results. So we get 16 bit as a
output.
The comparator is used to compare the output value of
correlator block. it compare the four set carrier signals and
given to a two bit of output .it will receive a 14 bit of input
the comparator has already known four set constant value,
so that the comparator compare the input value with the
constant output, from that it will send a 2 bit of output, the
out is goes to the shifter block. The shifter is a sequential
circuit; it is constructed by flip-flops or registers. In this
circuit using 8 bit left shift registers for design. The shift
registers is used to shift the input data and store the all 8
bit data. It will send the output when the 8 bits are received
from the comparator. When the reset is disable it will
receive the first two bit of input and shift two positions to
the left at the second clock, it will receive another two bit
of input and shit two bit to the left side. Then it will
receive another two bit. The same process repeats at the
fourth clock it will receive the last two bits of value it will
shift again two bit and to the output of 8 bits. In our design
shift registers is used in asynchronous clock.
Here we generate the same PN sequence already generated
in the transmitter nodule. The PN sequence generator has
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the seed bit, which is act as our security key. Without PN
sequence we cannot encrypt our original message signal.
In general, the PN sequence generated by a polynomial
equation. The LFSR (linear feedback shift register) is used
to generate the PN sequence but here using a XOR gate
only for generating PN sequence in the data flow model. In
this design the PN generator with only using XOR gates. It
is one of the basic gates. The output is high when the both
inputs are not equal. The output is zero if the inputs are
same. Here XOR gate is used to mix the input signal with
the pseudo noise signal. The XOR gate receive the two
inputs one from the shifter block another one from the PN
sequence generator, shifter block output is 8 bit. PN
sequence output is 8 bit it will XOR the both the inputs
then it will give the output as 8 bit; this is what our
original message signal. Finally we get our original
message signal. The XOR gate gives the original message
signal. Here the PN sequence seed bit is keep it as
confidential. So finally get the original message signal
using of direct sequence spread spectrum.
V. SIMULATION RESULTS
Figure 7(a), (b), (c), (d) and (e) show the simulation results
of the direct sequence spread spectrum, Carrier signal,
transmitter final waveform, ROM waveform, correlator
waveform and receiver waveform.
Fig. 7(a): Carrier Signal
Fig. 7(b): Transmitter Final Waveform
Fig. 7(c): ROM Waveform
Fig. 7(d): Correlator Waveform
Fig. 7(e): Receiver Waveform
VI. CONCLUSION
In this paper, The PCS generator is discussed based on the
model. The initial conditions of the PCS sequence
generators can be randomly selected to produce pseudo-
chaotic sequence with good correlation properties upon
exhaustive comparison to be distinct sequences rather than
phases of the same sequence. The family of pseudo chaotic
PN sequences proved good correlation properties than
conventional m-sequences and hence it can be useful for
DSSS. The Pseudo chaotic sequence generation with its
robust digital implementation is to avoid many difficulties
associated with analog chaotic circuits. The large set of
system parameters (initial conditions and internal
configuration of cells and generators) and the non linear
nature of the feedback generation circuitry lead to potential
applications for programmable secure communication
systems. The tests will have shown that simply using
random selections of initial conditions can provide pseudo
chaotic PN sequences that are relatively long with good
correlation properties. Based on these results it is worth
noting that the sequences based on quantized maps derive
many of their statistical properties from the specific
architectures used to implement them. This flexibility
provides an additional level of security on top of the
inherent low probability of intercept characteristics of PN
sequences due to the difficulty of identify the underlying
structure. Therefore the number of implementation
possibilities is very high due to initial condition
programmability, can be made software controlled and this
new system of sequences is inherently less difficult to
detect.
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