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Toward the Speed Limit of Phase Change Memory
Jiabin Shen1,2, Wenxiong Song1, Kun Ren3, Zhitang Song1*, Peng Zhou2*, Min Zhu1*
1State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of
Micro-System and Information Technology, Chinese Academy of Sciences; 200050
Shanghai, China
2State Key Laboratory of ASIC and System Department of Microelectronics, Fudan
University, Shanghai 200433, China
3College of Micro-Nano Electronics, ZJU-Hangzhou Global Scientific and
Technological Innovation Centre, Zhejiang University, Hangzhou 310027, China
*Corresponding authors. Email: ztsong@mail.sim.ac.cn; pengzhou@fudan.edu.cn;
minzhu@mail.sim.ac.cn
Figure S1 Sb device with 120-nm bottom electrode. High-angle annular dark-field
(HAADF) image (A) of Sb cell and corresponding EDS spectroscopy mappings
(B-F).
Figure S2 Resistance-Voltage curves of Sb devices with different-width pulses.
The bottom electrode sizes are 200 nm (A), 120 nm (B) and 60 nm (C) respectively.
The results were obtained from the single cell for each size by using Picosecond Pulse
Labs and Keithley-2400 with a self-designed signal switching box.
The as-deposited Sb devices were in low-resistance states, and thus we firstly
amorphized them to high-resistance states with 10,000-ps pulses. Subsequently, we
tested resistance change as pulse voltage increasing to figure out the switch voltage of
Set operation. The applied pulse width varies from 242 to 10,016 ps (set as 101 to
10,000 ps), and the amplitude ranges from ~0.1 V to ~7.5 V, which is the maximum
output voltage produced by Picosecond Pulse Labs. In this work, we defined that the
Set operation can be achieved when the resistance difference between high- and
low-resistance states exceeds one order of magnitude. Therefore, we concluded the
speed limit as 242 ps (set as 150 ps) rather than 230 ps (set as 101 ps) for 60-nm Sb
device. The fastest speeds were 278 ps and 359 ps for 120- and 200-nm Sb devices,
respectively. For switch voltage, we defined it as the voltage at the first transition to
the lowest resistance state, for example, the switch voltage of 60-nm cell was 6.9 V
when 242-ps pulses were applied. After every test, the Sb cells were re-amorphized to
high-resistance states using 10,016-ps pulses (>4.0 V for the 200-nm, >3.8 V for the
120-nm and >2.9 V for the 60-nm).
The programming power of the 60-nm Sb device is 1.9 mW when the width of the
Reset pulse is set as 10,000 ps, and it will increase to 10 mW as the pulse width
reduces to 500 ps. The switching power is significantly larger than previous studies,
0.7~1.1 mW with a 50-ns plateau [1]. The crystallization power of 60-nm devices
ranges from 0.23 to 0.87 mW.
Figure S3 Resistance-Voltage curves of GST devices with different-width pulses.
The bottom electrode sizes are 200 nm (A), 120 nm (B) and 60 nm (C) respectively.
The results were obtained from the single cell for each size by using Tektronix
AWG5002B pulse generator and Keithley-2400 with a self-designed signal switching
box. According to the above definition, the resistance difference between high- and
low- resistance states of the 200-nm GST device can exceed one order of magnitude
until the pulse width reduces to 30 ns. Thus, the speed limitation was 40 ns for the
200-nm device. For 120- and 60-nm GST devices, the fastest speeds were 30 ns and
20 ns, respectively.
Figure S4 High-speed test system. A, High-speed test box including DC input, RF
input and detection port. B, Sb devices for the high-speed test. C, Connection during
the experiment. D, The captured 150-ps pulse, the width of which is actually 242 ps.
This system consists of four elements. They are respectively the high-speed test box
(Fig. S4A), Picosecond Pulse Labs (Fig. S4C), Keithley-2400 (Fig. S4C) and
computer (not shown in this figure). Figure S4C presents the test circles, where the
DC port is connected with Keithley-2400 with the coaxial cable while the RF port
connects with the generator with high-speed RF cable, and a captured 150-ps pulse.
From the captured waveform (Fig. S4D), the full width at half maximum (FHWH) of
the 150-ps pulse is widened to ~242 ps, which is still the fastest switching speed as
recorded in the PCMs.
Figure S5 The captured waveform of 101-ps pulse. The pulse width is calculated as
the FWHM.
Figure S6 Captured waveforms of 101- to 10,000-ps pulses when Sb devices were
loaded. The actual widths (calculated by FWHM of the pulses) are listed as following:
t101-ps=230 ps, t150-ps=242 ps, t200-ps=278 ps, t300-ps=359 ps, t400-ps=423 ps, t500-ps=498 ps,
t1,000-ps=973 ps, t5,000-ps=4,972 ps and t10,000-ps=10,016 ps, respectively.
Figure S7 Influence of the trailing edge of the applied electrical pulses on the
resulting device resistance at a base temperature of 77.5 K. A, Reset resistances
dependence of trailing edge and programming power. Variation of pulse parameters is
illustrated in the inset to A. B, Resistance distributions of the different trailing edges
for the read pulses.
To prove the origin of the change in resistance, we investigated the relationship
between the high resistance of reset and the trailing edge (fall time). In this test, a
Keithley 4200A-SCS analyzer was employed to produce the pulses and read the
resistance, and the ambient temperature was set to 77.5 K. This design was mainly
due to two reasons: 1) the rise/fall time of the pulse produced by the Picosecond Pulse
Labs (Model 10,070A) is constant, 65 ps (the real-time is uncontrollable and ranges
from 100 to 200 ps, shown in Fig. S6);
2) the shortest trailing edge of the pulses produced by the 4200 analyzer is 20-ns,
which needs a lower ambient temperature to amorphized Sb devices.
In the investigations, the Sb devices were first set to a low resistance state, ~350 Ω,
before any reset operations. To switch the Sb devices to a higher resistance state, we
gradually increased the pulse voltage, which had a 20-ns plateau duration and 20-ns
rise/fall time. When the programming power reached ~10.5 mW, a higher resistance
state suddenly appeared, which is labelled by the orange dots in Fig. S7A. Increased
trailing times would reduce the resistances of reset. Similar regulars existed when the
switching power increased to ~12.7 mW (Red squares in Fig. S7A), and with the
same trailing times the higher resistance can be obtained due to the higher switch
powers. The read pulse is constant, 0.1 V@1 μs, and it delays 100 ns with the force
pulse. Figure S7B shows the resistance distributions obtained from the read pulses as
the programming power is 12.7 mW. This result is well consistent with Salinga’s
work [1] and can directly prove that the change in resistance originated from the phase
transition of element Sb.
Figure S8 Resistance shift investigations of Sb devices in the high and low
resistance state. The shift coefficient was derived by fitting the experimental data
with the equation R(t)=R0(t/t0)ν, where R0 is the initial resistance at time t=t0, and ν is
the fitted drift coefficient. The shift coefficient of amorphous Sb devices is ~0.060,
close to the value of Salinga’s Sb devices, ~0.10. The ν of crystalline devices is much
smaller, ~0.022.
Salinga et al. [1] have made great progress for the first time to verify phase change
storage using pure Sb devices in low ambient temperature, 100-250 K. In those
devices, Sb amorphization cannot be realized at room temperature (RT). However, the
distributions of amorphization windows [1] implied that the amorphization of element
Sb can be achieved in the RT. The reduced heat barrier thickness has shown the
ability to widen the amorphization windows. In our Sb devices, heat dissipation is
much easier since the active Sb area is surrounded by the higher thermal conductivity
materials, for example, λTiN, ~67 W m-1 K-1, is six times larger than λSiO2, < 10 W
m-1 K-1. The T-shape structure lowers the difficulty in Sb amorphization. Secondly,
Salinga’s work [1] has also indicated that reducing the trailing edge can effectively
push the critical temperature to a higher level, which means the amorphization may be
achievable at RT by using a shorter trailing edge like tens to hundreds of picoseconds.
Actually, we have already tried to switch Sb using electric pulses with 2- to 100-ns
trailing edges, but failed to amorphization at RT. That is why we only displayed the
electric windows using ps pulses with 65-ps trailing edge (the real trailing edge is
100~200 ps, Fig. S6) in Fig. S2. The third point is the programming power. The
increased programming power can effectively improve the critical ambient
temperature [1], while the amorphization powers used in our work, 1.9~10 mW, 2~10
times larger than Salinga’s studies, 0.7~1.1 mW.
From the above discussion, it can be understood that the amorphization of our Sb
devices at RT is attributed to a smarter structure with better heat dissipation, shorter
trailing edge and larger programming powers, which well agrees with the results of
ref. 1. By similar means, Cheng et al. and Aggarwal et al. also achieved Sb
amorphization using fs laser pulses at RT [2,3].
Besides, the resistance shift of Sb devices was investigated and depicted in Fig. S8.
Both amorphization and resistance shift were realized in the RT, and 0.1 V was used
to read the device resistances, where the time interval was ~5 s between each
measure. The shift coefficient was derived by fitting the experimental data with the
equation R(t)=R0(t/t0)ν, where R0 is the initial resistance at time t=t0, and ν is the fitted
drift coefficient. The shift coefficient of amorphous Sb devices is ~0.060, close to the
value of Salinga’s Sb devices, ~0.10. The ν of crystalline devices is much smaller,
~0.022. These results also prove that the change in resistance originated from the
phase transition of element Sb.
Figure S9 Electrical performance of Sb2Te3 device. A, R-V curves obtained using
Tektronix AWG-4012 arbitrary waveform generators. B, R-V curves obtained using
Picosecond Pulse Labs (Model 10,070A). C, Dependence of Set speed on the applied
pulse voltage, which shows that the shortest pulse width to achieve Set operation is 3
ns in the Sb2Te3 device with 120-nm bottom electrode.
The rising/falling times of electrical pulses produced by Picosecond Pulse Labs (Fig.
S9B), 100~200 ps, are one order of magnitude shorter than that of pulses by Tektronix
AWG-4012 arbitrary waveform generators (Fig. S9A), ~2 ns, leading to a weaker
thermal trailing and lower crystallinity (larger low-resistance value). Thus, the
switching voltage of Sb2Te3 PCM required in the ps test system (4.5 V@3 ns, Fig.
S9B) is significantly larger than that using AWG-4012 waveform generators (1.8
V@3 ns, Fig. S9A).
Figure S10 Electrical performance of Ag2.31In4.56Sb61.27Te31.86 device. A, R-V
curves obtained using Tektronix AWG-4012 arbitrary waveform generators. B,
Dependence of Set speed on the applied pulse voltage, which shows that the shortest
pulse width to achieve Set operation is 3 ns in the AIST device with 200-nm bottom
electrode.
Figure S11 Thermal stability investigation of elemental Sb devices. A, Change in
normalized resistance of Sb devices with respect to time under different temperatures,
60 (red), 65 (green) and 70 °C (blue). B, Fitting results by using the Arrhenius
equation, indicating the amorphous state of Sb devices can remain ~6.7 months at
room temperature.
In the investigations, to start with, we reset Sb cells to a high-resistance state. These
cells were heated to 60~70 °C respectively with a heating rate of 20 °C/min, and then
the temperatures were maintained. Subsequently, the resistances of devices were
sampled per 5 seconds using the Keithley-2400 and recorded by LabVIEW. Figure
S11A presents the change in normalized resistance of Sb devices with respect to time,
where the devices were defined as the failure when the resistances fell to half of the
initial states at the corresponding temperature. We can see that the amorphous state of
the Sb device can remain ~190 s at 70 °C, and then the maintenance time increases to
~1400 s at 60 °C.
Furtherly, we investigated the retention time for the Sb device using the Arrhenius
equation t = A exp (Ea/kBT), where t is the time to failure when the resistance of a
Reset PCM cell, at a certain isothermal heating temperature, falls to half of its initial
magnitude (detailed curves seen in Fig. S11A); A is a proportionality constant; Ea is
the activation energy, and kB is the Boltzmann constant. Figure S11B shows that the
Sb can remain amorphous for ~6.7 months at 20 °C, which also indicates that the Sb
can meet the requirement for long-time memory applications at room temperature.
References:
[1] M. Salinga, B. Kersting, I. Ronneberger, V. P. Jonnalagadda, X. T. Vu, M. Le Gallo, I.
Giannopoulos, O. Cojocaru-Mirédin, R. Mazzarello, A. Sebastian, Nat. Mater. 2018, 17, 681.
[2] Z. Cheng, T. Milne, P. Salter, J. S. Kim, S. Humphrey, M. Booth, H. Bhaskaran. Sci. Adv. 2021,
7, eabd7097.
[3] S. Aggarwal, T. Milne, N. Farmakidis, J. Feldmann, X. Li, Y. Shu, Z. Cheng, M. Salinga, W. HP
Pernice, H. Bhaskaran. Nano Lett. 2022, 22, 3532-3538.