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Rule-driven VLSI fuzzy processor
Abstract
In this article the authors propose the design of an architecture for a general-purpose fuzzy processor whose main features are: pre-processing of inferences to reduce the number of rules to be processed and increase the processing speed; pipeling of the various inference execution stage; parallel computation of the degree of activation of the antecedents of a single rule; mixed technology design, as the Kernel of the processor is entirely made up of fuzzy-gates based on a discrete-analog approach.
... This architecture is suited for automatic synthesis of digital fuzzy controller. G. Ascia et al. [31] proposed a rule driven fuzzy processor to address some real time hardware issues. They also proposed VLSI architecture for fuzzy inference that includes rule chaining [32] and fuzzy expert system for traffic in ATM network. ...
... Figure 12 shows the defuzzification unit from [52]. A VLSI architecture of the rule driven fuzzy processor has been done by G. Ascia et al. [31]. An important feature of their design is the fuzzy gate designed to execute fuzzy computation. ...
... Figure 13. Defuzzifiers [31]. ...
... This architecture is suited for automatic synthesis of digital fuzzy controller. G. Ascia et al. [31] proposed a rule driven fuzzy processor to address some real time hardware issues. They also proposed VLSI architecture for fuzzy inference that includes rule chaining [32] and fuzzy expert system for traffic in ATM network. ...
... Figure 12 shows the defuzzification unit from [52]. A VLSI architecture of the rule driven fuzzy processor has been done by G. Ascia et al. [31]. An important feature of their design is the fuzzy gate designed to execute fuzzy computation. ...
... Figure 13. Defuzzifiers [31]. ...
1 A contributory paper on the study of VLSI archi-tectures of various fuzzy processors and controllers designed for various applications is presented. The paper focuses on the study of VLSI implementation of fuzzy logic hardware to result in small silicon area, high speed of operation and adaptability to different application domains. This paper reviews the circuit and architecture level designing of various compo-nents of the fuzzy processors, such as, fuzzifiers, de-fuzzifiers, inference and rule base. A comparative analysis of the performance of these components has been performed. It is observed that there is a scope for further improvement in terms of power consump-tion, speed of operation, area and redundancy in these fuzzy processors. Further, from the study it is seen that the design emphasis should be more on in-ference engine performance and defuzzification units, because of the complexity of computations handled by them. The optimization in these units results in a significant improvement in the overall performance of the system.
... Many variations [1][2][3][4][5][6][7][8][9][10][11][12][13][14] have been proposed to improve the inferencing performance. The speed bottleneck of these fuzzy inference processors lies in the calculation of the matching degree. ...
... The main drawback of these fuzzy inference processors [7][8] is that they do not cover the ignorance of the input measure. Asica, Catania and Russo [12] assumed that each membership function is composed of nine segments. Based on this assumption, they used a binary search mechanism to obtain the matching degree between two membership functions. ...
This paper presents a high-speed VLSI fuzzy inference processor for the real-time applications using trapezoid-shaped membership functions. Analysis shows that the matching degree between two trapezoid-shaped membership functions can be obtained without traversing all the elements in the universal disclosure set of all possible conditions. A FPGA based pipelined parallel VLSI architecture has been proposed to take advantage of this basic idea, implemented on CycloneII-EP2C70F896C8. The controller is capable of processing fuzzified input. The proposed controller is designed for 2-input 1-output with maximum clock rate is 12.96 MHz and 275.33 MHz for 16 and 8 rules respectively. Thus, the inference speed is 0.81 and 34.41 MFLIPS for 16 and 8 rules, respectively
This paper describes an implementation of a fuzzy system. For this purpose, a dedicated architecture of a fuzzy logic controller system was elaborated in a FPGA circuit. This system has 3 independent inputs and 2 outputs and is composed of 4 internal blocks: fuzzification, inference, defuzzification and control. The fuzzy inference processes implemented are the techniques of a calculation of a only activated rules and an application of a parallel processing allows for very quick selection of only active rules from the whole rules base. The distribution and shapes of fuzzy sets allow to activate one or two fuzzy rules for one discrete (sharp) value of the input variable. Input and output linguistic variables and corresponding fuzzy sets were defined.
One of the growing mortal disease in this world is diabetes. An estimated 285 million people worldwide are affected due to it. This disease affects the brain functionality which leads to epilepsy or brain disorder. So it is necessary to identify the precise classifier for dealing with epilepsy risk level. Here a fuzzy processor is proposed for this purpose through VHDL language, since the fuzzy logic mimics the human behavior well. Simulation of diabetic epilepsy risk level classification is done using VHDL language and synthesized in Xilinx through both the environment windows and FOSS. The fuzzy processor is checked for the two categories homogeneous and heterogeneous system which is used to classify the diabetic epilepsy risk levels. And the utilized resources were discussed with its statistics.
In recent years, there has been renewed interest in using large scale homogeneous cellular arrays of simple circuits to perform image processing tasks and to demonstrate interesting pattern forming phenomena.
Systems in a great number of fields, such as process control [I], Hw-Sw Codesign [2], database [3], decision making [4] and image processing [5]-[6], are modelled using Fuzzy Logic [7]. The increase of the fuzzy applications is due to its inherent capacity to formalize algorithms which can tolerate imprecision and uncertainty, emulating the cognitive processes that human beings use every day [8].
Neural computing, fuzzy logic and evolutionary computing are widely used in a broad range of application fields. While many fields take full advantage from conventional von Neumann processors, there are still classes, such as for example intelligent systems in high-energy physics, requiring the speed of fully hardware implementations. In the first part of this chapter, we discuss the hardware specifications of intelligent systems. These are outlined as basic specifications (including external input/output architecture, topology for neural networks or defuzzification function for fuzzy systems), hardware specifications (including the technology and the precision required), and performance specifications. These specifications are mapped over existing architectures such as general purpose (micro controllers and digital signal processors, extended instruction set architectures and coprocessors), and dedicated ones. Further, we review a sample of various VLSI implementations including digital and analog. We also investigate a selection of basic building blocks suitable for neural networks, fuzzy logic and genetic algorithms.
This paper propose a review on VLSI fuzzy processor. Now a day's fuzzy logic plays a vital role in many applications due to its natural representation. To increase the no of real time application fuzzy processor can be incorporated with FPGA. A review on fuzzy processor is illustrated for various applications. For developing real time operation FPGA becomes one of the most successful of technologies. This paper starts with an introduction of Fuzzy in previous literature, after that various VLSI based fuzzy processor are discussed. All these application are described with its basic block and its implementation.
In this paper we present a fuzzy multiprocessor card which is capable of significantly increasing the performance, in terms of time, of a generic fuzzy inference learning algorithm based on techniques that do not use the derivative of the function to be learned, such as genetic algorithms
An adaptive tracking control architecture is proposed for a class
of continuous-time nonlinear dynamic systems, for which an explicit
linear parameterization of the uncertainty in the dynamics is either
unknown or impossible. The architecture employs fuzzy systems, which are
expressed as a series expansion of basis functions, to adaptively
compensate for the plant nonlinearities. Global asymptotic stability of
the algorithm is established in the Lyapunov sense, with tracking errors
converging to a neighborhood of zero. Simulation results for an unstable
nonlinear plant are included to demonstrate that incorporating the
linguistic fuzzy information from human experts results in superior
tracking performance
In this paper we present a design for a general-purpose fuzzy
processor, the core of which is based on an analog-numerical approach
combining the inherent advantages of analog and digital implementations,
above all as regards noise margins. The architectural model proposed was
chosen in such a way as to obtain a processor capable of working with a
considerable degree of parallelism. The internal structure of the
processor is organized as a cascade of pipeline stages which perform
parallel execution of the processes into which each inference can be
decomposed. A particular feature of the project is the definition of a
`fuzzy-gate', which executes elementary fuzzy computations, on which
construction of the whole core of the processor is based. Designed using
CMOS technology, the core can be integrated into a single chip and can
easily be extended. The performance obtainable, in the order of 50 Mega
fuzzy rules per second, is of a considerable level
The paper presents a simple robust algorithm for the recognition
of a 2100 Hz tone with periodic phase reversal and the disabling of an
echo canceller based on soft computing. The authors have used a novel
tool that is able to extract fuzzy knowledge using a hybrid technique
based on genetic algorithms and neural networks. The approach proposed,
compared with signal detection solutions existing in literature, is
certainly more efficient in terms of robustness to channel noise and can
therefore be usefully applied in all cases in which signals are to be
detected with very low SNRs
The paper presents the design of a VLSI fuzzy processor which is capable of performing fuzzy inferences based on the α-level sets theory. The use of the α-level sets family to represent fuzzy sets allows a considerable saving of memory resources if compared with conventional fuzzy inference methods which use membership functions to represent fuzzy sets. The main features of the architecture presented are parallelism and scalability. The processor comprises a set of units which work parallelly and asynchronously to process the various rules. The structure is easy to scale up, as an increase in the number of processing units does not produce bottlenecks in performance. The performance obtainable is about 300 KFLIPS, with a clock frequency of 50 MHz, 8 input variables, either crisp or fuzzy, and an 8 bit resolution
In this paper we present proposals of some basic synchronous fuzzy circuits which are of help in the design of fuzzy processors. Our proposal is a compromise between a digital and an analog solution. We discretize the degrees of membership and make each elementary operator regenerate the valid levels We thus obtain circuits which virtually make no mistakes, regardless of the number of cascading stages and retroactions. So these circuits exhibit high noise immunity. This means that these “fuzzy-gates” are robust. As the fuzzy-gates proposed use a CMOS technology similar to that of the digital approach, they share the performance of the latter as far as dissipated power is concerned
Fuzzy inference, a data processing method based on the fuzzy theory that has found wide use in the control field, is reviewed. Consumer electronics, which accounts for most current applications of this concept, does not require very high speeds. Although software running on a conventional microprocessor can perform these inferences, high-speed control applications require much greater speeds. A fuzzy inference date processor that operates at 200000 fuzzy logic inferences per second and features 12-b input and 16-b output resolution is described
The design of a monolithic CMOS analog function synthesizer based
on a current-mode algorithm and its application in fuzzy membership
function synthesis is presented. The proposed circuits require only one
reference current, independently of the course or the number of
implemented functions. The networks are temperature and technology
insensitive. Other features are a small chip area and a simple design
process for any arbitrary functions. Matching considerations allow a
prediction of the available approximation accuracy. Theoretical
evaluations are validated by measurements of several membership
functions fabricated in an experimental 1.0-μm CMOS technology
Fuzzy Control of Three Links of a Robotic Manipulator
- K Kumbla
- M Jamshid