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Transactions on Energy Conversion
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Abstract—In this paper, a single-stage rectifier-less boost
converter circuit (SSRBC) for piezoelectric energy harvesting
from ambient vibration was proposed. The proposed rectifier-less
circuit acted as a boost converter to extract energy from a
piezoelectric device (PD). It combined the conventional boost,
buck-boost methods using two split inductors and single filter
capacitor. The proposed integrated circuit topology functioned in
both positive and negative half cycles generated by the PD. In the
proposed topology, inductors were invigorated by being enveloped
with the current, which was produced by the PD through the
switches. This facilitated active rectification of ultra-low AC
(amplitude < 0.5 VP). Theoretical analysis, control strategies,
simulation and experimental study were presented. The proposed
circuit was capable of converting a low amplitude AC voltage of
0.5 VP into 5.1 Vdc. The highest output power extracted by the
proposed circuit was 281.1 µW, which outperformed existing
circuits. It could potentially facilitate the advancement of
vibration-based energy harvesting systems for low power demand
applications such as sensors, quartz watches and portable
charging devices.
Index Terms—AC/DC conversion, low power energy
conversion, boost, buck-boost conversion, switching circuit,
piezoelectric energy harvesting.
I. INTRODUCTION
iezoelectric devices (PD) are extensively used electro-
mechanical devices to convert vibrational/mechanical
energy (ME) into electrical energy in the form of alternating
current (AC). These PDs are potential solutions for
durable/long life micropower actuators/generators. They can
also be used for powering/charging devices like sensor nodes,
mobiles, animals tracker and medical devices [1], [2], [3], [4],
[5], [6]. However, the AC generated by the PD should be
converted into direct current (DC) for usage or storage.
Therefore, it requires a rectifier circuit for the rectification
process, which plays a key transition role between the PD and
the storage device. Numerous PEH rectifier circuits have been
reported in the literature [3], [7], [8]. The simplest rectifier
circuit is a conventional full-wave bridge rectifier (FBR) [9].
This work was supported by the Southern Cross University, Lismore,
Australia.
E. Mahesh, a Ph.D. Candidate with the Faculty of Science and Engineering,
Southern Cross University, Lismore, Australia, NSW, 2480 (email:
m.edla.10@student.scu.edu.au; maheshedla26@gmail.com).
However, such circuit suffers from a significant drawback for
piezoelectric energy harvesting (PEH) application. As the
vibrating PD electrically performs as a capacitive source [10],
the produced current, iP (t) needs to charge and discharge the
internal capacitor, CP in both positive and negative cycles. Thus,
most of the PD voltage, which is less than the forward voltage,
Vf is internally dissipated [11]. Thus, the output voltage and
power are relatively low. Considering most electronic devices
require 2 - 3 Vdc to operate [12], its application is limited.
To overcome the above shortcoming, to improve the power
flow from the PD into the storage device, and to boost the DC
voltage, researchers have proposed single-stage AC-DC
converters and dual-stage circuits, which contains two stages.
The first stage is an AC-DC circuit to rectify the voltage, and
the second stage comprises a DC-DC circuit [13], [14] to
stabilise the output voltage. A flow chart demonstrating the
processes of the single-stage and dual-stage circuits is shown in
Fig. 1.
Fig. 1. Processes of (a) single-stage, (b) dual-stage circuits.
A researcher [11] proposed an active rectification circuit to
eliminate the internal losses in the conversion process and to get
adequate output power from the PD. Their results showed that
the extracted output power is 5.8 times higher in comparison
with the FBR circuit. However, the extracted output power at
optimal load was limited.
A novel self-powered SSHI circuit was proposed by [15] to
overcome the shortcoming of energy dissipation in the PD. The
proposed circuit used two capacitors to detect the PD voltage
flipping points. It also required two additional capacitors at the
L. Yee Yan and P. Ricardo Vasquez are with the Faculty of Science and
Engineering, Southern Cross University, Lismore, Australia, NSW, 2480.
Prof. M. Deguchi is with the Department of Electronics and Control
Engineering, National Institute of Technology, Niihama, College, Japan, 792 –
0022).
Mahesh Edla, Yee Yan Lim, Deguchi Mikio, Ricardo Vasquez Padilla
A Single-Stage Rectifier-Less
Boost Converter Circuit for Piezoelectric Energy
Harvesting Systems
P
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load resistor and eight diodes because of their functionality in
the state of art circuit (SAC). In addition, it included 3 stages of
operation, namely, voltage flipping, AC-DC conversion, and
DC-DC conditioning circuit, which was complex and costly. A
self-powered hybrid rectifier circuit was proposed by [16],
which was a combination of SSHI [17], [18], [19] and SECE
rectifier [20], [21]. The proposed circuit provided optimal
performance between peak output power and optimal rectified
voltage range. Nevertheless, this method was intricate because
of the size limitation of energy harvester, losses and cost. The
block diagram of their proposed hybrid rectifier circuit is shown
within the context of Fig. 2.
Fig. 2. (a). Cantilever based PD, (b). Block diagram of a typical hybrid rectifier
circuit.
Study conducted in [22] reported a complex conjugate
method to improve the power flow into the storage device. This
method required a large inductor (tens to hundreds of Henry),
which was impractical [7]. Another possible way of extracting
maximum power from the PD is by using non-linear circuits
such as switching concept with a direct attachment of the PD to
the storage device/capacitor. The concept of non-linear
technique was proposed by [23]. It was shown that under
similar conditions, the proposed circuit has dramatically
improved the output power by several times in comparison to
the FBR circuit. The above-described circuit was later enhanced
[23], through switching commands. However, this method also
required a large inductor.
To implement the non-linear method, a synchronised
switching harvesting on inductor (SSHI) circuit was proposed
by [12], [24], [15]. However, it required an external power
supply and a complicated additional circuit to drive the
switches. Another circuit, namely a single-stage boost converter
circuit, was proposed by [25]. The proposed circuit also
required an external power supply to trigger the external
switches. In addition, it used a split capacitor topology, which
made it costly and complicated. In a recent study, a self-
powered H-Bridge rectifier circuit, which excluded the need of
external power supply, was proposed by the authors [26]. The
proposed circuit was capable of working with ultra-low voltage,
as in the case of PDs. However, the voltage gain of the circuit
was very low.
In a nutshell, existing literature indicated that most studies
focused mainly on power rectification [27], [20], [28], [29],
maximum power extraction [30] and voltage regulation by
using a self-powered or externally powered dual-stage rectifier
circuits.
In this study, a single-stage rectifier-less boost converter
(SSRBC) with a grouping of switching command, boost
conversion, and buck-boost conversion was proposed. This
proposed circuit incorporated several components and garnered
their advantages, including: a traditional boost converter [9], a
bridgeless boost rectifier for low voltage [31], a discontinuous
mode step up rectifier [25] and an SSHI circuit [15], [16]. This
study mainly focused on the improvement of standalone
rectifiers without using an additional transformer [16], which
affected the performance of the SSRBC circuit. In addition,
although the stress on inductor in the switching process affected
the performance [32], [33], [34] of the proposed converter, no
attempt has been made to expel it. Therefore, the proposed
SSRBC circuit employed two MOSFET switches and two
separate inductors to work as a standalone rectifier-less circuit,
which reduced the stress in the switching process during both
positive and negative half-cycles, which helped in increasing
the output voltage and power. Besides, it employed a polarity
detector and a single storage device to reduce the complexity of
the circuit.
The proposed SSRBC could potentially achieve maximum
output power by implementing the boost and buck-boost
operation with the PD while avoiding additional components,
namely flyback transformers, capacitors, and diodes, as shown
in the literature. In this paper, the predicted, simulated and
experimentally generated operating waveforms of the SSRBC
were presented and discussed. The behaviour of the SSRBC
was equivalent to an association of the boost and the step-up
converter rectifiers. Accordingly, their synergistic advantages
could be combined and utilised.
II. PD INTERNAL CHARACTERISTICS AND POWER
EXTRACTING CONVERTER CIRCUITS
This section unveils circuit modelling of PD and commonly
used rectifier circuits. Subsequently, the proposed SSRBC is
delineated.
A. PD Circuit Model
When a typical PD is subjected to mechanical excitation, it
can be exhibited as a current source, iP (t) or voltage source, VP
(t) in parallel or in series with its internal capacitor, CP [10],
[35], [36], [37] respectively, as depicted in Figs. 3(a) and 3(b).
Fig. 3. Standard PD circuit models (a). Current source, (b). Voltage source.
The voltage and the current fluctuate with the mechanical
excitation during both half cycles as presented in Fig. 4. The
current produced by the PD needs to first charge and discharge
the internal capacitor, CP. Interval 1 (Fig. 4) is the charging
time. During this time, the rectifier circuit is in turn OFF
condition. Thus, there is no output to the load capacitor. This
persists until the magnitude of PD voltage, VP (t) is equal to the
output voltage of the load capacitor. Interval 2 will then begin,
where the circuit delivers output to the storage device. A similar
process is expected in the negative half cycle [14].
The current generated by the PD can be expressed as;
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(1)
where
is the magnitude of the current, is the angular
frequency, and time is represented by t. Alternately, the PD
voltage (Fig. 3b) can also be expressed as;
(2)
where Tin is the time period of the voltage source, VP is the
amplitude of the voltage waveform. The open-circuit (OC)
voltage of PD or input voltage to the electronic circuit is
represented by VP (t). A similar process is expected in the
negative half cycle.
Fig. 4. The current and voltage waveforms of a vibrating PD.
B. Power Extracting Interface Circuits
In the literature, numerous Linear (direct connection
between PD and storage device) and Non-Linear (switching and
direct connection) power extracting/conversion circuits have
been reported [2], [38], [39]. The simplest direct connection
circuit is the FBR, which is also known as conventional circuit.
1) FBR Interface
The operation of the FBR circuit was explained in [37]. The
conventional FBR circuit is shown in Fig. 5(a) while the
operation and its waveforms are depicted in Fig. 5(b). The FBR
circuit's limitation was that the load capacitor does not charge
in time Interval 1. The load capacitor was charged in Interval 2.
Fig. 5. (a). Conventional FBR circuit, (b). output waveforms.
Therefore, the output power, of FBR circuit varied with
the load capacitor voltage, VC [40], and it could be calculated
as follows:
(3)
It could be shown that maximum output power occured
when:
Vrect =
(4)
C. Proposed SSRBC Circuit
The proposed SSRBC circuit is depicted in Fig. 6. Two
inductors were employed in the proposed circuit to reduce the
stress in the switching process. A polarity detector was used to
detect the polarities of PD. These two voltages were compared
with a pulse generator, Ref 2. This was achieved using AND
gate, namely A1 and A2. When the AND gate operation took
place, high and low signals were sent to switches S1 and S2,
respectively. In order to rectify and boost the signal, S1 and S2
should be able to conduct and block the currents in both positive
and negative half cycles during the ON and OFF conditions,
respectively. Since MOSFET was a bidirectional device, it
could be used for flowing current from drain to source or from
source to drain (D ↔ S). It was noted that the proposed SSRBC
worked as a boost and buck-boost converter in the positive and
negative cycles of PD, respectively. Overall, SSRBC has six
modes of operation in both cycles, which are explained below.
D. Operating Modes of SSRBC
Mode 1: Mode 1 started in the positive half cycle of the PD.
During Interval 1, it charged its internal capacitor. When the
internal capacitor was fully charged, the switch, S1 was in ON
condition. During this time, inductor, L1 was energised by the
PD, as illustrated in Fig. 7(a). Thus, the inductor current, iL1
would gradually increase from zero while diodes D1 and D2
were in reverse biased. At this time, the load resistor, RL was
powered by the load capacitor, CL. In addition, in the positive
half cycle, switch S3 turns ON, and lower terminal of the PD
was grounded. In this method, the switches, S1 and S2 were
turned ON using a zero current switching method to minimise
the switching losses.
Mode 2: Mode 2 also started in the positive half cycle, but at
this time, switch, S1 was in turned OFF condition.
Fig. 6. Proposed SSRBC circuit with PD.
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Transactions on Energy Conversion
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Fig. 7. Modes of the proposed SSRBC circuit in the positive half cycle of PD (a: Mode 1, b: Mode 2, c: Mode 3, d: Mode 4, e: Mode 5, f: Mode 6).
The energised inductor current, iL1 in Mode 1, freewheeled
via D2, and charged load capacitor, CL as illustrated in Fig. 7(b).
At this moment, the voltage across the inductor was equal to the
difference between the PD voltage and the load capacitor
voltage, VC. The load capacitor charged until iL1 became zero.
Then the SSRBC would be back to Mode 1 if the input voltage
was still within the positive half cycle.
Mode 3: As soon as iL1 became zero, diode D2 turned OFF.
As a result, the reverse leakage loss triggered by the diodes
could be eliminated in this mode, as illustrated in Fig. 7(c).
Modes 1 – 3 continued until the end of positive half cycle.
Mode 4: Modes 4 - 6 occurred in the negative half cycle of
the PD. Mode 4 operation was similar to Mode 1 when the
switch S2 turned ON. During this time, inductor, L2 was
energised by the PD. Thus, the inductor current, iL2, deviated
from zero to its peak value. Load capacitor, CL was powered to
the load resistor, RL, while the diodes, D1 and D2 were in turned
OFF condition as illustrated in Fig. 7(d). In addition, in the
negative half cycle, switch, S4 turned ON, and lower terminal
of the PD was grounded.
Mode 5: This mode started in the negative half cycle of PD
when the switch, S2 was in turned OFF condition. During this
time, the inductor current, iL2 continued to freewheel via D1 and
charged the load capacitor, CL, as shown in Fig. 7(e). The
voltage across the inductor was equal to the difference between
the PD and the load capacitor voltage, VC.
Mode 6: When the inductor current decreased to zero, D1
automatically turned to OFF condition at t2. It avoided the
reverse leakage losses of the diode. At this time, load resistor,
RL was powered by the load capacitor, CL, as illustrated in Fig.
7(f).
According to the above working modes, both of the
MOSFETs were in ON condition, and the diodes were in
turning OFF condition when the current was zero. In both half
cycles, the additional switches, S3, S4 were turned ON
accordingly, and lower terminals were grounded. The current
charging through load capacitor returned to PD through the
body diode of S3 and S4.
III. THEORETICAL ANALYSIS & DESIGN
PROCEDURES
To enhance and optimise the power extracted from the PD,
impedance matching between the PD and the converter circuit
(SSRBC) was needed. The input impedance of the proposed
circuit was changeable by varying the duty cycle, D and the
switching frequency, fs. To optimise the PD voltage, this study
mainly focused on basic topology, analysis and verification. To
simplify circuit analysis, the input applied to the proposed boost
converter was the AC voltage generated by the PD. The applied
switching frequency and its duty cycle were the key factors to
extract maximum power from the PD [25]. Note that switching
frequency should be calculated considering the parameters of
the output impedance of PD, inductance of inductor, switching
response of transistors and load impedance.
Fig. 8. The switching methods of SSRBC circuit in the positive half of PD.
For this reason, the proposed circuit employed two inductors
and a switching process to change the magnetic field across the
inductor. According to Faraday’s law, changing the magnetic
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field of the inductor caused higher potential energy. Besides,
the proposed circuit employed a polarity detector and a logic
gate to turn ON and OFF the switching signals based on the PD
half cycles. Since the applied switching frequency was much
larger than the excitation frequency of PD; the input voltage of
PD was deemed constant during the switching period in both
half cycles. Fig. 8 shows the boost mode operation of the circuit.
In the boost operation, when the switch, S1 was ON, the current
from the PD increased the inductor current, iL1, until it reached
its peak, ipk. However, input current became zero in the buck-
boost operation, when the switch was in OFF condition, diode
current, iD2, and the peak inductor current, ipk started to
discharge from t1 and reached zero at t2 as represented in Fig. 9.
As soon as the positive cycle finished, the negative half cycle
would start and would follow a similar procedure. The loops in
boost mode are explained as follows;
Loop 1 (0 < t < d1Tsw):
Loop 1 occurred in Mode 1. At this time, the voltage across
the inductor, equalled to the PD voltage, :
(5)
Loop 2 (d1Tsw < t < (d1Tsw + d2Tsw)):
Loop 2 occurred in Mode 2. At this time, the load capacitor
was charged by the peak inductor current, ipk. The PD voltage
across the inductor can be expressed as [41]:
(6)
and the current through the CL is expressed as:
(7)
Loop 3 (d1Tsw < t < Tsw):
Loop 3 occurred in Mode 3. When all switches were in OFF
condition, no PD voltage and current were flowing through the
circuit. At this time, the PD voltage and current across the
inductor can be expressed as:
VL = 0, iP (t) (8)
Fig. 9. Waveforms of proposed boost rectifier.
Furthermore, the current through CL can be expressed as:
(9)
The predicted output waveforms of the proposed SSRBC
circuit when the switches were in ON, OFF condition in the
positive half cycle are depicted within the context of Fig. 9.
Tsw is the time period of the switching process, d1 is the duty
cycle of ON time, d2 is the duty cycle of OFF time [39], as
shown in Fig. 9. Note that only the positive half cycle was
presented. Similar behaviour was expected in the negative half
cycle. The inductor's peak current, ipk (Fig. 9) was charged by
the PD current (Loop 1). In the boost mode, the PD current and
the inductor current were equal. However, in the buck-boost
mode, the inductor current's peak value became zero when the
switch was turned OFF.
In the boost mode, the peak value of input current can be
represented as [25]:
ipk (t) = d1 Tsw VP (t)/L (10)
As per inductor volts-second balance, net volt-seconds
added to inductor during one switching period is:
VP (t) d1Tsw = (V/2 – VP (t)) d2Tsw (11)
d2Tsw =
(12)
From the above, in each switching time, the average input
power, Pin can be derived:
Pin = VP (t) ipk (d1 + d2) / 2 (13)
The input energy in the positive half cycle can be derived as
follows:
dt (14)
From (16) – (20), the input energy can be derived as follows;
(15)
(16)
(17)
Ein =
(18)
where V/2 is much larger than the average value of VP (t), from
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0 to Tin/2, and Tin is the time period.
The input current in both half cycles of the PD was equal to
the current stored in the inductor. Therefore, the input power
can also be stated as in Eq. 13. The analysis thus far ignored the
internal resistance, RP of the PD. According to Loop 1, 2, 3,
without considering the internal resistance, the input energy, Ein
of the PD was inversely proportional to the inductance and
directly proportional to the square root of duty cycle and
switching period, and it can be expressed as:
Ein =
(19)
Eq. 18 assumes all components were ideal. Therefore, the
output energy, Eout must be equal to Ein on the time scale, which
can be expressed as:
Eout =
(20)
where Tin is the switching period of PD voltage in the positive
half cycle, RL is the load resistance.
Eq. 20 shows that the output energy was governed by the
duty cycles and the switching frequency. In both positive and
negative half cycles, the diodes, D1 and D2, were used to
transmit the energy from the inductor to the load capacitor. The
maintained diode’s voltage rating was higher than the output
voltage for safe operation. In the presence of an ideal diode,
maximum power could be obtained using the proposed circuit,
but this was practically impossible. Thus, the diode loss due to
its forward voltage was a major issue in this analysis, which
affected the performance of the circuit.
To validate the proposed topology's performance, the voltage
gain and output power were calculated. The voltage gain can be
defined as the ratio of the output voltage of the proposed
converter to its input voltage or PD voltage:
=
(21)
Based on Eq. 21, the output voltage can be controlled by the
switching time and the duty cycle.
The duty cycle was application-specific, and the load
resistance was dependent on the output power. Therefore, with
a specific voltage and power demand, the inductance of the
inductor was designed according to the chosen range of the duty
cycle and the switching frequency. The proposed SSRBC
circuit rectified the signal generated by PD and boosted it to DC
voltage. Thus, it required a control circuit. The two ends of the
PD terminals (i.e. positive and negative terminals) were used to
detect the polarity. The resultant signals of the polarity detector,
namely high and low, were sent to the comparators, A1 and A2.
The resultant signals of comparators were used to operate the
switches (i.e. turning ON or OFF) in the SSRBC circuit.
IV. SIMULATION RESULTS
The waveforms simulated by SSRBC circuit using LTSPICE
are described within the context of Fig. 10. It should be noted
that an ideal source with negligible source impedance was
adopted in LTSPICE considering this study aimed at the
topology analysis. Thus, an optimal/ideal sinusoidal signal was
chosen in the proposed converter analysis. However, in the
experiment, the ideal source was replaced by the PD. Fig. 10
shows the low input AC voltage and the high rectified DC
voltage by the proposed topology at a frequency of 100 Hz with
an input voltage of 0.4 VP. The detailed explanation of the
results was described in the experimental study section.
Fig. 10. Simulation results with an ideal source (a). Sinusoidal source, (b).
Inductor current, (c). Rectified voltage.
V. EXPERIMENTAL STUDY
In this study, the performance of the SSRBC circuit was also
experimentally examined. In the experiment, the power
extracted from PD through SSRBC circuit was investigated by
applying different input voltages at a constant frequency.
A flow chart of the experimental setup and process is shown
in Fig. 11. For ease of fabrication, the proposed SSRBC circuit
was designed on a breadboard. The circuit components were
carefully chosen to minimise losses and to maintain a safe
operation in the circuit. The parameters of components used,
the applied voltage and the frequencies are summarised in Table
Ι.
Table Ι: Parameters of various components used in the experiment.
Components
Parameters
Diodes, D1, D2
MOSFETs, S1, S2
Inductor, L1, L2
Load capacitors, CL
Load resistors, RL
Applied frequency
Input voltages
Switching frequency
Duty cycle
Schottky diodes, 0.3 Vf
AP2306AGN, 0.3 Vth, 20 V
22 µH, 47 µH, 3.9 mH, 4.7 mH, and 6.8 mH
10 µF
100 KΩ, 330 KΩ, 660 KΩ, and 910 KΩ
100 Hz
0.4 VP, 0.7 VP
50 kHz
0.87
A. Experiment: Varying PD voltage at constant frequency
The proposed circuit was tested with a PD excited by a
controlled mechanical vibration source. A microfibre
composite (MFC) patch (type: M2814 - P2, dimensions: 37 mm
x 17 mm x 0.18 mm, CP: 30.79 nF) was utilised as piezoelectric
material (i.e. PD) in this study. This patch was surface bonded
to one end of the aluminium beam (dimensions: 205 mm x 20
mm x 1 mm). This end was attached to a mechanical shaker,
where maximum strain was expected.
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Fig. 11. Flow chart explaining experimental development and setup.
Fig. 12. Oscilloscope waveforms, (a). Input AC voltage, (b). Switching signal
based on AC (only negative half cycle is shown).
Fig. 13. Energised inductors L1 and L2, (a). Positive half cycle, (b). Negative
half cycle.
The free end was attached to two permanent magnets, acting
as proof mass. A function/signal generator (model: Agilent
33210A) was utilised to provide a sinusoidal signal to the power
amplifier (model: 2706, B & K Agilent), which enlarged the
signal before activating the mechanical shaker (model: APS –
113). The shaker generated mechanical excitations to the
cantilever beam with PD according to the input frequency. As
shown in Table Ι, the vibration frequency was fixed at 100 Hz,
and the amplitude was varied (i.e. 0.4 VP and 0.7 VP). Note that
the applications at such frequency range could be found in [42].
The DC voltage rectified and boosted by the proposed topology
through SSRBC circuit was directly connected to a variable DC
power supply, which performed like a battery or a low electric
current source.
Fig. 14(a). Switching pulses and, 14(b). Energised inductor in Mode 1.
Fig. 15. Zoom-in view of switching signal, (a). One switching pulse applied,
(b). Simulated waveform of Mode 1, (c). Experimental waveform of Mode 1,
(d,e). Inductor leakage.
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Transactions on Energy Conversion
8
The voltage across the load capacitor was measured by a
voltmeter (FLUKE 117). Besides, the output waveforms were
observed in the oscilloscope. The current through the load was
measured using a load resistor (Table. Ι). It was also verified
with an ammeter (CD 771) to calculate the output power.
The experimental waveforms, namely the applied PD
voltage, the switching voltage, the energy stored in inductor
current and the characteristics of current in both pulses (ON &
OFF) are shown within the context of Figs. 12-15.
The rectified voltage and the output power from the SSRBC
circuit over different resistances are shown in Fig. 16.
Fig. 16. Outputs of the proposed SSRBC circuit with input voltage of 0.4 VP (a)
Rectified voltage, (b) Output power.
As shown in Fig. 16(a), the rectified voltage increased with
increasing load resistance regardless of the input voltage and
the inductance. It was also observed that the proposed topology
was producing the highest rectified voltage at load resistance of
910 kΩ, with inductance of 47 µH and input voltage of 0.4 VP.
For better performance, the input voltage must be equal to or
higher than Vth of the MOSFETs. In addition, when the PD was
subjected to excitation, it produced current that was stored in an
inductor in the form of magnetic field. When the PD current
began to flow, an opposing magnetic force was generated. At
this time, in the positive cycle, the switch S1 was turned ON
and OFF. Therefore, when the switch was ON, the PD current
was enveloped in the circuit, resulting in a higher magnetic field
across the inductor since changing the magnetic field caused
more potential difference. When the switch was OFF, the
magnetic field around the inductor was discharged through the
diode, D2, and charged the load capacitor.
Fig. 17. Output power with various inductors.
In other words, the enveloped inductor current (stored in 47
µH inductor) was synchronised with the PD voltage at a
frequency of 100 Hz. Thus, it delivered maximum rectified
voltage. During this time, the current through the load resistor
was measured to calculate the output power through the SSRBC
circuit and the outcome is plotted in Fig. 16(b). The resistors in
Table Ι were connected sequentially as load.
Fig. 17 shows the output power through SSRBC circuit over
various inductances with an input voltage of 0.7 VP. Note that
to enhance the extracted power from PD, impedance matching
between the PD and SSRBC circuit was necessary.
The input impedance of the SSRBC converter was adjusted
by varying the duty cycle and the switching frequency.
Recalling that the main aim was to verify the new circuit
topology in satisfying the voltage demand and in boosting the
input voltage into DC voltage. Here, the applied switching
frequency and its duty cycle were the key factors to extract
maximum power from the PD. As shown in Fig. 17, by
adjusting the above factors, highest output power was achieved
with an inductance of 47 µH. Similar trend was also observed
with other inductors. By using the proposed circuit and
topology, highest output power achieved was 281.1 µW with an
input voltage of 0.7 VP.
Overall, for the purpose of comparison, the output power of
relevant circuits available in the literature is tabulated in Table
II.
Table II. Comparison of output of circuits available in literature.
Circuit sources
No
of
PD’s
Input
voltage
(VP)
Output
voltage
(Vdc)
Output
power
(µW)
External
power
supply
[43]
1
0.65
1.8
75
Yes
[44]
1
1.2
-
30
Yes
[36]
3
3.5
-
254
Yes
[45]
1
0.5
3
24
No
[46]
1
0.5
-
43.35
Yes
[47]
3
20
33
Yes
[25]
-
0.4
3.3
40
Yes
[31]
-
0.4
3.3
54.4
Yes
Proposed
SSRBC
1
0.4
5.1
281.1
Yes
It was found that by using the proposed topology, the SSRBC
circuit outperformed various previously proposed circuits in
terms of rectified voltage and output power.
VI. CONCLUSION
A novel rectifier switching circuit was proposed and studied
in this paper. The proposed SSRBC topology was capable of
rectifying and boosting the low amplitude AC voltages
generated by the PD used in piezoelectric energy harvesting
system. This converter integrated the boost, buck-boost and
dual-stage circuits into a single-stage rectifier-less circuit. In
addition, it avoided the need of complicated dual-stage and
costly circuit. The operation and performance of the SSRBC
circuit were validated through simulation and experiment. The
prototype converted a 0.5 VP AC generated by PD into a DC of
5.1 Vdc, and achieved the highest output power of 281.1 µW.
The proposed circuit was also found to be superior to existing
circuits in terms of rectified voltage and output power.
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Transactions on Energy Conversion
9
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Transactions on Energy Conversion
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Mahesh Edla was born in India in 1993. He received his
B.Tech in electrical and electronics engineering from
JNTUH, India, and M.Sc degree in electrical and
electronics engineering from Coventry University, U.K.
He worked in the piezoelectric energy harvesting field
at Coventry University for four months. Currently, he is
a casual lecturer in the Faculty of Science and
Engineering at Southern Cross University, Australia,
where he is working towards his PhD in electronics
engineering. His research interest includes designing electronic circuits for the
rectification process.
Yee Yan Lim is a senior lecturer and the engineering
course coordinator in the Faculty of Science and
Engineering at Southern Cross University. He obtained
his PhD degree in civil engineering from Nanyang
Technological University, Singapore in 2012. Yee
Yan’s current research interests are smart materials
based structural health monitoring and energy
harvesting, as well as geopolymer concrete.
Ricardo Vasquez Padilla is an associate professor and the
Chair of Engineering and IT in the Faculty of Science
and Engineering at Southern Cross University. Prior to
that position, He worked as research fellow at CSIRO
Energy Centre in Newcastle (2014-2016) and as assistant
professor at Universidad Del Norte (2011-2014). He
received his doctoral degree (2011) at University of
South Florida in the Department of Chemical and
Biomedical Engineering. His research interests include
modelling, optimisation, mechanical design, economic analysis and testing of
thermo-mechanical systems. He is currently working on the design of solar gas
phase receivers and the improvement of piezoelectric wind energy harvesters.
Mikio Deguchi received his master's degree at Kyoto
University Graduate School of Engineering in 1985.
After working at Mitsubishi Electric Corporation for
about 10 years, he was transferred to National Institute
of Technology (KOSEN), Niihama College. He received
his degree of PhD in engineering from Kyoto University
in 2003. Currently, he is a professor in the Department
of Electronics and Control Engineering at National
Institute of Technology (KOSEN), Niihama College.
His research interests include electronic measurement technology, electronic
circuit application, and development of intelligent teaching materials.
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