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Publications (4)
This paper demonstrates the first silicon-verified FBMC encoder and decoder designed to emulate beyond 224Gb/s wireline communication. It also compares the performance of FBMC to PAM and DMT in three steps. First, the digital power and area consumption are compared using measured results from the manufactured test chip. Second, the data rate is det...
This paper describes an analog multi-tone receiver capable of processing three data streams running at 15 Gb/s, one in baseband and two in quadrature over carriers at 15GHz, achieving an aggregate rate of 45Gb/s over a single physical channel. The receiver maximizes bandwidth efficiency by using orthogonal sub-channels and avoids the need for analo...
Limits of data rate over a wireline channel depend on the channel characteristics, the signaling or modulation scheme, and the complexity one can afford for its implementation. This article compares two signaling schemes, namely baseband and discrete multi-tone (DMT), for two example channels, one with a smooth frequency response and one with a not...
In this paper, a pulse width amplitude modulation multiplication scheme, that uses a novel flipped voltage follower (FVF) based current switch is presented. Simulations performed in Hspice with the standard AMI 0.5μm CMOS process shows a system with dynamic range of ±140 mV for both input signals with a maximum gain error of 1.1%. The circuit works...
