Je-Kwang Cho

Raontech · Analog circuit design

A new SRAM-based pixel circuit is presented for use in a high-voltage digitally-driven pixel array in a micro-display panel. The pixel circuit is based on the standard 6T SRAM structure, but uses two more transistors of which gate dc-bias is controlled to adjust the pull-up strength of the inverters in the SRAM. This allows the pixel circuit to be...

A new digital pixel driving scheme is presented for reducing power in the column-line drivers in a single-pulse-PWMbased display. Rather than updating the digital pixel memory value for every access of the memory, the proposed driving scheme utilizes the property that there are only two level transitions in a single-pulse PWM for representing a dig...

A method for implementing a hardware-efficient multi-channel digital sigma-delta modulator is presented for processing field sequential multiple inputs. Compared to a conventional one, which processes the inputs in a time-multiplexed manner without sharing integrator memory for the multiple sequential inputs, the proposed method significantly reduc...

A new adaptive frequency search algorithm (A-FSA) is presented for a fast automatic frequency calibrator in wideband phase-locked loops (PLLs). The proposed A-FSA optimizes the number of clock counts for each frequency comparison cycle, depending on the difference between the target frequency and the PLL output frequency, as opposed to a binary fre...

A high-speed dynamic biasing technique is presented for reducing op amp power in discrete-time, multistage, analog circuits employing op amp sharing. To exploit typical power scaling in such circuits, a charge pump, of which the on-times of up and down currents are controlled by two comparators, performs rapid change of the op amp bias condition be...

A 4-bit, third-order, continuous-time ΣA modulator is presented for use in wireless communications systems. Based on small-signal noise models, analyses for reducing noise in the feedback digital-to-analog converter (DAC) are presented in detail. This enables easy performance/area optimization for the DAC unit elements and the RC noise filter in th...

This paper presents a multi-channel light-emitting diode (LED) driver IC with a current-mode current regulator. The proposed current regulator replaces resistors for current sensing with a sequentially controlled single current sensor and a single regulation loop for sensing and regulating all LED channel currents. This minimizes the current mismat...

A 2-2 cascaded switched-capacitor ΣΔ modulator is presented for design of low-voltage, low-power, broadband analog-to-digital conversion. To reduce power dissipation in both analog and digital circuits and ensure low-voltage operation, a half-sample delayed-input feedforward architecture is employed in combination with 4-bit quantization, which res...

In this paper, an analysis of the memory effect in two amplifier-shared switched-capacitor integrators for a discrete-time sigma-delta (\(\varSigma \varDelta\)) modulator is presented. Interaction between the integrators is modeled by feeding an integrator output voltage to another integrator input and vice versa and multiplying by a coefficient de...

A switched-capacitor analog reconstruction filter with a new reference switching scheme is presented for reducing sensitivity to reference noise in audio-band sigma-delta (ΣΔ) digital-to-analog converters. By sampling a single reference voltage with its polarity depending on the filter digital input, the ac component of the reference voltage is att...

A new input feedforward sigma-delta modulator architecture is presented for the design of low-voltage low-power high-precision oversampling analog-to-digital conversion. A half-sample delay is added in the input feedforward path in combination with multi-bit quantization to reduce integrator output swing and relax timing constraints in the feedback...

A fully integrated fractional-N frequency synthesizer (FNFS) in 0.5 μm SiGe BiCMOS technology is implemented. To cover wideband frequency operation, a switched capacitor bank LC tank VCO and an Adaptive Frequency Calibration (AFC) technique are used. A 3-bit 4th order Σ–Δ modulator is used to reduce out-of-band phase noise and to meet a frequency r...

A global system for mobile communications direct conversion receiver with an integrated synthesizer is implemented with a 0.35-mum BiCMOS technology. Proposed second-order intercept point calibration method is analyzed and verified by measurements. The maximum IIP2=66 dBm is achieved by an 8-b resistive calibration code. The receiver draws 57/63 mA...

A fractional-N frequency synthesizer (FNFS) in a 0.5-μm SiGe BiCMOS technology is implemented. In order to operate in a wide-band frequency range, a switched-capacitors bank LC tank voltage-controlled oscillator (VCO) and an adaptive frequency calibration (AFC) technique are used. The measured VCO tuning range is as wide as 600 MHz (40%) from 1.15...

This paper presents a fractional-N synthesizer with a 3-bit 4th-order interpolative Σ-Δ modulator for a GSM/GPRS direct conversion transceiver. With an integrated VCO and an integrated loop filter, the synthesizer achieves the phase noise performances less than -78dBc/Hz at close-in offset and less than -116dBc/Hz at 400kHz offset. The chip was fab...

A multi-mode GSM direct conversion receiver with integrated synthesizer is implemented by a 0.35 μm BiCMOS technology. The proposed IP2 (second order intercept point) calibration method is analyzed and verified by measurements. The maximum IIP2 (second order input intercept point) of 66 dBm is achieved by an 8 bit resistive calibration code. The re...

This paper presents a fractional-N synthesizer with a 3-bit 4(th)-order interpolative Sigma-Delta modulator for a GSM/GPRS direct conversion transceiver. With an integrated VCO and an integrated loop filter, the synthesizer achieves the phase noise performances less than -78dBc/Hz at close-in offset and less than -116dBe/Hz at 400KHz offset. The ch...

Phase noise performance and current consumption of Radio Frequency (RF) Voltage-Controlled Oscillator (VCO) are largely dependent on the Quality (Q) factor of inductor-capacitor (LC) tank. Because the Q-factor of LC tank is determined by on-chip spiral inductor, we designed, analyzed, and modeled on-chip differential inductor to enhance differentia...

A 2 GHz wide band low phase noise voltage-controlled oscillator (VCO) is presented. To achieve excellent phase noise performance while maintaining wide band frequency tuning characteristic, a 6-bit digitally controlled switched-capacitor bank and tail current control scheme are used. The effect of the gate length of the MOS switches on the Q-factor...

A fractional-N frequency synthesizer (FNFS) in a 0.5-μm SiGe BiCMOS technology is implemented. In order to operate wideband frequency range, a switched capacitor bank LC tank VCO and an adaptive frequency calibration (AFC) technique are used. A 3-bit 4th order Σ-Δ modulator is used to reduce out-of-band phase noise and to meet a frequency resolutio...

A fractional-N frequency synthesizer (FNFS) in 0.5-um SiGe BiCMOS technology is implemented. In order to operate wideband frequency range, a switched capacitor bank LC tank VCO and an Adaptive Frequency Calibration (AFC) technique are used. A 3-bit 4th order T-A modulator is used to reduce out-of-band phase noise and to meet a frequency resolution...

As a building block for a GSM/PCN dual band RF transceiver IC, a low noise variable gain RF down conversion mixer is designed and fabricated using a 15 GHz-f_T, 0.5 μm 3-metal 2-poly BiCMOS process. Careful consideration is paid to the low noise performance of the mixer. Moreover, using constant-impedance input/output stages, RF input and...

A 2-GHz, low noise. low power CMOS frequency synthesizer. with all LC-tuned VCO (voltage-controlled oscillator) is presented. The synthesizer consists of an LC-tuned VCO, a dual-modulus frequency divider, a phase frequency detector, and a charge pump. An optimized spiral inductor with a Q-factor of 3 is achieved and is used for the LC-tuned VCO. Th...