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A Low-Cost, Portable Alternative for a Digital Lock-
In Amplifier Using TMS320C5535 DSP
Aurojyoti Das, Tavva Yaswanth
Product Engineering Services,
Wipro Technologies,
Pune, India
Abstract—A Lock-In Amplifier (LIA) is used to remove noise
from an input signal by the use of a reference signal. Generally
the sampling rate of LIAs is much higher than the required
frequency in typical applications. Moreover the hardware
configuration of LIAs is much better than the requirement. The
signals are processed using high-end signal processors which
increase the cost of LIA. This paper aims to develop an
inexpensive and portable alternative for the digital lock-in
amplifier. This will enable application of LIAs in remote
locations and in distributed systems which require multiple
signal processors simultaneously. Similar implementation exists
on microcontrollers and embedded processors. This paper
utilizes a Texas Instruments (TI) TMS320 series Digital Signal
Processor (DSP) which is a low-power signal processor. The lock-
in amplifier is implemented on a TMS320C5535 eZDSP board.
Unlike other LIAs the reference signal is generated in the DSP,
hence obviating the requirement for an external reference input.
The output is obtained through UART interface and observed on
a computer. It is tested with a noisy sinusoidal signal given as
input and the output signal is plotted and verified.
Keywords— DSP; C5535; eZDSP; Lock-In Amplifier; TMS320;
I. INTRODUCTION
The Digital Lock-In Amplifier is an expensive piece of
equipment which is generally used in laboratories to remove
noise in a given signal. The Lock-In process is a simple
concept. The input signal is locked in phase with a reference
signal, generally given as input to the LIA. The Phase
Sensitive Detector (PSD) produces a DC component and a
sinusoidal component. The sinusoidal component is filtered
out by a Low-Pass Filter. The remaining DC component is the
final output of the LIA. The Lock-In Amplifier was invented
by Robert H. Dicke who founded the Princeton Applied
Research (PAR) to market the product. It is an extremely
selective ac voltmeter used to measure a single-frequency
signal obscured by noise [1]. It is often used to measure
phase-shift, even when the signals are large and of high
signal-to-noise ratio, and do not need further improvement.
However, the cost and size of the Lock-In Amplifier makes it
unsuitable for remote applications which require inexpensive
and portable hardware. Moreover the typical sampling rate of
an LIA is much higher than the signals generally given as
input to it. High-end Signal Processors and filters are used in
the LIAs which drive the costs of the instruments upwards.
The alternative to these expensive instruments are the
microcontroller-based [2], [3] and software based
implementations [4], [5]. Such implementations have been
carried out on several platforms of microcontrollers and
Digital Signal Processors. They provide more freedom in
terms of lower cost, portability, lower power requirement and
easier modification as and when required. Moreover, the
reference signal and PLL can be produced within the DSP
itself which makes it an attractive option. LIAs find
implementation in several domains including medical and
biology physics [6] – [10], sensor systems [11], [12] etc. The
implementation on high-end DSPs is still rather expensive.
The size and power requirements of these DSPs make them
particularly unsuitable for remote and battery-powered
installations. Moreover the software-based implementations
which require use of powerful hardware would limit their
applicability and cost-efficiency. In such scenarios a low-
powered DSP with a smaller footprint might be suitable.
Hence, this work aims to provide such a solution. Here the
Lock-In Amplifier is implemented on a TI TMS320C5535
eZDSP board which is a low-power DSP of C5000 series of
DSPs. The C5000 series features low-power DSPs for audio
processing applications. The DSP can generate the reference
signal for the given input signal. Hence, an external reference
signal is not required. The reference signal is generated in the
DSP at the same frequency as that of the input signal. It offers
several input/output features which allow its application in
multiple scenarios. Its low-cost and low-power operational
abilities make it an attractive option for large-scale
deployment and in networked applications.
This paper explains the hardware and the implementation on
the TI TMS320 DSP. First the working principle of a Lock-In
Amplifier is explained. Then the implementation of the
amplifier in the eZDSP board is explained. The hardware and
software aspects of the implementation are explored. Finally
the experimental setup and testing scenario are presented
along with the results. Finally the conclusion is drawn
accordingly.
II. PROPOSED SOLUTION
The basic working principle of Lock-In Amplifiers is
explained here. The input signal which is noisy is taken as
input through a band-pass filter. A reference signal at the same
frequency as that of the input signal is generated in the Lock-
In Amplifier or given as input. The Phase Sensitive Detector
checks the phase difference between the input signal and the
reference signal. Phase shifting is done to ensure that the two
signals are in-phase. A Phase Locked Loop is generated to
keep the two signals in-phase. Both the signals are multiplied
in the multiplier. The following output is obtained:
978-1-4673-6540-6/15/$31.00 ©2015 IEEE
IEEE INDICON 2015 1570201395
1
cos 1
22 sin 2
2 2 2 sin 3
2
2cos2 4
Hence, the output is a DC component added with a
sinusoidal component. The sinusoidal component is removed
by passing the signal through a low-pass filter. In some LIAs
there are two components derived from the input signal and
the reference signal. The output gives the in-phase component
and the quadrature-phase component. The quadrature-phase
component is derived by shifting the reference signal by 90°.
Both the in-phase component and the quadrature-phase
component are then passed through a low pass filter to obtain
the final output.
The implementation of the lock-in amplifier in a
microcontroller-based DSP makes the instrument portable,
inexpensive and customizable. The TMS320C55x platform is
a low-power DSP family that allows implementation of
complex DSP algorithms on inexpensive hardware. It is
energy-efficient and small which makes it attractive for
embedded applications. It can be installed in a distributed
system with multiple sensors such that it can collect signals
from all the sensors and process them simultaneously. It can
be interfaced with a network where processed signals from all
the nodes are collected at a central node. The core power
requirement is low as well, at just 22 mW for 100 MHz
operation. Hence, this DSP was chosen for the implementation
of LIA.
III. IMPLEMENTATION
A. Hardware Implementation
The TMS320C5535 eZdsp evaluation board features an
AIC3204 codec to handle stereo audio signal input. It has a
stereo-in port and a stereo-out port, with individual ports for
each channel. The ADC of the codec is capable of decimation
filtering in order to process over-sampled signals. The input is
given through the stereo-in port and the output is taken from
the stereo-out port. The GPIO pins or the expansion port can
be used but then the 10-bit ADC of the DSP will have to be
used which has a limited sampling frequency. Hence, the
stereo ports are used. The input is supplied through a single
channel. After the sampling is done the signal is sent to the
DSP through I2S2 port. The Lock-In process is implemented
and the signal is sent back to the codec. It is then converted to
analog in the DAC and given as output through the stereo out
port. It is observed on an oscilloscope. Alternatively, the
output is obtained through the USB port which is connected to
the UART. A suitable application such as Docklight is used to
log the serial output. The output is then plotted and observed
in Matlab. The ezDSP board is powered by the USB
connector J2. Hence, no external power supply is required. A
pre-amplifier may be used before taking the input in case the
input has low amplitude or is weak.
B. Software Implementation
The first step to be followed is initialization of the
hardware. The clock frequency is set at 100 MHz and the
AIC3204 codec is initialized with the required sampling
frequency and signal gain. The UART port is initialized for
the serial output.
The AIC3204 codec converts the input analog signal
to a digital signal. Decimation filtering is used to
process the oversampled data. The signal is amplified and
stored in the SARAM. A reference signal
in the
form of a sine wave is generated at a constant frequency, same
as that of the input signal. This step should be automated but
due to unavailability of a frequency-meter or proper method,
the frequency needs to be set manually. The phase difference
of the input signal and the reference signal is nullified by
synchronizing the ADC operation of the codec and the wave
generation by the internal oscillator.
Ring modulation is used to multiply the two signals. Ring
modulation is a method of frequency mixing or heterodyning
two signals. The two signals are multiplied in time-domain,
which is equivalent to convolution in the frequency-domain.
The product signals are the sum and difference of the two
USB
Embedded
XDS100
JTAG
TMS320
C5535
USB
P1
96 x 16 pixel
OLED Display
AIC
3204
Stereo In
Stereo Out
P3
LDO
SPI
Flash
SW1 SW2
SPI
I2S2
UART
JTAG
USB
P2
LEDs
GPIO
I
2
C Bus
Fig 2 Block Diagram of eZdsp Board
Input Signal Band Pass
Filter
Low Pass
Filter Output
Reference
Signal
Fig 1 Block Diagram of a simple Lock-In Amplifier
2
input signals. In this case the input signals are the noisy signal
and the reference signal
. Since both the
signals are at the same frequency, the output is a signal at
twice the frequency of the input signals. The ring modulation
process is illustrated in Fig. 4. The input signals are at
frequencies f1 and f2. The output signals are at frequencies f1 +
f2 and f1 - f2. Since f1 = f2 the output will be a signal at 2f1. If
signals at other frequencies are present they will be
unaffected. In typical applications the noisy background
consists of other signals at several frequencies. Hence, the
ring modulation process is a vital function in the lock-in
process.
The output as derived above in eq. (3) consists of a DC
component as well as a sinusoidal component. A low-pass
filter of 100 Hz stop frequency is used to remove the
sinusoidal component. An IIR filter of order 2 and stop
frequency 100 Hz is implemented in the DSP. The end result
is a DC signal as shown in eq. (4). The output is given out
through AIC3204 codec or through UART. The UART is
connected to the XDS100V2 JTAG, which interfaces with
Code Composer Studio on a computer. Hence, the same USB
port can be used to get the serial output. The UART is
configured at a suitable baud rate (typically 57600 bps). A
serial terminal program such as Docklight is used to log the
serial data in a table. The table is then imported into Matlab
for data plotting.
IV. TEST SETUP AND RESULTS
The input signal is a noisy sinusoidal wave (mono-
frequency signal). It was generated in Simulink using a sine-
wave generator and a random-number generator connected to
an adder. The amplitude of the signal is 2 and frequency is 5
KHz. The input signal is shown in Fig. 5. It was recorded as a
10-second audio signal on a single channel. It was then given
as input to the stereo input port. The DSP was programmed to
generate a reference signal at 5 KHz. It was taken out through
the stereo out port and displayed on the Digital Storage
Oscilloscope (DSO). The recorded signal is shown in Fig. 6.
After the Lock-In process was completed, the output was
obtained through the stereo out port and were observed on the
DSO. On the left channel the output of the product of input
signal and reference signals was supplied. On the right
channel the output from the low pass filter was supplied. Fig.
7 shows the output signal after the multiplication and passing
the signal through low pass filter. Here channel 2 represents
the output of the multiplier which is the ring modulation in
Fig 4 Ring Modulation
Fig 6 Reference Signal at 5 KHz
Fig 3 Flowchart for Software Implementation
Fig 5 Input Signal at 5 KHz
3
this case. It is a sinusoidal component with a DC offset.
Channel-1 represents the final output of the DSP which is a
DC component. Channel-2 represents the output after the
multiplication of the reference and the input signal. The output
as obtained through the UART is plotted in Fig. 8. In typical
applications such as in tunable laser diode spectroscopy of
gases the input signal is a ramp signal added with a sinusoidal
signal. Hence, instead of a dc offset the output in such
applications would contain a ramp signal. The same technique
is applicable to recover the output. The implementation of the
lock-in amplifier as shown in this paper is a simplified
version. It is however a viable alternative for low-power
applications.
V. CONCLUSION
The results depict a satisfactory performance of the LIA
implementation. The low-power operation and portability of
the DSP make it an attractive and feasible solution for remote
and battery-powered operations. The current implementation
however is based on the assumption that the frequency of the
input signal is known beforehand. Hence, the frequency of the
reference signal generated in the DSP is specified manually in
the code. To automate this step the frequency of the required
signal needs to be measured and then the DSP can generate
the reference signal at that frequency. The lock-in process
requires the reference signal and the input signal to be in-
phase. A phase sensitive detector may be used to ensure the
phase condition is met. The output in some LIAs feature an in-
phase component and a quadrature-phase component. This can
be added to this implementation as well.
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Fig 8 Output Signal obtained through UART
Fig 7 Output Signals from the two channels of stereo out
4