On the Blistering of Al2O3 Passivation Layers for Si Solar Cells

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ON THE BLISTERING OF Al2O3 PASSIVATION LAYERS FOR Si SOLAR CELLS
B. Vermang1,2, H. Goverde3, A. Lorenz2, A. Uruena1,2, J. Das2, P. Choulat2,
E. Cornagliotti2, A. Rothschild2, J. John2, J. Poortmans1,2, and R. Mertens1,2
1 Katholieke Universiteit Leuven (KUL), Oude Markt 13 Bus 5005, 3000 Leuven, Belgium
2 Imec, Kapeldreef 75, 3001 Leuven, Belgium
3 Eindhoven University of Technology (TU/e), PO Box 513, 5600 MB Eindhoven, the Netherlands
Phone: +32-16-28 7893; Fax: +32-16-28 1097; e-mail: Bart.Vermang@imec.be
ABSTRACT: Blister-free Al2O3-based surface passivation stacks for p-type Si passivated emitter and rear cells
(PERCs) are developed. Measuring the blistering area and effective surface recombination velocity, it is shown that
using (i) an Al2O3 layer ≤ 10 nm and (ii) out-gassing this Al2O3 film above 600 °C prior to capping is necessary.
These blister-free Al2O3-based stacks are implemented as rear surface passivation for p-type Si PERC: 148.25 cm2
screen-printed cells with an average efficiency of 19.0 % have been made. There is an obvious gain in open circuit
voltage of 5 mV compared to SiOx passivated PERC, thanks to enhanced rear surface passivation.
Keywords: Si, PERC, High-efficiency, Al2O3, ALD
1 INTRODUCTION
The present photovoltaic (PV) market is dominated
by crystalline Si solar cells. Its cumulative level of
capacity announced in 2009 was 24 GW and the
European PV Industry Association (EPIA) expects these
announced capacities to grow by about 30 % in 2010
after which the compound annual growth rate will level
off to about 20 % during later years to exceed 65 GW in
2014 [1]. As can be seen, it is generally expected that the
Si dominance in the PV market will continue for at least
the next decade.
In solar cell technology, given that ever thinner
wafers imply an increased surface-to-volume ratio,
sufficient surface passivation gains importance. The cost
of Si constitutes about 50 % of the module cost [2].
Therefore, in order to be less dependent on price
fluctuations of poly-silicon feedstock and wafers, and to
eventually realize cost targets significantly below €
1.00/Wp for c-Si modules, an evolution towards a
reduction of “grams of pure Si/Wp” is taking place.
An appealing candidate for outstanding Si surface
passivation is Al2O3, deposited by thermal atomic layer
deposition (ALD), plasma-enhanced (PE-) ALD or
plasma-enhanced chemical vapour deposition (PECVD).
The underlying mechanism is based on chemical
passivation - a low density of interface defects Dit - and
field-effect passivation with a high density of fixed
negative charges [3-10].
Annealing a thick enough Al2O3 layer, capping it
with SiOx or SiNx or annealing a stack of Al2O3 and SiOx
or SiNx can lead to blister formation. Blistering is the
partial de-lamination of a thick enough Al2O3 layer
caused by gaseous desorption in the Al2O3 layer upon
thermal treatments above a critical temperature: the
Al2O3 layer acts as a gas barrier and bubble formation
occurs [11]. Blistering of Al2O3 and capped Al2O3 layers
has been observed for various deposition techniques:
thermal ALD [11], PE-ALD [12] and PECVD [13,14].
As argued in [11], using a thin enough Al2O3 layer and
performing an annealing step prior to SiOx or SiNx
capping should be the solution to create blister-free
Al2O3-based stacks.
In this work, ALD Al2O3 based blister-free rear
passivation stacks for p-type Si passivated emitter and
rear cells (PERC) are developed and implemented.
2 EXPERIMENTAL
Thermal ALD Al2O3 films are grown in a commercial
(Cambridge Nanotech, Savannah S200) ALD reactor
using trimethylaluminium (TMA) and de-ionized (DI)
water as precursors.
Blisters are visualized and measured with a Nova™
NanoSEM scanning electron microscope (SEM) or an
Axio Imager 2 optical microscope (respectively from FEI
and Zeiss).
Quasi-steady-state photo-conductance (QSSPC) is
used to quantify the surface passivation level by
measuring the effective lifetime (τeff). In a first
approximation τeff of a symmetrically passivated c-Si
wafer can be written as in equation (1),





 (1)
with τbulk the bulk lifetime, W the c-Si wafer thickness
and Seff the effective surface recombination velocity.
Since saw damage removed (SDR) p-type CZ Si material
of only 150 μm thickness is used to characterize the
surface passivation, an estimation of the τbulk is needed.
This is done using temporal ALD Al2O3 to passivate
wafers of various thicknesses of the same CZ Si material
(starting thickness is 700 μm and used etching solution is
NaOH:H2O). Consequently, the inverse effective lifetime
is plotted as a function of the inverse wafer thickness.
This way, one can derive an estimation of τbulk from the
intercept of the linear fit with the vertical axis. This
estimation of τbulk is used to calculate Seff using equation
(1) and QSSPC measurements of τeff.
The used current-voltage (I-V) setup is a steady-state
Xe lamp solar simulator (Wacom Electric Co., WXS-
200S-20, AM 1.5G) with an illuminated area of 200 x
200 mm2, a small bias error and a good stability over
time, as shown in [15].
3 RESULTS AND DISCUSSION
3.1 Characterization of blister-free Al2O3 layers
The processing steps that can cause blister formation
in the rear passivation stack for PERC processing are (i)
the Al2O3 deposition itself, (ii) the deposition of the
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PECVD capping layer, and (iii) the co-firing (equals a
rapid thermal processor (RTP) with a peak temperature
above 800 °C for 1-2 s, see [16]). Using a thin enough
Al2O3 layer and performing an annealing step prior to
capping is supposed to be the solution to create blister-
free Al2O3-based passivation stacks. Therefore, the
process sequence shown in Table I is followed to create
Al2O3 / SiNx passivated SDR CZ Si wafers to study
blister formation and surface passivation as a function of
Al2O3 out-gassing temperature.
Table I: Used processing sequence to study blister
formation in Al2O3-based rear surface passivation stacks
for PERC.
Figure 1 shows Seff and the total blistered area of an
Al2O3 / SiNx stack fired at 865 °C peak temperature. The
10 nm Al2O3 layer has been out-gassed before the SiNx
capping using temperatures shown on the horizontal axis.
It is clear that by increasing this out-gassing temperature
the area of blistering decreases and even disappears for
temperatures above 700 °C. Also, as shown by a
declining Seff, the Si surface passivation of this Al2O3 /
SiNx stack is increasing as a function of out-gassing
temperature, until all blistering has disappeared. For out-
gassing temperatures above 700 °C, the Si surface
passivation gets worse, most probably because of
beginning crystallization.
Figure 1: Seff and the total blistered area of an Al2O3 /
SiNx stack fired at 865 °C peak temperature. The 10 nm
Al2O3 layer has been out-gassed before the SiNx capping
using temperatures shown on the horizontal axis.
3.2 Large-area industrial PERC with blister-free Al2O3
rear surface passivation
Al2O3 passivated PERC and reference SiOx
passivated i-PERC (see [17] and references herein) are
made, see Table II for the process sequences. For the
Al2O3 passivated PERC, various out-gassing
temperatures have been used: no out-gassing or at 400,
500, 600 or 700 °C for 20 minutes in N2 environment.
As can be seen in Figure 2, the average open circuit
voltage (Voc) clearly improves as a function of out-
gassing temperature. Even more, after out-gassing at 600
or 700 °C, the Al2O3 passivated PERC-type cells are
clearly better passivated at the rear compared to the well-
known i-PERC-type cells. This improvement in Voc is
expected thanks to the reduction in Seff and area of
blistering as seen in Figure 1.
Table II: Baseline Al2O3 passivated PERC (left) and
SiOx passivated i-PERC (right) process sequences.
Figure 2: Average Voc of Al2O3 passivated p-type Si
PERC as a function of out-gassing temperature (for 20
minutes in N2 environment). The out-gassing is
performed in between the Al2O3 deposition and PECVD
capping, as indicated in table II. Also the average Voc of
the SiOx passivated i-PERC reference is shown.
In the case of Al2O3 passivated PERC, an optimum
reaching an average efficiency of 19.0 % is found. This
compared to 18.7 % for the best SiOx passivated i-PERC
cell. There is an obvious gain in Voc of 5 mV, thanks to
enhanced rear surface passivation. See Table III for all
cell characterization results. More examination of Al2O3
passivated PERC compared to SiOx passivated PERC can
be found in [18] and [19].
Table III: Overview of the cell characterization results
(AM 1.5G) for the 148.25 cm2 Al2O3 passivated PERC
and SiOx passivated i-PERC. The process sequences are
given in table II. The cells are 150 µm thick, have a base
resistivity of 2 Ohm.cm and an emitter of 60 Ohm/sq.
Cell type
Size
(cm2)
Jsc
(mA/cm2)
Voc
(mV)
FF
(%)
Eta
(%)
Al2O3
pass. PERC
Avg.
(4 cells)
148.25
38.0
643
77.6
19.0
±0.2
±1
±0.2
±0.1
Best
cell
148.25
38.2
645
77.7
19.1
i-PERC
Best
cell
148.25
37.8
638
77.7
18.7
4 CONCLUSIONS
Using a thin enough Al2O3 layer (≤ 10 nm) and
performing an annealing step (> 600 °C) prior to capping
is the solution to create blister-free Al2O3-based rear
surface passivation stacks for p-type Si PERC.
Co-firing
Al2O3
Al2O3out-gassing: 200 to 900 C for 20 min in N2
PECVD SiNxcapping
Texturing / Polishing
POCl3diffusion (60 Ohm/sq)
Al2O3
PECVD capping rear
SiNxARC front
Laser ablation rear
Al rear / Ag front
Co-firing
Al2O3out-gassing SiOxrear
SiNxrear
148.25 cm2screen-printed PERC
Al2O3passivated rear SiOxpass. rear (i-PERC)
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For blister-free Al2O3 passivated PERC, a maximum
average efficiency of 19.0 % is reached. This compared
to 18.7 % for the best SiOx passivated i-PERC reference
cell. There is an obvious gain in Voc of 5 mV, thanks to
the improved rear surface passivation.
5 ACKNOWLEDGEMENTS
The authors greatly acknowledge the support of the
IMEC Industrial Affiliated Partner (IIAP-PV) program and
the imec PV support team.
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