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2556 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014
Tunable Self-Oscillating Switching Technique for
Current Source Induction Heating Systems
Alireza Namadmalan and Javad S. Moghani, Member, IEEE
Abstract—This paper presents a tunable self-oscillating switch-
ing (TSOS) technique for current source parallel resonant in-
verters. Using this technique, the inverter has lower voltage stress
in comparison with conventional methods such as phase-locked
loop (PLL) circuits or integral controllers. The new switching
technique instantly tracks the variation of resonant frequency.
In addition, the TSOS has the capability of phase error tuning
which is essential for parallel operation and zone control induction
heating systems. The TSOS method has simple structure and
operates in wide range of frequencies. Hence, the inverter can
be utilized as a general-purpose inverter to supply different coils,
loads and self-switched capacitor banks. The dynamics of the new
tuning system is compared with the PLL method in transient
conditions. A laboratory prototype with operating frequency of
25–100 kHz is implemented to verify the performance of the new
tuning system.
Index Terms—Induction heating (IH), inverters, phase-locked
loops (PLLs), self-oscillating switching method.
I. INTRODUCTION
INDUCTION heating (IH) systems play a key role in indus-
trial and commercial heating treatments such as thin strip
heating, annealing, hardening, and induction cooking. Heating
by induction requires high frequency power supplies operating
at a fixed or variable frequency. Conventionally, the power
supplies are based on resonant inverters because they provide
better sinusoidal waveforms with lower EMI and switching
power losses [1].
A large number of topologies have been investigated in this
area such as voltage source and current source resonant invert-
ers. Voltage source resonant topologies have various control
methods but they are affected by short circuit and paralleling
problems [2]–[7]. The current source resonant topologies have
limited control methods but they have short circuit protection
and paralleling capabilities [8]–[10]. For industrial IH systems,
the current source inverters have become more popular because
they are more reliable and cost effective [1]. For industrial IH
systems with ferromagnetic-core inductors, the commonly used
topology is current source resonant inverter because the parallel
resonant capacitors bypass high order harmonics, and hence re-
duce the core losses for low quality factor operations [11], [12].
Manuscript received December 20, 2012; revised February 27, 2013 and
April 20, 2013; accepted June 7, 2013. Date of publication July 11, 2013; date
of current version October 18, 2013.
The authors are with the Department of Electrical Engineering, Amirkabir
University of Technology, Tehran 15914, Iran (e-mail: reza.n.iut@gmail.com;
moghani@aut.ac.ir).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2013.2272278
The two major weaknesses associated with the current
source topologies are start-up and resonant inverter tuning
(RIT) problems. The RIT systems based on phase-locked loops
(PLLs) or integral controllers have a frequency deviation, Δf ,
from resonant frequency at start-up condition. The deviation is
caused by work coil tolerances, workpiece tolerances, resonant
capacitor degradation, etc. Consequently, there is a transient
time to lock the resonant frequency that makes higher voltage
stress at start-up duration [8], [9]. As a result, the current
source resonant inverters need a soft-starter even for full-load
conditions (low quality factors) [8].
For turn-to-turn fault of work coil, the resonant frequency of
the inverter changes instantly and makes large phase error, β.In
this condition, the conventional methods fail to track the instant
changes. Hence, the voltage and current stresses occur due to
the large phase error.
To suppress the stresses, current source inverters need a RIT
system that tunes the inverter with less transient response. A
RIT based on self-oscillating switching technique (SOS) has
the capability of instant tracking and phase error suppressing at
transients [13], but the SOS method has no control over phase
error and output power. Hence, SOS methods are commonly
used in constant output power applications such as rice cookers
and electronic ballasts [14]–[16]. Changing the phase error is
essential for parallel operation of resonant inverters and ZCIH
systems [11], [12] and [17], [18].
A tunable SOS method (or TSOS) is proposed to operate in
wide range of frequencies. The new method has the capability
of phase error tuning while taking the advantages of instant
resonant frequency tracking which can tune resonant inverters
with self-switched capacitor banks [19] and dual-frequency IH
systems [20]. This paper shows that the TSOS method is an
appropriate replacement for PLL circuits.
This paper is organized as follows: Section II describes the
system modeling, RIT systems and their transients. Section III
presents the TSOS method. Section IV and Section V, present
the experimental results and main conclusions of the paper,
respectively.
II. SYSTEM MODELING AND RIT PROBLEMS
Fig. 1 shows a current source parallel resonant inverter with
series blocking diodes. The inductance of dc-link inductor Ld
is much larger than the resonant inductor Lr, so under normal
steady-state operation the dc-link current is approximately con-
stant and the inverter injects an alternating square-wave current,
Ii, into the resonant tank through S1–S4 and S2–S3, as shown
0278-0046 © 2013 IEEE
NAMADMALAN AND MOGHANI: SWITCHING TECHNIQUE FOR CURRENT SOURCE INDUCTION HEATING SYSTEMS 2557
Fig. 1. Schematic of a current source parallel resonant inverter.
Fig. 2. Steady-state waveforms of output voltage Voand injected current Ii.
in Fig. 2. The output voltage of the inverter, Vo, (resonant tank
voltage) is like sine wave, see more in [8]–[10].
The parallel resonant tank impedance, Z(jω), is derived by
(1) where Cris the resonant capacitor and Rwis sum of the
workpiece resistance and coil resistance. By assigning zero
value to the phase of Z(jω),ϕz, the frequency at which Zero
Voltage and Zero Current Switching (ZVZCS) occurs is derived
by (2) where ωn,ωr, and ζare angular natural frequency,
angular resonant frequency and damping ratio, respectively
Z(jω)= jωLr+Rw
−ω2LrCr+jωRwCr+1 (1)
∠Z(jωr)=0→ωr=ωn1−4ζ2(2)
ζ=R2
wCr
4Lr
,ω
n=1
√LrCr
.
According to [10], the input resistance Rin of the inverter and
the peak value of the output voltage Vmare derived by (3) and
(4) at steady-state condition. Vin is the input voltage and Qis
the quality factor of the resonant tank. The phase error βis
equal to −ϕzand is the phase of injected current Iiwith respect
to Vo, see Fig. 2
Rin =8
π2(1 + Q2)(cos β)2Rw(3)
Vm=πVin
2cos(β)(4)
Q=ωrLr
Rw
.(5)
In industrial process lines with more than one heating stage,
each IH system requires a converter at its dc-link side for power
Fig. 3. Two current source parallel resonant inverters in parallel operation.
Fig. 4. Two RIT systems for parallel resonant inverters: (a) based on PLL and
(b) based on SOS method.
regulation and soft-starting [1]. By using TSOS, it is possible
to regulate and start the inverters independently when they
are directly connected to one variable dc-link. In addition, the
amplitude and phase of the coil current is controllable. Fig. 3
shows parallel operation of two inverters while the two coils
can be either magnetically coupled or not. Regarding (3), by
changing the βup to 30◦, the output power of each inverter
is increased up to 33.3% hence, changing the phase error is
essential for a RIT system.
A. RIT Based on PLL
Fig. 4 shows the two RIT methods for current source parallel
resonant inverters. Fig. 4(a) shows block diagram of a PLL
circuit that consists of a voltage controlled oscillator (VCO),
loop filter (LF) and charge-pump phase/frequency detector
(CP-PFD) to suppress the steady-state phase error. The impor-
tant parameters of a PLL circuit are pump voltage Vp,LF’s
resistor Rand capacitor C, center frequency fcand gain of the
VCO unit KVCO
. Loop filter capacitor voltage, VC, is directly
applied to input of the VCO unit [21], [22]. The VCchanges
2558 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014
between 0 up to the pump voltage Vp. Equations (6) and (7)
show the relationship between PLL circuit parameters
KVCO =fmax −fmin
Vp
(6)
fc=fmax +fmin
2.(7)
The fmin and fmax are the minimum and maximum operating
frequencies of the VCO unit corresponding to the minimum and
maximum values of the VC, respectively.
At start-up, the VCis zero and hence, the initial operating
frequency of the inverter will be fmin [21]. The charge-pump
phase detector gradually charges/discharges the VCthrough
loop filter resistor, R, to suppress the phase error. As long
as the inverter switching period, T, satisfies the condition
Tτ, where τ=RC, the PLL circuit has a proper designed
condition, see more in [21].
Regarding Fig. 4(a), a pulse shaping circuit is essential
for proper switching because the resonant inverter operates in
current-mode. Designing a pulse shaping circuit in wide range
of operating frequencies is difficult [13]. Other drawbacks
of a PLL circuit include its stability problems, sensitivity to
electrical noises and resonant tank tolerances.
To overcome the limitations of PLL, frequency sweep tech-
nique [23] and digital phase control [24]–[26] must be used
to detect the tuned point of the inverter. However, these
techniques are more complex and compatible for voltage
source resonant inverters such as series L–Cand L–L–C
topologies [23]–[26].
B. RIT Based on SOS Technique
Fig. 4(b) shows the block diagram of a SOS technique.
This circuit consists of a 1:1 Potential Transformer (PT), zero
detector and logic circuit. The zero detector converts the Voto
a square wave with duty cycle of 50%. According to the PT’s
polarity, the square wave is in phase with the triggering signal
of S1-S4 (or S2-S3) at the resonant frequency, fr.
At start-up, the dc-link inductor is linearly charged up to an
initial value, I0, while the four switches are turned on. After
the charging process, the resonant tank is excited by turning
off the S1-S4. So, a step current is injected to the tank circuit
through S2-S3. At the first zero crossing of Vo, the state of the
switches are reversed by the logic circuit. Hence, the inverter
generates instantly the switching time according to the zero
crossing of Vo. Considering the tank circuit parameters and the
initial current I0, the output voltage is derived by (8) for the first
half-cycle
Vo(t)≈I0⎡
⎣
1
Crωn1−ζ2RwCr
ωn−ζ2
+(1−ζ2)⎤
⎦
×exp(−ζωnt)
×sin 1−ζ2ωnt+ϕfor 0<t< π
ωn
ϕ=π1−1−ζ2
1−4ζ2.(8)
TAB L E I
DESIGN INFORMATION OF PLL AND INVERTER
According to (8) and considering that the zero detector works
ideally, the required initial current I0is close to zero. However,
in practice, the zero detectors have a threshold. Calculating
the minimum value for I0according to these thresholds is
analytically difficult. Considering the practical zero detectors
and a 1:1 PT, the minimum value of I0is about 25% of steady-
state current as follows:
I0,min ≈π2QVin
32(1 + Q2)Cr
Lr
.(9)
For a solid-state switch (power MOSFETs and IGBTs), the
turn on time, Ton, is less than the turn off time, Toff , due to
turn on/off transients. In addition, the turn on/off triggering
signals are applied to S1-S4 and S2-S3 instantly. Hence, the
SOS techniques have proper overlap time without pulse shap-
ing circuit for wide range of operating frequencies [13]. The
simulations and experimental results show the fact for SOS
methods.
C. Dynamic Performance of the RIT Systems
In this section, the dynamic performance of the two RIT
systems is simulated at transient conditions. The inverter and
PLL circuit parameters are given in Table I. The resonant
frequency of the inverter fris about 60 kHz. For the SOS
method, the PT ratio is 1:1 and the initial current is twice the
minimum value derived by (9), 9.5 A.
Fig. 5 shows the voltage of S3 and loop filter capacitor
voltage VCat start-up condition by using PLL. In the follow-
ing simulation, fmin,fmax , and fcare 45 kHz, 75 kHz, and
60 kHz, respectively. The VCis added to 3 V to achieve
frequency deviation of about 9 kHz at start-up. As seen from
Fig. 5, the inverter’s transient time is about 250 μs with 33.7%
overshoot. The overshoot is higher for large frequency devia-
tions. Fig. 6 shows the voltage and current of S3 at start-up
condition by using the SOS technique. According to Fig. 6,
the inverter’s transient response is about 180 μs with 19.4%
overshoot due to instant tracking of the resonant frequency.
Fig. 7 shows the voltage of S3 at turn-to-turn fault for SOS
and PLL systems. In this simulation, two adjacent turns of a
helix coil are considered to be short-circuited at t=0.001 s.
For a typical helix coil with turn number of 10, the inductance
deviation is about 20%. As seen from Fig. 7, the SOS transient
NAMADMALAN AND MOGHANI: SWITCHING TECHNIQUE FOR CURRENT SOURCE INDUCTION HEATING SYSTEMS 2559
Fig. 5. Switch voltage and Loop filter output voltage VCat start-up condition
for the PLL circuit.
Fig. 6. Voltage and current of S3 at start-up condition for SOS method.
Fig. 7. Switch voltage at the turn-to-turn fault condition: (a) PLL circuit
performance and (b) SOS method performance.
response is about 30% of the PLL transient time. Using the
PLL, the overshoot is about 25% while the SOS method has
no overshoot.
For higher quality factors, the PLL circuit fails to track
the change of resonant frequency under the fault condition.
Equations (10) and (11) show the frequency deviation and phase
error as a function of resonant tank parameters, respectively
Δf=∂fr
∂Lr
ΔLr+∂fr
∂Cr
ΔCr→Δf
fr
=1
2ΔLr
Lr
+ΔCr
Cr
(10)
β=−ϕz≈2QΔω
ωr=2QΔf
fr.(11)
Equation (11) calculates the phase error by linear approxima-
tion of the resonant tank phase plot at the resonant frequency,
fr. According to (10) and (11), the phase error is derived as
follows:
β≈QΔLr
Lr
+ΔCr
Cr(rad).(12)
As seen from (12), there are large phase errors for typical
tolerances and quality factors. Therefore, the SOS methods are
essential for tuning of the parallel resonant inverters.
III. TS OS METHOD
The SOS switching method has the capability of instant
tracking of resonant frequency but it has no control over the
phase error.
In addition, the SOS method has an intrinsic phase error
caused by propagation delays. This phase error changes in
different frequencies and is significant for higher operating fre-
quencies. The intrinsic phase error is mainly due to propagation
delays caused by logic circuit Tg, gate driver circuits Tdand
turn on time of the inverter’s switches Ts. Equation (13) shows
the intrinsic phase error βwhen the system operates at angular
frequency of ω. These time delays are unknown and may vary
under different conditions.
According to practical application notes, the total time delay
is between 200 ns up to 300 ns. This means that for operating
frequency of 100 kHz, the phase error is between −7.2◦and
−10.8◦. The intrinsic phase error has no significant impact on
voltage stress but the parallel operation of inverters will be
difficult
β=−(Td+Ts+Tg)ω(rad).(13)
To control the phase error, a tunable SOS system is essential.
Fig. 8(a) shows the proposed TSOS method using a phase
shifter circuit. The TSOS circuit consists of phase shifter, zero
detector and logic circuits.
As seen from Fig. 8(a), there are two logic signals, Signal-1
and Signal-2. Signal-1 is on at dc-link inductor charging du-
ration and after the charging process, the Signal-2 is on and
Signal-1 is off.
According to Fig. 8(a), the phase shifter circuit consists of
a tuning resistor RTand a potential transformer. As seen from
Fig. 8(b), the tuning resistor consists of series connected resis-
tors and bidirectional switches. Fig. 8(c) shows the bidirectional
switch that consists of four fast diodes and an optocoupler. The
tuning resistor with nresistors in series has n-bit resolution.
The RTcan also be implemented by a digital potentiometer for
2560 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014
Fig. 8. (a) Schematic of the proposed TSOS method. (b) The tuning resistor with the bidirectional switches. (c) Structure of the bidirectional switch.
Fig. 9. Block diagram of the TSOS system.
low voltage applications. The relationship between the series
resistors is given by (14)
Ri=(2)
i−1R1,ΔRT=R1i=1,2,...n. (14)
The ΔRTis the resolution or minimum variation of the tun-
ing resistor. Equation (15) shows the complex transfer function
of the phase shifter circuit, T(jω), where Lmis the magnetizing
inductance of the PT. According to (15), the shifting phase β
and its resolution Δβ are derived by (16) and (17), respec-
tively. The phase shifter has a linear behavior for small angels
(up to 30◦with 10% error)
T(jω)= jωLm
jωLm+RT
(15)
β =π
2−tan−1ωLm
RT≈RT
ωLm
(rad)(16)
Δβ =ΔRT
ωLm
(rad).(17)
According to the intrinsic phase error and the phase shifting
circuit performance, the phase error is derived by (18) when the
inverter operates at angular frequency of ω. Hence, the phase
shifter circuit can suppress and control the phase error
β=β+β =RT
ωLm−(Td+Ts+Tg)ω(rad).(18)
According to (14)–(17), for magnetizing inductance of 2 mH
(±10% tolerance), ΔRT=5Ωand n=8, the phase error is
controllable from zero up to 30◦with minimum resolution of
1◦in operating frequency of 25 kHz up to 100 kHz. Fig. 9
shows block diagram of the proposed TSOS method. Regarding
Fig. 9, a Micro Controller Unit (MCU) changes the phase
Fig. 10. Signal-1, Signal-2, T0, voltage and current of S3 at start-up condition
by using TSOS method, RT=0.
Fig. 11. Phase error is set to +20◦by using TSOS, Lm=2mH, RT=
410 Ω.
error through the bidirectional switches according to the phase
detector feedback. Fig. 10 shows the Signal-1, Signal-2, voltage
and current of S3 at start-up condition. Fig. 11 shows the TSOS
performance when the phase error is set to 20◦. In the following
simulations, fr,Q, and Vin are about 90 kHz, 6 and 200 V,
respectively.
NAMADMALAN AND MOGHANI: SWITCHING TECHNIQUE FOR CURRENT SOURCE INDUCTION HEATING SYSTEMS 2561
Fig. 12. Experimental setup based on TSOS technique at no-load condition.
TAB L E II
DESIGN INFORMATION OF TSOS AND INVERTER
Fig. 13. Schematic of the inverter with variable dc-link inductor.
The Signal-1 and Signal-2 are generated by MCU at start-up
condition. These signals indicate the dc-link inductor charging
time, T0, according to the initial current I0as follows:
T0=I0
Ld
Vin
.(19)
IV. EXPERIMENTAL RESULTS
To verify and test the performance of the TSOS method a
scaled prototype, shown in Fig. 12, has been implemented with
maximum output power of about 500 W. The proposed tuning
system is not sensitive to power level and can be utilized in
medium and high power IH systems. The prototype is a full
Fig. 14. Voltage (upper trace: 20 V/div) and current (lower trace: 1 A/div)
of S4 at start-up condition with operating frequency of about 50 kHz, Ld=
1000 μH, Vin =40V, and RT=0,(Timebase:10μs/div).
Fig. 15. Voltage (upper trace: 20 V/div) and current (lower trace: 1 A/div) of
S3, dotted line shows the disconnection moment of the external capacitor bank,
(Time base: 10 μs/div).
Fig. 16. Voltage of S3 (upper trace: 50 V/div) and VC(lower trace: 5 V/div)
at start-up condition using PLL. Vin =35V, Ld= 300 μH, Cr=1.33 μF,
Lr=5.2μH, and Q≈12 (Time base: 50 μs/div).
bridge parallel resonant inverter and the design parameters of
the inverter and the tuning system are shown in Table II. The
phase shifter circuit consists of three bidirectional switches
(n=3,ΔRT= 100 Ω) which are constructed by 1N4148 fast
diode and 6N137 optocoupler. For simplicity, the MCU has no
feedback and the performance of the TSOS is investigated in
open-loop operation.
2562 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014
Fig. 17. (a) Output voltage (upper trace: 50 V/div) and dc-link current (lower trace: 2 A/div), (Time base: 100 μs/div). (b) Voltage (20 V/div) of S3 with
operating frequency of about 66.5 kHz, (Time base: 2.5 μs/div). (c) Voltage (20 V/div) of S3 with operating frequency of about 67.5 kHz, (Time base:
2.5 μs/div). (d) Voltage (20 V/div) of S3 with RT= 600 Ω and β≈+20◦,(Timebase:2.5μs/div). (e) Current (upper trace: 10 A/div) and voltage (lower
trace: 50 V/div) of the work coil with fr≈35 kHz, output power of about 100 W, RT=0,Q≈3.5,Cr≈0.68 μF, and Lr≈28 μH, (Time base: 5 μs/div).
(f) Current (upper trace: 20 A/div) and voltage (lower trace: 50 V/div) of the work coil with fr≈50 kHz, output power of about 150 W, RT=0,Q≈10,
Cr≈1.8μFandLr≈5.8μH, (Time base: 5 μs/div).
The operating frequency is between 25 kHz up to
100 kHz. The minimum operating frequency is limited by PT
saturation. The tuning system has no limitation over maximum
operating frequency, although the zero detector and stray el-
ements affect the maximum operating frequency. In the ex-
perimental setup, the zero detector circuit operates properly
up to 100 kHz. Regarding Table II, the dc-link inductor is
designed for low frequency and high frequency operations due
to the wide range of operating frequencies. The high frequency
and low frequency dc-link inductances are about 300 μH and
1000 μH, respectively.
Fig. 13 shows how the Ldcan be changed by using a
switch SW, D1and D2at the dc-link side. Fig. 14 shows the
voltage and current of S4 at start-up condition by using TSOS
with resonant capacitor of about 2 μF and no-load condition.
Fig. 15 shows the performance of TSOS when an external
capacitor bank is disconnected from the resonant circuit. In
Fig. 15, the resonant capacitor Crchanges instantly from
5.5 μFto3μF. Hence, the resonant frequency changes from
29.4 kHz to 40.5 kHz. According to Fig. 15, the tuning system
tracks the resonant frequency with no phase error while the
frequency deviation Δf is about 38% and the system works at
no-load condition, Q≈30 (the worst-case). According to this
condition, the phase error would be close to −90◦if the inverter
were tuned by the PLL. The phase plot of a parallel resonant
tank is nonlinear around ±90◦that affects the PLL circuit’s
stability and phase detector performance [21], [22] and hence,
switch failure can occur.
To show the PLL dynamics, the inverter is tuned by a
PLL circuit with loop parameters of Vp=10V, R=2.2kω,
C=33nF, KVCO ≈2000 Hz/V, fmin ≈50 kHz and fmax ≈
70 kHz. To construct the PLL circuit, the HCT4046A integrated
circuit (IC) is used that has a CP-PFD unit. The quality factor
Qand resonant frequency of the system are about 12 and
60 kHz, respectively. Fig. 16 shows the voltage of S3 and loop
filter capacitor voltage VCat start-up. In this condition, the
initial switching frequency is fmin ≈50 kHz and the frequency
deviation is about 10 kHz, or 16.7%. The transient response of
PLL is about 280 μs with approximately 82% overshoot, which
is about 54% for self-oscillating methods.
Fig. 17(a) shows the output voltage Voand dc-link current at
start-up using the TSOS method. In this condition, Lr=45μH,
Ld= 1000 μH, Q≈6,Cr=1 μF and Vin is about 40 V.
Regarding Fig. 17(a), the I0is about 25% of the steady-state
current, I0≈0.5A.
Fig. 17(b) and (c) and show the voltage of S3 while the
inverter works at operating frequency of about 67 kHz, Q≈
4.5,Lr=5.2μH, and Cr=1μF. Fig. 17(b) shows the voltage
of S3 when tuning resistor is zero. In this condition, the intrinsic
phase error βis about −7◦. Fig. 17(c) shows the voltage of
S3 at steady-state condition while the tuning resistor is set
to 100 Ωand the phase error is close to zero according to
TSOS parameters and (18). According to Fig. 17(b) and (c), the
switching frequency changes about 1 kHz. According to (11),
the operating frequency variation can be found by (20). Hence,
the tuning system has the capability of frequency changing for
NAMADMALAN AND MOGHANI: SWITCHING TECHNIQUE FOR CURRENT SOURCE INDUCTION HEATING SYSTEMS 2563
low quality factor operations (Q<5). Fig. 17(d) shows the
performance of TSOS with operating frequency of 81.8 kHz,
Q≈4.5,Lr=5.2μH, and Cr=0.75 μF
Δf≈βfr
2Q.(20)
According to (2) and the tank circuit parameters, the resonant
frequency is about 78.6 kHz. Hence, frequency deviation is
about 3.2 kHz, which can also be calculated by equation (20).
Fig. 17(e) and (f) show voltage and current of the working coil
for two different tank circuit parameters (Lr,Cr, and Q)by
using TSOS method.
V. C ONCLUSION
In this paper, a tunable self-oscillating switching (TSOS)
technique has been proposed for current source parallel res-
onant inverters. Instant tuning of current source inverter is
essential at start-up and transient conditions. Compared to
the conventional tuning systems, the TSOS has the capability
of instant tuning and phase error controlling for wide range
of operating frequencies. The instant tuning of the inverter
decreases the voltage and current stresses as well as improves
the inverter’s dynamics. The tuning system has simple structure
and uses passive elements. Hence, the system is less sensitive
to noise and more reliable.
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Alireza Namadmalan received the B.S. degree from
Isfahan University of Technology, Isfahan, Iran, in
2009 and the M.S. degree in electrical engineering
from Amirkabir University of Technology, Tehran,
Iran, in 2011, where he was honored as the top rank
among the graduate students. He is currently work-
ing toward the Ph.D. degree at Amirkabir University
of Technology.
His current research interests include induction
heating, resonant converters, switching power sup-
plies, electromagnetic system modeling, and design
using FEM.
Javad S. Moghani (M’97) received the B.S. and
M.S. degrees in electrical engineering from South
Bank Polytechnic, London, U.K., and Loughborough
University of Technology, Loughborough, U.K., in
1982 and 1984, respectively. He received the Ph.D.
degree in electrical engineering from Bath Univer-
sity, Bath, U.K., in 1995.
From 1984 to 1991 he was with the Department
of Electrical Engineering, Amirkabir University of
Technology, Tehran, Iran. After graduating, he re-
turned to Amirkabir University of Technology in
1995. His current research interests include dc–dc converters, electric drives
and electromagnetic system modeling, and design using FEM.