How can I deposit a layer of silicon dioxide on silicone wafer using dry deposition?

I believe that it is an easy process and i used to do it very easily earlier when i used to leave the PDMS curing at room temp about 24 hours. now i started curing on hotplate at 120 'C for an hour which didn't worked as the PDMS was sticked to the silicon. then i tried 100 'C for an hour which was even more worst.

Need suggestions.

Thanks in advance.

I am using SU-8 2025 to generate a high aspect ratio microchannel. I made two microchannels with the properties of:

1. width = 10 um.

height = 25 um.

SU - 8 2025.

2. width = 15 um.

height = 37.5 um.

SU - 8 2025.

Problems:

1. After careful soft-lithography, almost all of my channels tear off (silane treatment applied for soft-lithography). I am assuming that there is a problem with the photolithography process although I was following the SU-8 2025 protocol to generate both microchannels. Is there any suggestion to solve this? Any input will help!

2. Based on point 1, somehow the remaining channel has higher height than my target height. How is it possible ?

3. In another try, I was using omnicoat as adhesive promoter and the omnicoat and PR layer tear off after soft lithography.

Any opinion will help, thank you.

I'm currently conducting research on synthesizing graphene via Chemical Vapor Deposition (CVD) (bilayer) for integration with P-type silicon to form Schottky junctions. My aim is to explore the properties of these junctions, particularly when formed on highly doped P-type silicon and porous substrates.

Recently, I performed capacitance-voltage (C-V) measurements to determine the doping concentration (Nd) of the silicon substrate using the Mott-Schottky plot method. However, I encountered challenges in interpreting the results.

Specifically, when plotting 1/C^2 against the applied voltage (V), I observed a deviation from the expected linear behavior across all measurements, conducted at frequencies ranging from 10 kHz to 1 MHz. This deviation was consistent for both the P-type silicon samples and those on the porous substrate.

I've attached graphs illustrating this behavior for reference.

I am seeking assistance interpreting the observed deviations and potential solutions or explanations.

Any insights or suggestions on how to address this issue would be greatly appreciated.

I am interested in calculating the carrier concentration of both n-type and p-type semiconductors by using the Mott- Schottky plot. I would be very grateful if you could give me some suggestions for the calculation of carrier concentration for n-type S/C, and how to calculate the value of (1/c^2). Thank you.

I used a Horiba SA-9600 surface area device to measure the surface area of ​​some nano materials. But this is a device that gives values ​​directly without obtaining data tables or using absorption and desorption curves. Is it considered sufficient direct value for research and thesis?

Please help me. Suppose I am making ZnO nanoparticle. I used ZnSO4 salt and NaOH as reducing agent. Finally I got precipitation. Usually I need to centrifuge, wash and dry to get ZnO nanoparticle. But my question is- without drying, what is inside the precipitation after wash? Can I use this as nanoparticle?

People always use IPA or methanol as solvent for SAM molecular (such as MeO-2PACZ or Me-4PACZ) in inverted perovskite solar cells. However, the solubility of MeO-2PACZ or Me-4PACZ in IPA or methanol might be not so good (See Advanced Materials (2023): 2304415. ) Why does people not directly use DMF as solvent for SAM?

I want to measure ionic conductivity of my oxide solid-electrolyte so I assembled a half-cell with gold blocking electrodes in Swagelok cell. You can see the EIS result attached. I am confused which part of the semicircle should I take into consideration. Left part or right part? I was taking the intersection point of the semi-circle with the Warburg line on the X axis but in some papers I see people are doing different stuff with fitting etc. Also, what would be the best equivalent circuit to fit this system?

Dear all,

I am doing a square pattern on a 6 mm x 6 mm GaAs substrate by photolithography. Here are the steps I did:

1. HCl treatment for 1 min. 30 s.

2. Dehydration bake at 120°C for 10 mins.

3. AZ5214 Photoresist spin coating at 4000 rpm, 40 s.

4. Hotplate bake at 90°C for 2 mins.

5. UV exposure with square pattern for 1.2 s (measured lamp power is about 25.2 mW).

6. Positive resist development using NMD for 1 min. in which I swirl the sample only after 30 s of dipping.

I attached a photo showing the result. There are photoresist smears that remain on the cell perimeter, connected to the edge beads. I only need the square pattern to be left on the sample.

Our spin coater is limited to 7500 rpm, so I could not do the fast bead removal. Aside from using an edge bead removing solution, which parameters and/or steps are recommended to be optimized or added while retaining the photoresist thickness and adhering well on the sample?

Thanks in advance for your answers.