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The neurons are proven to show chaotic dynamical behavior, and due to this behavior, they find applications in several fields. Recently, the chaotic behavior of the neuron model using non-monotonous Liao’s activation function was described and its design using op-amp was presented. The presented design is a high-voltage one and is not integrable, a...
Citations
... Dynamical 2 systems with these properties are called chaotic systems. Many systems in various fields show this behavior, and in recent decades, much attention has been focused on studying and investigating chaotic systems and signals [3]. Chaos can be considered a nonlinear and deterministic process that is not random but seems random in its time series [4]. ...
... This makes SNNs highly energy-efficient and simple. The two building blocks of SNNs are spiking neurons and interconnecting synapses [6][7][8][9]. ...
This work aims to present a novel energy-efficient single transistor leaky integrate-and-fire neuron for future neuromorphic computing. It comprises of a SiGe-based MOSFET, having channel length of 400 nm. Using 2D simulation, it has been verified that the proposed SiGe-based single transistor neuron accurately mimics the spiking behavior of the biological neuron, while eliminating the need of external circuitry and exorbitant energy consumption. The neuron consumes energy of 3.8 pJ/spike, which is 11.8 times and 2.1 times lesser than the previously proposed Si-based and Ge-based single transistor neurons, respectively. It also shows improvement in terms of controllability, simplicity, integration density, and fabrication process. By designing threshold logic gates, the proposed neuron has been employed to implement universal digital logic functions, such as NAND and NOR. Finally, the recognition ability for MNIST handwritten digits has been verified. It has been confirmed that besides imitating the neuronal behavior accurately, the proposed neuron can also be used in practical spiking neural networks for image classification with an accuracy of 93.79%.
... The nonlinear trans-conductor cell shown in Fig. 2 is the elementary block of the sinh-domain design technique [13,29,30]. It is assumed that MOS transistors operate in the weak-inversion region. ...
This paper proposes low voltage/power, current-mode second-order Butterworth high-pass filter design in the sinh-domain for biomedical applications. The proposed filter is a continuous-time filter in the companding-class. Sinh-domain filters have the advantages of electronically adjusting the frequency response without the need for non-chip capacitors and full integration on the chip, providing low power consumption and offering a high dynamic range. These advantages of the sinh-domain are beneficial for biomedical applications due to its low power consumption requirement. The proposed filter topology is suitable for eliminating low-frequency interferences of biomedical signals like electrocardiogram (ECG), electroencephalogram (EEG), and electromyogram (EMG). In the realization of this filter, the method of simulation of passive elements with sinh-domain cells is used. The proposed high-pass filter in the 0.05 Hz-20 Hz operating frequency range with a 0.5 V power supply shows the power dissipation of 12.5 nW while its dynamic range exceeds 60 dB. Additionally, no resistances are used in the proposed topology. Simulations have been performed by using OrCAD Capture CIS to demonstrate the performance of the filter. These simulations have been implemented with the TSMC 0.25 µm CMOS process parameters.
... An incommensurate fractional-order Rössler system was implemented, using CMOS OTAs in [22]. The CMOS OTA was also used to design the fractional-order Newton-Leipnik chaotic system [23], and fractional-order neuron models [24,25]. In this manner, we show the CMOS OTA-based design of a fractional-order integrator that is approximated by a Laplace transfer function, as shown in [1]. ...
This article is mainly devoted to the study of the existence of solutions for second-order abstract non-autonomous integro-differential evolution equations with infinite state-dependent delay. In the first part, we are concerned with second-order abstract non-autonomous integro-differential retarded functional differential equations with infinite state-dependent delay. In the second part, we extend our results to study the second-order abstract neutral integro-differential evolution equations with state-dependent delay. Our results are established using properties of the resolvent operator corresponding to the second-order abstract non-autonomous integro-differential equation and fixed point theorems. Finally, an application is presented to illustrate the theory obtained.
... An incommensurate fractional-order Rössler system was implemented, using CMOS OTAs in [22]. The CMOS OTA was also used to design the fractional-order Newton-Leipnik chaotic system [23], and fractional-order neuron models [24,25]. In this manner, we show the CMOS OTA-based design of a fractional-order integrator that is approximated by a Laplace transfer function, as shown in [1]. ...
Fractional-order chaotic oscillators (FOCOs) have shown more complexity than integer-order chaotic ones. However, the majority of electronic implementations were performed using embedded systems; compared to analog implementations, they require huge hardware resources to approximate the solution of the fractional-order derivatives. In this manner, we propose the design of FOCOs using fractional-order integrators based on operational transconductance amplifiers (OTAs). The case study shows the implementation of FOCOs by cascading first-order OTA-based filters designed with complementary metal-oxide-semiconductor (CMOS) technology. The OTAs have programmable transconductance, and the robustness of the fractional-order integrator is verified by performing process, voltage and temperature variations as well as Monte Carlo analyses for a CMOS technology of 180 nm from the United Microelectronics Corporation. Finally, it is highlighted that post-layout simulations are in good agreement with the simulations of the mathematical model of the FOCO.
... Daha sonra üretilen çıkış gerilimi genişletilir ve eş zamanlı olarak doğrusal çıkış akımına dönüştürülür. [50] Sinh-ortam tamamlayıcı operatörleri Şekil 3' te sırasıyla doğrusal giriş akımının sıkıştırılmış gerilime dönüştürülmesi (Sinh -1 ) ve sıkıştırılmış gerilimin genişletilmesi ve eş zamanlı olarak doğrusal akıma dönüştürülmesi (Sinh) görülmektedir. Sinh ve ters sinh (Sinh -1 ) fonksiyonlarının denklemleri aşağıda verilmiştir [19]. ...
... Recently a new class of electronic neurons, based on CMOS integrated circuits (IC), has been suggested [17][18][19]. These IC include the Liao's [17], the HR [18], and the FHN [19] electronic circuits, covering both integer-and fractional-order models. ...
... Recently a new class of electronic neurons, based on CMOS integrated circuits (IC), has been suggested [17][18][19]. These IC include the Liao's [17], the HR [18], and the FHN [19] electronic circuits, covering both integer-and fractional-order models. All the IC in these works have been simulated using the HSPICE software. ...
An integrate-and-fire (I&F) electronic neuron model is investigated theoretically and experimentally. The circuit comprises a unijunction transistor, a capacitor, and two resistors. It exhibits the following properties: (a) generates short spikes, (b) the steady state can be stabilized by a proportional or adaptive feedback, (c) high frequency action inhibits the spikes, (d) coupled units can synchronize with each other.
... Fractional-order neural systems provide a powerful tool for describing memory and hereditary properties where such effects are neglected or difficult to describe by the integerorder models. The main advantage of fractional-order systems is that fractional-order differential operator is nonlocal in the sense that it takes into account the fact that the future state not only depends upon the present state but also upon all the history of its previous states, while an integer-order differential operator is a local operator [31,32]. ...
... The low-voltage implementation of the inertial neuron was presented by the authors in [34] where a new activation function, namely Liao activation function obtained by linear combinations of several tangent hyperbolic functions, was employed instead of hyperbolic tangent function. The electronic implementation of chaotic delayed neuron model was introduced in [32]. The dynamical behavior of the Liao's chaotic delayed neuron circuits was also studied. ...
... The complex dynamical behavior of neural network containing two and four neurons has also been presented in this paper. Compared to the designs presented in the open literature, the proposed implementations offer the following advantages: (1) the design is integrable as all the blocks have been implemented in SD which has the inherent feature of electronic tunability, (2) the inherent class AB operation of SD technique offers the capability of handling signals greater than the bias current and thereby offers power saving [28,29,32,34], (3) no resistors and inductors are required as the delay has been implemented using component substitution method where inductors have been replaced by simulated inductors. This also provides the feature of electronic tunability of the delay. ...
Ultra-low-voltage sinh-domain implementation of delayed inertial neuron is introduced in this paper. The complex dynamical behavior of the neuron has been verified using three different activation functions, namely tanh, unipolar sigmoidal and bipolar sigmoidal. The networks containing two and four neurons have been designed, and their complex dynamical behavior has also been verified. The proposed implementation vis-à-vis the already reported designs offers the benefits of: (1) low-voltage operation, (2) integrability, due to resistor-less design and the employment of only grounded components, (3) electronic tunability of performance parameters by external currents, which adds flexibility to the proposed designs even after their final fabrication, (4) absence of inductors as, in contrast to reported designs, the delay has been implemented using component substitution method where inductors have been replaced by emulated inductors and (5) low-power implementation due to the inherent class AB nature of sinh-domain technique. Besides, for the first time, the complex dynamical behavior of four-neuron delayed inertial network has been implemented and its functioning for different activations functions has been considered and verified. HSPICE simulator tool and TSMC 130 nm CMOS process were used to evaluate and verify the correct functioning of the model.
... Many recent literatures have shown the implementation of fractional and chaotic systems using analog circuits [Bertsias et al., 2018;Kant et al., 2017;Tsirimokou et al., 2018] and Field Programmable Gate Array (FPGA) [Ismail et al., 2017;Tolba et al., 2017b;Tolba et al., 2017a]. From FPGA categories we can highlight the FPGA-based multiscroll attractor as discussed in [Tlelo-Cuautle et al., 2016;Rajagopal et al., 2017a;Tlelo-Cuautle et al., 2015b], digital chaotic systems and its FPGA model [Tlelo-Cuautle et al., 2015b;Tlelo-Cuautle et al., 2015a], FPGA-based four-wing chaotic attractor [Dong et al., 2016], image cryptography with chaotic ciphers and its FPGA implementations and FPGA implemented memristor-based chaotic attractors [Xu et al., 2016]. ...
This paper deals with a new modified hyperchaotic van der Pol–Duffing (MVPD) snap oscillator. Various dynamical properties of the proposed system are investigated with the help of Lyapunov exponents, stability analysis of the equilibrium points and bifurcation plots. The existence of the Hopf bifurcation is established by analyzing the corresponding characteristic equation. It is also proved that the MVPD oscillator shows multistability with coexisting attractors. Various numerical simulations are conducted and presented to show the dynamical behavior of the MVPD system. To show that the system is hardware realizable, we derive the discrete model of the MVPD system using the Euler’s method and using the hardware–software cosimulation, the proposed MVPD system is implemented in Field Programmable Gate Arrays. It is shown that the output of the digital implementations of the MVPD systems matches the numerical analysis.
... Fractional-order modeling in science and engineering include non-conventional signal processing like synthesis of fractal noise [10,48,49], modeling of neural networks [49,50], chaotic models [51-54] and control theory with better control [55]. Besides, many other fractional-order systems like fractional-order filters are now being realized which show some distinctive advantages [56][57][58][59][60][61]. ...
... Fractional-order modeling in science and engineering include non-conventional signal processing like synthesis of fractal noise [10,48,49], modeling of neural networks [49,50], chaotic models [51-54] and control theory with better control [55]. Besides, many other fractional-order systems like fractional-order filters are now being realized which show some distinctive advantages [56][57][58][59][60][61]. ...
Fractional-Order circuits and networks being a widely researched field lags in its development due to the nonavailability
of its basic building block i.e. Fractional-Order Element (FOE). The FOE besides being compact and
having wide frequency range should also be integrable with the Integrated Circuit (IC). In this paper, a detailed
survey of single and multi-component FOE implementations has been carried out. The survey implies that a single
component FOE is more suited for integration with the conventional circuitry but a market fit device is still a topic
of research. Some future prospects and areas of research for the implementation of FOE have also been indicated
in the paper. In addition, a survey of applications of single and multi-component FOE has also been included in
the paper.
