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a Schematic diagram of a neural recurrent inhibitory feedback loop. Neuron E makes an excitatory synapse onto the inhibitory interneuron I, which in turn makes an inhibitory synapse back onto E. b The time course of the membrane potential v for the integrate-and-fire neuron E under time-delayed inhibitory feedback. The dashed line indicates the threshold. See text for details.

a Schematic diagram of a neural recurrent inhibitory feedback loop. Neuron E makes an excitatory synapse onto the inhibitory interneuron I, which in turn makes an inhibitory synapse back onto E. b The time course of the membrane potential v for the integrate-and-fire neuron E under time-delayed inhibitory feedback. The dashed line indicates the threshold. See text for details.

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The multistability that arises in delayed feedback control mechanisms has applications for dynamic short term memory storage. Here we investigate the effects of multiplicative, Gaussian-distributed white noise on an integrate-and-fire model of a recurrent inhibitory neural loop: when the neuron fires an inhibitory pulse decreases the membrane poten...

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... we study the noise-induced transitions that occur between coexistent limit cycle attractors in an integrate-and- fire model for a recurrent inhibitory neural loop Fig. 1a 2. In Sec. II we determine the number of attractors and their properties for this model in the absence of noise. In Sec. III we characterize the mechanism for noise-induced transi- tions between attractors. Finally, in Sec. IV we study the effects of noise on the memory storage capabilities of an electronic circuit analog of the ...
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... integrate-and-fire model for a recurrent inhibitory loop is presented in Fig. 1b. The membrane potential v of the neuron increases linearly at a rate A until it reaches the firing threshold . When v, the neuron fires and v is reset to its resting membrane potential v 0 . The firing of the neuron ex- cites the inhibitory interneuron such that at a time later the membrane potential of the excitatory neuron is ...
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... order to obtain a practical assessment of the impact of noise on memory storage by a multistable dynamical system, we constructed an electronic circuit that mimics the integrate-and-fire model discussed in Secs. II and III Fig. 10. This circuit is fully described in the Appendix. Briefly, neuron E Fig. 1a is represented by a capacitor that charges linearly. The role of the neuron I is played by a time-delay circuit bucket brigade device, which introduces an incremental reduction to the capacitor charging voltage at a time after the capacitor discharges. In order ...
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... order to obtain a practical assessment of the impact of noise on memory storage by a multistable dynamical system, we constructed an electronic circuit that mimics the integrate-and-fire model discussed in Secs. II and III Fig. 10. This circuit is fully described in the Appendix. Briefly, neuron E Fig. 1a is represented by a capacitor that charges linearly. The role of the neuron I is played by a time-delay circuit bucket brigade device, which introduces an incremental reduction to the capacitor charging voltage at a time after the capacitor discharges. In order to put noise on Sec. III we added noise to the discharging cur- rent ...
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... noise was generated by a random noise generator General Radio Company, Model 1390-B and was first passed through a filter circuit with a time constant of 1 ms. Figure 11 shows the distribution of interspike intervals for different injected noise levels measured as V rms , the root- mean-square voltage. In all cases the model was initialized to the regular spiking attractor Fig. 2a. ...
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... with a time constant of 1 ms. Figure 11 shows the distribution of interspike intervals for different injected noise levels measured as V rms , the root- mean-square voltage. In all cases the model was initialized to the regular spiking attractor Fig. 2a. As expected when V rms 0, the distribution of ISI is approximated by a single delta function Fig. 11a. As V rms increases, the distribution of ISI broadens Figs. 11b and 11c. This occurs because the interspike interval is equal to 1p and noise is injected through . Once V rms becomes large enough, the histogram becomes multimodal Fig. 11d. These modes appear be- cause once the noise level becomes sufficiently high, switches between ...
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... of interspike intervals for different injected noise levels measured as V rms , the root- mean-square voltage. In all cases the model was initialized to the regular spiking attractor Fig. 2a. As expected when V rms 0, the distribution of ISI is approximated by a single delta function Fig. 11a. As V rms increases, the distribution of ISI broadens Figs. 11b and 11c. This occurs because the interspike interval is equal to 1p and noise is injected through . Once V rms becomes large enough, the histogram becomes multimodal Fig. 11d. These modes appear be- cause once the noise level becomes sufficiently high, switches between basins of attraction frequently occur. The same experiment can be repeated ...
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... Fig. 2a. As expected when V rms 0, the distribution of ISI is approximated by a single delta function Fig. 11a. As V rms increases, the distribution of ISI broadens Figs. 11b and 11c. This occurs because the interspike interval is equal to 1p and noise is injected through . Once V rms becomes large enough, the histogram becomes multimodal Fig. 11d. These modes appear be- cause once the noise level becomes sufficiently high, switches between basins of attraction frequently occur. The same experiment can be repeated by starting the circuit with a different spiking pattern corresponding to a different attrac- tor. The amplitude of V rms necessary for switches to occur at a ...
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... schematic diagram of the electronic circuit of the integrate-and-fire model described in Secs. II and III is shown in Fig. 10. Neuron E Fig. 1a is represented by the capacitor C. This capacitor can be charged with the constant current source I c and discharged by the two switches S 1 and S 2 . Switch S 1 is closed on the leading edge of a pulse from the flip-flop circuit shown. The flip-flop is operated by com- paritors 1 and 2, which cause it to change state ...
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... schematic diagram of the electronic circuit of the integrate-and-fire model described in Secs. II and III is shown in Fig. 10. Neuron E Fig. 1a is represented by the capacitor C. This capacitor can be charged with the constant current source I c and discharged by the two switches S 1 and S 2 . Switch S 1 is closed on the leading edge of a pulse from the flip-flop circuit shown. The flip-flop is operated by com- paritors 1 and 2, which cause it to change state when the voltage ...

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