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(a) Doping profile of a BSI SPAD. Electrons (e-) drift to a central field peak (dashed area). (b) X-SEM images of the wafer.
Source publication
A backside-illuminated (BSI) near-infrared enhanced silicon single-photon avalanche diode (SPAD) for time-of-flight (ToF) light detection and ranging applications is presented. The detector contains a 2 $\mu$m wide multiplication region with a spherically-uniform electric field peak enforced by field-line crowding. A charge-focusing electric field...
Contexts in source publication
Context 1
... BSI SPAD was designed based on the architecture of a previously reported FSI device [9], and it was manufactured in a customized 130 nm CMOS technology. The backside processing was executed roughly according to the flow described by B. Vereecke et al. [24]. Fig. 1(a) illustrates the structure and doping profile of the SPAD. The detector has a size of 15 µm and contains a p-intrinsic volume (Epi) with a depth of 10.4 µm and a doping concentration of ≈ 10 12 cm −3 . The cathode is formed by a central n-type region with a hemispherical surface and a radius of ≈ 0.6 µm. The anode consists of a ...
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... radius of 5 µm. The top oxide-silicon interface between the cathode and anode contains a shallow n-type implantation. The backside is passivated by a thin p-type doped region and contains a silicon-nitride anti-reflective coating (ARC) of approximately 100 nm thickness. The backside doped layer is electrically connected to the anode potential. Fig. 1(b) shows a cross-section scanning electron microscope (X-SEM) image of the layers in the device. The backend of line (BEOL) is located between the silicon substrate and a carrier wafer (Carrier), and it contains the metal interconnects (bright patches). To enhance the PDE, a metal reflector that covers approximately half of the detector ...
