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The etch pit density (EPD) determination of the Ge epilayer on Si substrate with 6° off-cut with (a) heavily As-doped Ge seed layer, (b) un-doped Ge seed layer. As shown, the EPD is reduced by at least one order of magnitude in the case of Ge epilayer grown with Ge seed layer with As-doped.
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High quality germanium(Ge)epitaxialfilm is grown directly on silicon (001) substrate with 6° off-cut using a heavily arsenic (As) dopedGe seed layer. The growth steps consists of (i) growth of a heavily As-doped Ge seed layer at low temperature (LT, at 400 °C), (ii) Gegrowth with As gradually reduced to zero at high temperature (HT, at 650 °C), (ii...
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Ge epitaxial layer on Si substrate becomes more attractive for Si-based monolithic photonic integrated circuit (PIC). Low threading dislocation density and low surface roughness play a vital role in realizing the fabrication of the Ge optoelectronic devices. In this study, an ultra-thin LT-Si buffer for the deposition of Ge layer was investigated w...
This article presents a novel method to grow a high-quality compressive-strain Ge epilayer on Si using the selective epitaxial growth (SEG) applying the RPCVD technique. The procedures are composed of a global growth of Ge layer on Si followed by a planarization using CMP as initial process steps. The growth parameters of the Ge layer were carefull...
A method for high-quality epitaxial growth of Ge on Si (111) and Si (110) was investigated by reduced pressure chemical vapor deposition. Two-step Ge epitaxy (low-temperature Ge seed and high-temperature main Ge growth) with several cycles of annealing by interrupting the Ge growth (cyclic annealing) was performed. In the case of Ge seed layer grow...
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The influence of introducing a SiGe/Ge superlattice (SL) between Ge layers and Si substrate for the sake of the reduction of the threading dislocation density (TDD) without additional annealing is investigated. By introducing the SiGe/Ge SL and optimizing the layer stack, the TDD of the Ge layer becomes ∼1/3. In the case of 2.8 μ m thick Ge without...
Citations
... On the other hand, the 'two-step' growth is mostly used both by molecular beam epitaxy (MBE) and chemical vapour deposition (CVD) methods, where a layer grown at low temperature (LT) is first introduced to facilitate layer-by-layer growth, followed by a layer grown at high temperature (HT) to improve the crystal quality 16 . In addition to 'two-step' growth, introducing dopants to the LT layer has reported positive effects on suppressing TDs 26,27 . Due to the local strain induced by the doping atoms in the LT nucleation layer, existing TDs are promoted and interact with each other to trigger self-annihilation 28 . ...
Suppression of threading dislocations (TDs) in thin germanium (Ge) layers grown on silicon (Si) substrates has been critical for realizing high-performance Si-based optoelectronic and electronic devices. An advanced growth strategy is desired to minimize the TD density within a thin Ge buffer layer in Ge-on-Si systems. In this work, we investigate the impact of P dopants in 500-nm thin Ge layers, with doping concentrations from 1 to 50 × 10¹⁸ cm⁻³. The introduction of P dopants has efficiently promoted TD reduction, whose potential mechanism has been explored by comparing it to the well-established Sb-doped Ge-on-Si system. P and Sb dopants reveal different defect-suppression mechanisms in Ge-on-Si samples, inspiring a novel co-doping technique by exploiting the advantages of both dopants. The surface TDD of the Ge buffer has been further reduced by the co-doping technique to the order of 10⁷ cm⁻² with a thin Ge layer (of only 500 nm), which could provide a high-quality platform for high-performance Si-based semiconductor devices.
... A variety of techniques have been explored over the years to address this issue. Using an array of dopants, such as phosphorous [10], arsenic [11], boron [12], and antimony [13], a reduction of the TD density (TDD) and an improved surface roughness have been observed. Particular attention can be paid to Sb's ability to enhance TD motion and serve as a surfactant, which has enabled a low TDD of 2.6 × 10 8 cm −2 for a 500 nm grown Ge/Si sample [14]. ...
High-quality and low-defect-density germanium (Ge) buffer layers on silicon (Si) substrates have long been developed for group IV and III-V devices by suppressing defect propagation during epitaxial growth. This is a crucial step for the development of highly efficient photonic devices on Si substrates. Patterned silicon substrates have increasingly been employed for their ability to restrict and hinder the motion of defects. In this work, we demonstrate the effectiveness of an optimised two-step growth recipe structure on a (111)-faceted V-groove silicon substrate with a 350 nm flat ridge. This strategy succesfully reduces the threading dislocation density while growing a 1 µm Ge buffer layer via molecular beam epitaxy. As a result, a high-quality buffer is produced with a low threading dislocation density on the order of 10 ⁷ cm ⁻² and a surface roughness below 1 nm.
... [16,26] In addition to 'two-step' growth, introducing dopants to the LT layer has reported positive effects on suppressing TDs. [27,28] Due to the local strain induced by the doping atoms in the LT nucleation layer, existing TDs are promoted and interact with each other to trigger self-annihilation. [29] Yang et al. proposed a two-step growth method with doping techniques followed by a cyclic annealing process, bringing the TDD to 2.6 × 10 8 cm − 2 in a 500-nm Ge epilayer. ...
Suppression of threading dislocations (TDs) in thin germanium (Ge) layers grown on silicon (Si) substrates has been critical for realizing high-performance Si-based optoelectronic and electronic devices. An advanced growth strategy is desired to minimize the TD density within a thin Ge buffer layer in Ge-on-Si systems. In this work, we investigate the impact of P dopants in 500-nm thin Ge layers, with doping concentrations from 1 to 50 × 10¹⁸ cm− 3. The introduction of P dopants has efficiently prevented TD formation, whose potential mechanism has been explored by comparing it to the well-established Sb-doped Ge-on-Si system. P and Sb dopants reveal different defect-suppression mechanisms in Ge-on-Si samples, inspiring a novel co-doping technique by exploiting the advantages of both dopants. The surface TDD of the Ge buffer has been further reduced by the co-doping technique to as low as 10⁷ cm− 2 with a thin Ge layer (of only 500 nm), which could provide a high-quality platform for high-performance Si-based semiconductor devices.
... Interstitial doping of As has an impact in Raman shiing. 32 The peak position of GeSn of the rst conguration is at 293 cm −1 in which As is incorporated during annealing while the peak position of the corresponding second conguration in which As isn't incorporated via annealing was detected at 305 cm −1 . The GeSn peak of the other congurations is shied from 308 cm −1 to 304 cm −1 which enhances the direct transition in Ge network. ...
GeSn compounds have made many interesting contributions in photodetectors (PDs) over the last ten years, as they have a detection limit in the NIR and mid-IR region. Sn incorporation in Ge alters the cut off wavelength. In the present article, p-in structures based on GeSn junctions were fabricated to serve as PDs. Arsine (As) is incorporated to develop n-GeSn compounds via a metal induced crystallization (MIC) process followed by i-GeSn on p-Si wafers. The impact of As and Sn doping on the strain characteristics of GeSn has been studied with high resolution transmission electron microscopy (HRTEM), X-ray diffraction and Raman spectroscopy analyses. The direct transitions and tuning of their band energies have been investigated using diffuse reflectance UV-vis spectroscopy and photoluminescence (PL). The barrier height and spectral responsivity have been controlled with incorporation of As. Variation of As incorporation into GeSn Compounds shifted the Raman peak and hence affected the strain in the Ge network. UV-vis spectroscopy showed that the direct transition energies are lowered as the Ge-As bonding increases as illustrated in Raman spectroscopy investigations. PL and UV-vis spectroscopy of annealed heterostructures at 500°C showed that there are many transition peaks from the UV to the NIR region as result of oxygen vacancies in the Ge network. The calculated diode parameters showed that As incorporation leads to an increase of the height barrier and thus dark current. Spectral response measurements show that the prepared heterojunctions have spectral responses in near UV and NIR regions that gives them opportunities in UV and NIR photodetection-applications.
... Firstly, TDDs in the Ge absorption layer are still high. To eliminate the TDDs, numerous strategies were proposed in recent decades, including doped Ge buffer layers [108][109][110], compositionally graded SiGe buffer layers [111][112][113], ultra-thin Si/SiGe superlattice buffer layers [114,115], high temperature annealing [116][117][118], three-step growth [119,120], the selective epitaxial growth (SEG) method [121][122][123], etc. With the continuous effort focused on decreasing the TDDs in the Ge layer, the TDDs for the top Ge layer were evaluated to be in the orders of 10 6 -10 7 cm −2 . ...
Among photodetectors, avalanche photodiodes (APDs) have an important place due to their excellent sensitivity to light. APDs transform photons into electrons and then multiply the electrons, leading to an amplified photocurrent. APDs are promising for faint light detection owing to this outstanding advantage, which will boost LiDAR applications. Although Si APDs have already been commercialized, their spectral region is very limited in many applications. Therefore, it is urgently demanded that the spectral region APDs be extended to the short-wavelength infrared (SWIR) region, which means better atmospheric transmission, a lower solar radiation background, a higher laser eye safety threshold, etc. Up until now, both Ge (GeSn) and InGaAs were employed as the SWIR absorbers. The aim of this review article is to provide a full understanding of Ge(GeSn) and InGaAs for PDs, with a focus on APD operation in the SWIR spectral region, which can be integrated onto the Si platform and is potentially compatible with CMOS technology.
... Long-time cyclic high-temperature annealing was used to decrease the glide dislocations density [37][38][39]. Other methods such as the As-doped LT-Ge buffer [40] and selective area growth [21,41,42] were also investigated to improve the Ge crystal quality. However, the post-annealing process hinders the introduction of the compressive strain into the Ge layer. ...
In this manuscript, a novel dual-step selective epitaxy growth (SEG) of Ge was proposed to significantly decrease the defect density and to create fully strained relaxed Ge on a Si substrate. With the single-step SEG of Ge, the threading defect density (TDD) was successfully decreased from 2.9 × 107 cm−2 in a globally grown Ge layer to 3.2 × 105 cm−2 for a single-step SEG and to 2.84 × 105 cm−2 for the dual-step SEG of the Ge layer. This means that by introducing a single SEG step, the defect density could be reduced by two orders of magnitude, but this reduction could be further decreased by only 11.3% by introducing the second SEG step. The final root mean square (RMS) of the surface roughness was 0.64 nm. The strain has also been modulated along the cross-section of the sample. Tensile strain appears in the first global Ge layer, compressive strain in the single-step Ge layer and fully strain relaxation in the dual-step Ge layer. The material characterization was locally performed at different points by high resolution transmission electron microscopy, while it was globally performed by high resolution X-ray diffraction and photoluminescence.
... This leads to a compromise between the quantum efficiency (QE) and the photosensor response speed [11]. In the photo-sensing market, only silicon APS promises outstanding performance with high current amplification and high optical response [12][13][14][15][16]. This optical response can be extended to the visible spectrum. ...
This paper explores poly-silicon-germanium (poly-SiGe) avalanche photo-sensors (APSs) involving a device of heterojunction structures. A low pressure chemical vapor deposition (LPCVD) technique was used to deposit epitaxial poly-SiGe thin films. The thin films were subjected to annealing after the deposition. Our research shows that the most optimal thin films can be obtained at 800 °C for 30 min annealing in the hydrogen atmosphere. Under a 3-μW/cm2 incident light (with a wavelength of 550 nm) and up to 27-V biased voltage, the APS with a n+-n-p-p+ alloy/SiO2/Si-substrate structure using the better annealed poly-SiGe film process showed improved performance by nearly 70%, 96% in responsivity, and 85% in quantum efficiency, when compared to the non-annealed APS. The optimal avalanche multiplication factor curve of the APS developed under the exponent of n = 3 condition can be improved with an increase in uniformity corresponding to the APS-junction voltage. This finding is promising and can be adopted in future photo-sensing and optical communication applications.
... The GOI platform was realized through the direct wafer bonding (DWB) process [31], [32]. Firstly, the Ge film was grown on a 6" Si (100) wafer using reduced pressure chemical vapor deposition (RPCVD). ...
Germanium (Ge) lateral p-i-n photodetectors with grating and hole-array structures were fabricated on a Ge-on-insulator (GOI) platform. Owing to the low threading dislocation density (TDD) in the transferred Ge layer, a low dark current of 0.279 µA was achieved at −1 V. The grating structure enhances the optical absorption by guiding the lateral propagation of normal incident light, contributing to a 3× improved responsivity at 1,550 nm. Compared with the grating structure, the hole-array structure not only guides the lateral modes but also benefits the vertical resonance modes. A 4.5× higher responsivity of 0.188 A/W at 1,550 nm was achieved on the 260 nm Ge absorptive layer. In addition, both the grating and the hole-array structure attribute to a 2× and a 1.6× enhanced 3dB bandwidth at −5 V due to significantly reduced capacitance. The planar configuration of p-i-n photodiodes is favorable for large-scale monolithic integration. The incorporated surface structures offer promising approaches to reinforce the responsivity and bandwidth simultaneously, paving the way for the development of high-performance Ge photodetectors on silicon substrate.
... A second approach is the growing of two layers of germanium, in which the first germanium layer is obtained at a lower temperature (300 • C-400 • C) on the silicon, leading to a relaxed crystallographic structure. This first layer will in turn act as the base for the growth of a high temperature (600 • C-700 • C) and higher quality germanium layer [17][18][19][20][21][22][23]. Another less conventional way has been studied by some groups, which is known as selective area deposition. ...
Ultrathin (20 nm) epitaxial films of germanium are deposited on crystalline silicon wafers, to act as virtual substrates for the growth of III-V materials, opening a low-cost approach to tandem solar cells. Such ultrathin layers allow for material cost reduction, along with the possibility of using the silicon wafer as the bottom cell in tandem devices. A simple plasma-enhanced chemical vapor deposition (PECVD) process at 175 ◦C has been optimized to deposit these heteroepitaxial germanium films, which grow directly on the silicon wafers without any intermediate silicon-germanium alloy. Thanks to an in-situ plasma cleaning step prior to Ge epitaxy, the films can sustain high-temperature annealing in vacuum (up to 800 ◦C) without any delamination. The suitability of the germanium heteroepitaxial films as virtual substrates is analyzed by depositing III-V layers on them by conventional growth methods like chemical beam epitaxy (CBE) and metalorganic chemical vapor deposition (MOCVD). The properties of the GaAs films deposited on the virtual substrates are comparable in terms of roughness, microstructure, and crystallinity to these of the III-V layers co-deposited on c-Ge wafers, pointing at the effectiveness of the ultrathin c-Ge epitaxial layers to act as virtual substrates for III-V epitaxial growth. Moreover, growing the c-Ge layers on c-Si substrates with 5◦miscut avoids the formation of antiphase domains. These substrates are finally used to demonstrate proof of concept tandem solar cells, proving the suitability of our low temperature and ultrathin virtual substrate approach
... In a parallel approach under development, TDD of 1-5⋅10 6 cm − 2 have been achieved with direct growth of Ge on Si [11][12][13]. This approach has the advantage of allowing the direct integration of already developed high efficiency solar cell structures based on Ge or GaAs substrates. ...
Reducing the formation of cracks during growth of GaInP/GaInAs/Ge 3-junction solar cells on Ge|Si virtual substrates has been attempted by thinning the structure, namely the Ge bottom cell and the GaInAs middle cell. The theoretical analysis performed using realistic device parameters indicates that the GaInAs middle cell can be drastically thinned to 1000 nm while increasing its In content to 8% with an efficiency loss in the 3-junction cell below 3%. The experimental results show that the formation of macroscopic cracks is prevented in thinned GaInAs/Ge 2-junction and GaInP/GaInAs/Ge 3-junction cells. These prototype crack-free multijunction cells demonstrate the concept and were used to rule out any possible component integration issue. The performance metrics are limited by the high threading dislocation density over 2·10⁷cm⁻² in the virtual substrates used, but an almost current matched, crack-free, thinned 3-junction solar cell is demonstrated, and the pathway towards solar cells with higher voltages identified.
