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![Transition levels for native point defects in GaN. Defects in semiconductors and insulators can occur in different charge states. For each position of the Fermi level, one particular charge state has the lowest energy for a given defect. The Fermi-level positions at which the lowest-energy charge state changes are called transition levels or ionization energies. For example, from this figure Ga vacancies are predicted to be in the − 3 charge state for Fermi levels greater than 1.1 eV above the valence band edge [63]. Reprinted with permission from reference 63. Copyright (2005) by the American Institute of Physics.](publication/258684284/figure/fig5/AS:297388003610629@1447914233478/Transition-levels-for-native-point-defects-in-GaN-Defects-in-semiconductors-and.png)
Transition levels for native point defects in GaN. Defects in semiconductors and insulators can occur in different charge states. For each position of the Fermi level, one particular charge state has the lowest energy for a given defect. The Fermi-level positions at which the lowest-energy charge state changes are called transition levels or ionization energies. For example, from this figure Ga vacancies are predicted to be in the − 3 charge state for Fermi levels greater than 1.1 eV above the valence band edge [63]. Reprinted with permission from reference 63. Copyright (2005) by the American Institute of Physics.
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The literature on polar Gallium Nitride (GaN) surfaces, surface treatments and gate dielectrics relevant to metal oxide semiconductor devices is reviewed. The significance of the GaN growth technique and growth parameters on the properties of GaN epilayers, the ability to modify GaN surface properties using in situ and ex situ processes and progres...
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... de Walle and Segev have calculated the energy levels of major bulk point defects in Wurtzite phase GaN [62], and the results are summarised in Figure 5 [63]. When examining this figure, it is important to realize that (a) not all of these defects will be present at the surface of a GaN epilayers; and (b) the densities of some of these defects may be small enough to not have an impact electrically. Experimental data on the energy levels of bulk point defects, and on their formation and removal from GaN have also been reported [64–66], mainly using Deep Level Transient Spectroscopy (DLTS) and Deep Level Optical Spectroscopy (DLOS). These techniques allow defects present at energies throughout the entire bandgap of the GaN to be examined—DLTS probes within 1 eV of the conduction band minimum, while DLOS probes from ~ 1 eV below the conduction band minimum to the valence band maximum. Using this technique the authors report that there are bulk carbon-related defects as well as bulk Ga vacancies with energies near the valence band maximum. The defect associated with N vacancies is near the conduction band edge. Petravic et al. [64] suggest that argon bombardment may preferentially remove nitrogen from GaN thus creating an excess of nitrogen vacancies. The argon bombardment produces a metallic Ga layer at the surface, which results in increased band bending and pinning of the surface Fermi level close to the conduction band minimum. Even without argon bombardment these native donor defects can be responsible for the n-type conductivity of as-grown undoped GaN. The authors of reference [64] demonstrated the presence of nitrogen interstitial electronic states within the GaN band gap, in agreement with theoretical predictions. The reduction in band bending determined from photoemission measurements was consistent with the expected acceptor-like character of these defects. The surface of GaN may contain defects related to some of the bulk defects just described. Some of these may be surface dangling bonds. In addition defects produced by native oxide formation and/or by reaction with adsorbates will be present. Tuning the growth conditions can also influence the surface of the GaN layer as well as its bulk properties. In reference [67], Van de Walle carried out calculations focusing on surface states and showed that at typical (close to stoichiometric) Ga/N surface ratios, the Fermi level is pinned at 0.5–0.7 eV below the conduction-band minimum (CBM) for the (0001) surface and at 1.2 eV above the valence-band maximum (VBM) for the (000 1 ) surface plane. For highly Ga-rich conditions, the Fermi level is calculated to be 1.8 eV above the VBM for the (0001) and 1.6 eV for the (000 1 ) plane. The results are in agreement with experiment, for example see reference [68] for the Ga rich (000 1 ) case, and suggest that the microscopic origin of the Fermi-level pinning on GaN surfaces occurs via formation of either Ga dangling bonds at moderate Ga/N ratios or Ga-Ga bonds on Ga-rich surfaces. Reference [27] gives similar pinned surface Fermi levels determined experimentally using xray photoelectron spectroscopy for these substrate planes. Table 1 summarizes the defect energy levels presented in this section. In Section 3, the presented defect levels will be discussed further with regard to experimental interface defect density measurements obtained from GaN MOS ...
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Citations
... Spray pyrolysis, MOCVD, atomic layer deposition (ALD), pulsed laser deposition (PLD), magnetron sputtering and etc. techniques are used to grow ZnO thin films [16][17][18][19]. Due to its distinctive advantages, such as self-limiting features in very good quality, large area stability and uniformity, terrifically good thickness control and synthesizing materials on substrate homogeneously, the ALD method has a significant place in the fabrication process [20,21]. Besides, this technique offers material synthesis under low temperatures, which makes it a cheaper fabrication technique than other higher-temperature methods [22]. ...
The material used in the devices produced and the technique in which the material is prepared are of great importance. Atomic layer deposition is a very important technique that stands out due to its excellent properties. In this study, a Schottky-type device was produced with a 5 nm thick ZnO film coated on n-type silicon by atomic layer coating technique. SEM images were taken to investigate the coating quality of the deposited material. Then, the behavior of the produced device in the face of temperature change was analyzed. In addition, the photodiode and detector performances were investigated by exposing light, which is another external stimulus, at different intensities. Some electrical parameters of the Au/ZnO/n-Si Schottky-type device is sensitive to both temperature and light. In addition, the ideality factor value of the Au/ZnO/n-Si Schottky-type device was 2.08 at 220 and 1.27 at 400 K. In addition to these parameters, the responsivity and detectivity values were found to be 0.074 A/W and 6.07 × 10⁹ Jones for 100 mW/cm² light intensity, respectively. Based on the measurements performed under the influence of both light stimuli and temperature, it can be stated that the Au/ZnO/n-Si Schottky-type device has a very stable structure. The performed all measurements and analyses show that the ZnO material coated with the self-controlled atomic layer coating technique and the Au/ZnO/n-Si device produced with this material can be used in optoelectronic technology.
... Several gate dielectrics were proven promising for secured high performance GaN-based transistors, and more particularly Al 2 O 3 due to its high permittivity (∼9) and wide energy bandgap (8.3 eV). 7 However, electron trapping into Al 2 O 3 remains problematic due in part to the presence of impurities/defects in Al 2 O 3 films and also to the poor electrical properties of the Al 2 O 3 /AlGaN/GaN interface. [8][9][10] This induces a threshold voltage instability and a strong frequency dispersion in capacitance in addition to the increase of the hysteresis. ...
Homogeneous AlOxNy thin films with a controlled nitrogen composition, up to 7.1%, were grown on GaN substrate using plasma-enhanced atomic layer deposition. This was achieved through repeated cycles consisting of AlN thin layers deposition and subsequent in situ O2 plasma oxidation under optimized conditions. We demonstrate that the nitrogen concentration in AlOxNy films can be finely tuned from 1.5% to 7.1% by a precise control of the AlN thin film thickness from 0.25 to 0.96 nm before each oxidation step. It is shown also that higher AlN thickness, ≥1.96 nm, leads to an incomplete plasma oxidation of AlN films, resulting in the formation of AlOxNy/AlN-like structures. Several structural and physic-chemical characterizations, including focused ion beam-scanning transmission electron microscopy, Auger electron spectroscopy, XPS, and time-of-flight secondary ion mass spectrometry were performed to confirm these findings. These results highlight the importance of this approach for growing homogeneous AlOxNy thin films with controlled nitrogen doping, which can be used as dielectrics in gate stacks for high performance GaN-based transistors.
... Gallium nitride (GaN) semiconductors have important applications in ultraviolet light sources, photodetectors, transistors, data storage, high-power electronic devices, and semiconductor lasers [1][2][3][4][5]. In terms of lasers, the advantages of GaN, such as reliable regulation and easy processing, have been developing rapidly [6,7]. ...
In this work, low-threshold resonant lasing emission was investigated in undoped and Mg-doped GaN thin films on interfacial designed sapphire substrates. The scattering cross-section of the periodic resonant structure was evaluated by using the finite difference time domain (FDTD) method and was found to be beneficial for reducing the threshold and enhancing the resonant lasing emission within the periodic structures. Compared with undoped and Si-doped GaN thin films, p-type Mg-doped GaN thin films demonstrated a better lasing emission performance. The lasing energy level system and defect densities played vital roles in the lasing emission. This work is beneficial to the realization of multifunctional applications in optoelectronic devices.
... Specifically, bi-directional CV measurements from deep depletion at -25 V to accumulation at 25 V were repeated for each wafer, with the addition of a stress period of 120 s at VG = 25 V between the forward and reverse CV sweeps. In all cases, the maximum hysteresis between the forward-reverse curves is observed around -15 V, and is associated to a) a higher trapping at the Al2O3/GaN interface 12,13 , since a change in the slope of the "reverse" curve is detected, and b) a larger oxide trapping. ...
Developing high quality GaN/dielectric interfaces is a fundamental step for manufacturing GaN vertical power transistors. In this paper, we quantitatively investigate the effect of planar etching treatment and trench formation on the performance of GaN-based MOS (metal oxide semiconductor) stacks. The results demonstrate that (i) blanket etching the GaN surface does not degrade the robustness of the deposited dielectric layer; (ii) the addition of the trench etch, while improving reproducibility, results in a decrease of breakdown performance compared to the planar structures. (iii) for the trench structures, the voltage for a 10 years lifetime is still above 20 V, indicating a good robustness. (iv) To review the trapping performance across the metal-dielectric-GaN stack, forward-reverse capacitance-voltage measurements with and without stress and photo-assistance are performed. Overall, as-grown planar capacitors show lowest trapping, while trench capacitors have higher interface trapping, and bulk trapping comparable to the blanket etched capacitors. (v) The nanostructure of the GaN/dielectric interface was characterized by high resolution scanning transmission electron microscopy (HR-STEM). An increased roughness of 2-3 monolayers at the GaN surface was observed after blanket etching, which was correlated to the higher density of interface traps. The results presented in the paper give fundamental insight on how the etch and trench processing affects the trapping and robustness of trench-gate GaN-MOSFETs, and provide guidance for the optimization of device performance.
... However, during the high temperature deposition process of the LPCVD-SiN x , Ga atoms in the GaN material will diffuse outward, resulting in the formation of Ga vacancies and dangling bonds on the GaN surface, which can increase the surface leakage [24]. SiON is a dielectric with a bandgap between the SiO 2 (9 eV) and SiN x (5.3 eV) [25]. It has been reported that the PECVD-SiON can form a stable atomic structure interface with GaN and reduce the Ga dangling bonds that are terminated by N in SiON although the SiON dielectric layer alone can not overcome the gate leakage well [14,26,27]. ...
This study has demonstrated AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors (MIS-HEMTs) on Si substrates with a SiNx/SiON composite gate dielectric. The threshold voltage shift in the devices was investigated. The MIS-HEMTs with the SiNx/SiON composite gate dielectric exhibited superior threshold voltage uniformity and small threshold voltage hysteresis than the reference device with SiNx only gate dielectric. The variation of the device threshold voltage was mainly related to trapping process by the interface states, as confirmed by band diagrams of MIS-HEMTs at different gate biases. Based on frequency-dependent capacitance measurements, interface state densities of the devices with the composite and single gate dielectrics were extracted, where the former showed much smaller interface state density. These results indicate that the SiNx/SiON composite gate dielectric can effectively improve the device performance of GaN-based MIS-HEMTs and contribute to the development of high-performance GaN electronic devices.
... The p-GaN VBM amounts to 2.7 eV below the E F , and 17.7 eV above the Ga 3d core line, which is in line with other works [49]. The VBM position shows a shortage of the p-type charges -this behaviour was also observed by Long and McIntyre [53]. ...
... Hence, pre-deposition surface treatments are needed to improve high-κ oxide quality. Systematic studies [68][69][70][71][72][73][74][75][76] have reported on the effect of several pre-treatments, and the principal cleaning/activation methods have been based on the use of wet chemical solutions [68][69][70][71][72]77,78] or plasma/gas actions [73][74][75][76]. Generally, the piranha (H 2 O 2 :H 2 SO 4 ) solution is used for the cleaning of carbon contaminations, but some oxidation of the nitride surface can occur [70,71]. ...
... Hence, pre-deposition surface treatments are needed to improve high-κ oxide quality. Systematic studies [68][69][70][71][72][73][74][75][76] have reported on the effect of several pre-treatments, and the principal cleaning/activation methods have been based on the use of wet chemical solutions [68][69][70][71][72]77,78] or plasma/gas actions [73][74][75][76]. Generally, the piranha (H 2 O 2 :H 2 SO 4 ) solution is used for the cleaning of carbon contaminations, but some oxidation of the nitride surface can occur [70,71]. ...
High-κ dielectrics are insulating materials with higher permittivity than silicon dioxide. These materials have already found application in microelectronics, mainly as gate insulators or passivating layers for silicon (Si) technology. However, since the last decade, the post-Si era began with the pervasive introduction of wide band gap (WBG) semiconductors, such as silicon carbide (SiC) and gallium nitride (GaN), which opened new perspectives for high-κ materials in these emerging technologies. In this context, aluminium and hafnium oxides (i.e., Al2O3, HfO2) and some rare earth oxides (e.g., CeO2, Gd2O3, Sc2O3) are promising high-κ binary oxides that can find application as gate dielectric layers in the next generation of high-power and high-frequency transistors based on SiC and GaN. This review paper gives a general overview of high-permittivity binary oxides thin films for post-Si electronic devices. In particular, focus is placed on high-κ binary oxides grown by atomic layer deposition on WBG semiconductors (silicon carbide and gallium nitride), as either amorphous or crystalline films. The impacts of deposition modes and pre- or postdeposition treatments are both discussed. Moreover, the dielectric behaviour of these films is also presented, and some examples of high-κ binary oxides applied to SiC and GaN transistors are reported. The potential advantages and the current limitations of these technologies are highlighted.
... Les autres diélectriques se révèlent globalement moins adaptés. Le dépôt par les méthodes ALD n'est pas toujours possible [29], [166], les décalages de bandes peuvent être trop faibles, et la stabilité chimique est parfois mauvaise (comme pour MgO, qui nécessite par exemple un dépôt additionnel de Sc2O3 pour éviter une dégradation à l'air [170]). On pourra toutefois noter l'existence du HfO2 comme autre alternative éventuellement intéressante (contrairement aux résultats de la référence [29], et davantage en accord avec [166], des valeurs de 1.4eV et 1eV sont rapportés par [171], respectivement pour le VBO et le CBO de HfO2 sur GaN) . ...
... Le dépôt par les méthodes ALD n'est pas toujours possible [29], [166], les décalages de bandes peuvent être trop faibles, et la stabilité chimique est parfois mauvaise (comme pour MgO, qui nécessite par exemple un dépôt additionnel de Sc2O3 pour éviter une dégradation à l'air [170]). On pourra toutefois noter l'existence du HfO2 comme autre alternative éventuellement intéressante (contrairement aux résultats de la référence [29], et davantage en accord avec [166], des valeurs de 1.4eV et 1eV sont rapportés par [171], respectivement pour le VBO et le CBO de HfO2 sur GaN) . ...
... 29 : calculs des facteurs A (à gauche) et C (au centre) en fonction de la taille des LED ; tracé de la dépendance linéaire du facteur A au ratio périmètre/surfaces[84]. ...
La µLED à base de nitrure de gallium (GaN) constitue un candidat de choix pour répondre aux spécifications des nouvelles applications de réalité augmentée, et pourrait également trouver sa place dans une gamme plus large d’applications à plus grande échéance. Cependant, le ratio périmètre-surface élevé des µLED les rend très sensibles aux défauts de bords générés, en particulier, par la gravure de pixellisation. Des étapes de post-traitement des flancs des µLED, relevant du domaine de la passivation de surface, doivent donc être implémentées et optimisées, afin de minimiser la chute d’efficacité à laquelle les µLED inorganiques sont confrontées plus généralement. C’est ce qui constitue la problématique de cette thèse, traitant plus spécifiquement de µLED bleues à base de GaN/InGaN.En premier lieu, cette thèse s’est efforcée d’identifier les pistes les plus prometteuses pour la passivation des µLED GaN à partir de la littérature. Ensuite, des caractérisations physico-chimiques ont permis d’étudier l’effet de traitements chimiques ou encore de dépôts d’alumine par méthodes ALD (Atomic Layer Deposition) sur les propriétés de surface de l’InGaN, le matériau constituant la zone active des µLED. Certains comportements spécifiques ont pu être observés, notamment après des traitements avec de l’acide chlorhydrique ou du sulfure d’ammonium, plutôt efficaces pour réduire la quantité d’indium en surface, ou encore l’oxydation de ce dernier. Cependant, un traitement avec de l’ammoniaque serait plus favorable à une bonne nucléation de la couche ALD de passivation, toute aussi importante pour la qualité de l’interface. Cela a pu être étayé par des caractérisations électriques C-V (capacité-tension) de condensateurs MIS (métal-isolant-semiconducteur), qui ont permis de souligner une forte réduction de la densité d’états d’interface peu profonds entre une couche ALD d’alumine et du n-GaN, par l’ajout d’un simple prétraitement avec l’ammoniaque avant dépôt (plus de 98% de réduction). Enfin, à l’aide d’une méthodologie d’étude en cycles courts, des caractérisations de cathodoluminescence ont permis de comparer l’effet de plus d’une vingtaine de variantes différentes de passivation sur les propriétés de luminescence de mésas µLED de 4µm. L’étude a permis d’illustrer l’efficacité d’une gravure chimique avec de l’hydroxyde de potassium combinée à un dépôt ALD d’alumine, mais également celle de l’alternative très prometteuse que constitue la passivation en bicouche nitrure d’aluminium/alumine. Dans les deux cas, l’émission était nettement plus homogène sur la surface des mésas : la zone « critique » à luminescence atténuée en périphérie de µLED était réduite de près de 50% et 65%, respectivement.
... Mobility (μ) values of 111 cm 2 /V · s [15] and 1 cm 2 /V · s [16] have been used for electrons in Ga 2 O 3 and holes in PCD, respectively, relative permittivity values of 10.2, 5.5, and 9 for Ga 2 O 3 , diamond, and Al 2 O 3 , respectively. The band alignment at Ga 2 O 3 -Al 2 O 3diamond junctions assumed is shown in Fig. 1(c), from combining the reported values of band offsets across Ga 2 O 3 -GaN [17], diamond-GaN [18] and Al 2 O 3 -GaN [19] junctions. The estimated values of the band offsets are then incorporated in the simulations using electron affinity (χ) rule (Ec = qχ) [14]. ...
The design space of Ga₂O₃-based devices is severely constrained due to its low thermal conductivity and absence of viable p-type dopants. In this work, we discuss the limits of operation of a novel Ga₂O₃-Al₂O₃-diamond-based super-junction device concept, which can alleviate the constraints associated with Ga₂O₃-based devices. The improvements achieved using the proposed device concept are demonstrated through electrical and thermal simulations of Ga₂O₃-Al₂O₃-diamond-based super-junction Schottky barrier diodes (SJ-SBDs) and non-punch-through or conventional Schottky barrier diodes (NP-SBDs). The SJ-SBD enables operation below the
$R_{{on}}$
-breakdown voltage limit of Ga₂O₃ NP-SBD, enabling >4 kV blocking voltage at
$R_{{on}}$
of 1-3 mΩcm². The maximum switching frequency of SJ-SBD may be only a few kHz, as it is limited by the activation energy of acceptors (0.39 eV) in the diamond. Crucially, compared with NP-SBD, the use of diamond also results in ~60% reduction in temperature rise during static power dissipation. Polycrystalline diamond (PCD) properties depend on detailed microstructure and benefits compared to ideal Ga₂O₃ NP-SBD arise for diamond critical fields ≥6 MV/cm and thermal conductivities as low as 50-150 W/(m · K).
... It has been shown that exposure to certain ALD metal precursors, namely alkyl compounds, can reduce a surface oxide layer if the reactions are energetically favourable, 37−39 and this is also routinely utilized for example in the so-called "self-cleaning" process of III−V semiconductor materials. 40 In the case of copper oxide surfaces, for surface reactions of diethylzinc, commonly used as a precursor for ALD ZnO, the Gibbs free energies for reduction reactions of the Cu 2 O surface into metallic Cu are ΔG r = (−300) − (−200) kJ mol −1 (T = 373 K). 38 The reactions between trimethylaluminum (TMA) and Cu 2 O can be assumed to be even more favorable due to higher reactivity of the TMA. The reduction of the oxidized Cu surface during the first Al 2 O 3 cycles has been verified both numerically and experimentally. ...
High-performance p-type oxide thin film transistors (TFTs) have great potential for many semiconductor applications. However, these devices typically suffer from low hole mobility and high off-state currents. We fabricated p-type TFTs with a phase-pure polycrystalline Cu2O semiconductor channel grown by atomic layer deposition (ALD). The TFT switching characteristics were improved by applying a thin ALD Al2O3 passivation layer on the Cu2O channel, followed by vacuum annealing at 300 °C. Detailed characterization by transmission electron microscopy-energy dispersive X-ray analysis and X-ray photoelectron spectroscopy shows that the surface of Cu2O is reduced following Al2O3 deposition and indicates the formation of a 1-2 nm thick CuAlO2 interfacial layer. This, together with field-effect passivation caused by the high negative fixed charge of the ALD Al2O3, leads to an improvement in the TFT performance by reducing the density of deep trap states as well as by reducing the accumulation of electrons in the semiconducting layer in the device off-state.
