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This master’s thesis presents the analysis and design of a two-stage 100W and
universal input ac-dc LED driver. The driver’s front-end topology is composed by a
PFC (Power Factor Corrector) boost converter whereas the back-end deploys and Zeta
Asymmetrical Half-Bridge converter (ZAHB). The document complies a short overview on
the LED general conce...
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This paper is concerned with the derivation of a discontinuous conduction mode boost PFC rectifier as a driver for high-power LED lighting applications. The proposed driver is operated in the current mode regime while emulating a resistance towards the line, thus attaining a near unity power factor and low total harmonic distortion of the line curr...
Citations
... Usually, a constant current drives the LED light source, and the driver's quality will affect the light source's overall performance [4], [5], [6]. Because of such characteristics as high conversion efficiency, low voltage stress, constant frequency control, and a small capacitive filter, the Asymmetric Half-Bridge (AHB) converter are significantly advantageous when applied to a high-power LED driver [7], [8], [9]. When the two-stage topology formed by Boost-AHB is used for multi-channel LED series driving, the overall conversion efficiency can reach 94.5% [10]. ...
... At time t 2 (t 6 ), the resonance causes the primary side voltage of the transformer to drop to zero, and the transformer decouples. In these two intervals, L r and L f simultaneously provide resonance energy, and i p at t 2 (t 6 ) and i L f are expressed respectively as formulas (8) and (9): ...
... At t 3 (t 7 ), Q 2 (Q 1 ) conducts with ZVS and enters into mode 4 (8). During this interval, the voltage on both sides of the transformer remains 0, all U C B is loaded into L r , and i p linearly decreases (rises). ...
In this paper, we propose three advanced digital predictive current-mode control (DPCC) algorithms based on a simplified estimation method of duty cycle lost time for asymmetric half-bridge (AHB) LED constant-current driver. They are the digital predictive peak current mode control(DPPCC) algorithm based on leading-edge modulation, the digital predictive quasi-valley current mode control(DPqVCC) algorithm based on trailing-edge modulation, and the digital predictive quasi-average current mode control(DPqACC) algorithm based on double-edge modulation. Simulation and experimental results demonstrate that the three DPCC algorithms can effectively offset the effect of delay on digital control performance, which confirms the superiority of DPqACC. When the DPqACC is applied, the series-load-jump transition times are below 4.5 ms, the maximum load adjustment rate is 0.5%/ V, and the output current can be tuned continuously between 0.3 A and 4.5 A with the longest transition time of 1 ms. Moreover, the three DPCC algorithms are capable of compensating for low-frequency ripples due to the rapid regulation speed of the inner loop. With the electrolytic capacitance removed without additional ripple compensation, the maximum peak-to-peak value of the low-frequency secondary ripple is 0.1163 A (2.91%) when the input is 400 53sin(2ω
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t
) V and the output is 4 A. This approach provides an excellent solution for the digital design of low-ripple AC-DC LED constant-current drivers without electrolytic capacitance.
