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Due to power dissipation, area, and reliability characteristics, CMOS technology has been influenced in nanosystems. Quantum Dot Cellular Automata (QCA) is a research project that studies alternative feasible systems that have similar capabilities. A 1-bit comparator was constructed using QCA nanotechnology. There are no crossovers in these circuit...
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Quantum-dot Cellular Automata (QCA) is recognized in electronics for its low power consumption and high-density capabilities, emerging as a potential substitute for CMOS technology. GDI (Gate Diffusion Input) technology is featured as an innovative approach for enhancing power efficiency and spatial optimization in digital circuits. This study intr...
Functional circuits are a group of combinational logic circuits which may be utilized for certain tasks and with specific planning. Decoders, multiplexers, and demultiplexers are all functional circuits that come in useful when creating complex systems. Quantum-dot cellular automata (QCA) is a flourishing technology that would be so practical in th...
Since the scaling of transistors is growing rapidly, the need for an efficient alternative for the Complementary Metal-Oxide-Semiconductor (CMOS) technology to obtain further and extra processes in the circuits has been known as the main problem. Over the last decade, Quantum-dot Cellular Automata (QCA) technology has been recognized as a suitable...
A strong need for high-speed and low-power consumption devices seems inevitable due to the high speed of technological advancement in the field of microelectronics. Designers are highly interested in designing and making nanoscale devices. The Quantum Cellular Automaton (QCA) is known as one of these technologies, which makes it feasible to impleme...
Due to the development of integrated circuits and the lack of responsiveness to existing technology, researchers are looking for an alternative technology. Quantum-dot cellular automata (QCA) technology is one of the promising alternatives due to its higher switch speed, lower power dissipation, and higher device density. One of the most important...
Citations
... Using the bulk biasing technique to design the TVL circuits is time consuming and complex task. Hence, the researchers looked for alternative technologies such as quantum-dot FETs, reversible logics, single-electron transistors and CNTFETs [3][4][5][6][7][8]. Out of them, using CNTFET technology is optimistic way to develop the TVL digital logic circuits because the multi-threshold CNTFETs can be obtained by changing the diameter of CNT [2]. ...
This work presents a novel technique to develop the three-valued logic (TVL) circuit schematics for very large-scale integration (VLSI) applications. The TVL is better alternative technology over the two-valued logic because it provides decreased interconnect connections, fast computation speed and decreases the chip complexity. The TVL based complicated designs such as half-adder and multiplier circuits are designed utilizing the Pseudo N-type carbon nanotube field effect transistors (CNTFETs). The proposed TVL half adder multiplier schematics are developed in HSPICE tool. Additionally, the delay and circuit area for the half- adder and multiplier circuits are investigated and compared to the complementary circuits. The memory usage and CPU time for the proposed circuits are also analyzed. It is observed that the proposed circuit designs show the improved performance up to 43.03% on an average over the complementary designs.
A strong need for high-speed and low-power consumption devices seems inevitable due to the high speed of technological advancement in the field of microelectronics. Designers are highly interested in designing and making nanoscale devices. The Quantum Cellular Automaton (QCA) is known as one of these technologies, which makes it feasible to implement digital circuits with a high operating speed. In this paper a 4-bits counter, a 3-bits bidirectional counter, a 4-bits counter with a reset terminal, and a 4-bit counter with both set and reset terminals are designed using the proposed D-latch to demonstrate that these circuits function accurately in more complex circuits. According to the results, the area was respectively reduced by 8.33 and 15.38% with a 4.76% reduction in the delay rate in the proposed 4-bits counter and 3-bits bidirectional counter compared to the best previous designs. All the designs and simulation results are being done in the QCAPro and QCADesigner software.
The quantum-dot cellular automata (QCA) technology is one of the technologies for CMOS replacement which work based on columbic interacts. In this study, two two-bit comparator circuits are presented based on QCA and evaluated in terms of cell count, latency, and occupied area. Moreover, this study aims to reduce the occupied area, complexity, and energy dissipation of the comparator circuits, so the two comparator circuits have different power consumption levels. The proposed two-bit comparators are more compact and perform more consistently compared to previous designs. Design parameters of the two proposed circuits are optimized by reducing the cell count and occupied area compared to previous studies. The simulation results show that the proposed designs have a completely correct performance. In the first proposed two-bit comparator, 122 cells are used on an area of 0.14 µm2 with a latency of 2.25 clock cycles. The second proposed two-bit comparator uses 107 cells on an area of 0.17 µm2 with a latency of 1.75 clock cycles. Moreover, the values of energy dissipation of the proposed two-bit comparators at tunneling energies of 0.5, 1, and 1.5 Ek are calculated. In the first proposed two-bit comparator, the average energy dissipation for tunneling energies of 0.5, 1, and 1.5 Ek are calculated as 161.43, 222.83 and 296.52 meV, respectively. In the second proposed two-bit comparator, the average energy dissipation for tunneling energies of 0.5, 1, and 1.5 Ek are calculated as 139.36, 192.92, and 257.06 meV, respectively.
