The schematic of a silicided NMOS transistor indicating the gate to source/drain contact spacing (GSCS/GDCS) and the n+ overlap with the source/drain contact (S/D_OL)

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... schematic of a silicided NMOS transistor used in the transmission line pulsing(TLP) test and simulation is shown in Fig. 1 with the gate to source/drain contact spacing (GSCS/GDCS) and the n+ overlap with the source/drain contact (S/D_OL) indicated. The ρ C of silicide/n+ source and drain regions ranges from 10 -8 Ωcm 2 to 10 -5 Ωcm 2 , depending on process conditions. Fig. 2 shows the IV curve measured by TLP test and 2-D electrothermal simulation with ...

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... understand this phenomenon, physical insight can be obtained from the empirical data. The dependence of second breakdown triggering current It 2 has been investigated as a function of the gate-to-source/drain salicided contact spacing(GSCS and GSDS in Fig 1.) by Oh et al. [5]. It is shown that It 2 improves by increasing GDCS, mainly due to the reduction of current localization. ...

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... simulation results with the complete hetero-junction physical model are shown for a Ti/n + Si Schottky barrier diode(SBD) with various doping concentrations( Fig. 9) and ambient temperatures (Fig. 10). As shown in Fig. 10, the simulated IV curve at 300 K matches quite well to the experimental result [6] and the high temperature behavior can be predicted as ...

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... simulation results with the complete hetero-junction physical model are shown for a Ti/n + Si Schottky barrier diode(SBD) with various doping concentrations( Fig. 9) and ambient temperatures (Fig. 10). As shown in Fig. 10, the simulated IV curve at 300 K matches quite well to the experimental result [6] and the high temperature behavior can be predicted as ...

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... [2,7] is based on two assumptions; 1) free carriers are fully depleted within the depletion region; 2) the quasi-Fermi level is flat across the depletion region. By comparing numerical models against the physical model, it is demonstrated that the above two assumptions lead to significant deviations particularly at high temperatures. In Fig. 11, model A indicates the model with both assumptions and model B is only with the second assumption. The numerical model is extended by removing these assumptions [8]. In the improved model, a unified contact resistance expression is explicitly obtained and the results(model C in Fig. 11) shows excellent match with those from the ...

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... significant deviations particularly at high temperatures. In Fig. 11, model A indicates the model with both assumptions and model B is only with the second assumption. The numerical model is extended by removing these assumptions [8]. In the improved model, a unified contact resistance expression is explicitly obtained and the results(model C in Fig. 11) shows excellent match with those from the physical model. In Fig. 12, the ρ C values extracted from the complete hetero-junction model simulations with various ambient temperatures and doping concentrations are compared with the new numerical model. Similar trends of doping and temperature dependence can be clearly observed. Fig.13 ...

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... the improved model, a unified contact resistance expression is explicitly obtained and the results(model C in Fig. 11) shows excellent match with those from the physical model. In Fig. 12, the ρ C values extracted from the complete hetero-junction model simulations with various ambient temperatures and doping concentrations are compared with the new numerical model. Similar trends of doping and temperature dependence can be clearly observed. ...

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... trends of doping and temperature dependence can be clearly observed. Fig.13 shows the simulated I DS -V DS curves at 300K and 700K for a 0.13 µm silicided NMOS transistor at V GS 1.5 V using the two contact models. ...

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... 300K to 700K, because the carrier mobility in the channel decreases at higher temperatures. However, taking the temperature dependence of ρ C into account, this current decrease is considerably reduced in both of the two models, since the decrease of contact resistance at higher temperatures compensates the increase of the channel resistance. Fig. 14 shows the fraction of the drain current as a function of the position along the contact simulated with the two models at two different temperatures. It is observed that as temperature increases, current localization is more severe due to the reduction of contact resistance as predicted in [2], which may degrade the ESD robustness. It ...