Figure 1 - uploaded by Philip Machanick
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The growing CPU-DRAM speed gap, expressed as relative speed over time (log scale). The vertical lines represent intervals at which the speed gap has doubled.
Source publication
The memory wall is the predicted situation where improvements to processor speed will be masked by the much slower improvement in dynamic random access (DRAM) memory speed. Since the prediction was made in 1995, considerable progress has been made in addressing the memory wall. There have been advances in DRAM organization, improved approaches to m...
Context in source publication
Context 1
... ) t ≈ 1.4 t , resulting in the gap doubling every 2.1 years. Figure 1 illustrates the trends, assuming a conservative CPU speed improvement of 50% per year. Consequently, even if the number of memory references to DRAM is a relatively small fraction of the total, the fraction of overall run time spend waiting for DRAM -if the problem is not addressed -will grow over time, and eventually dominate the total time spent executing a program [Wulf and McKee 1995]. ...
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Citations
... Meanwhile, it provides direct and efficient support in hardware for the compiler and runtime system to exploit thread level parallelism in the program, in which it was believed to have much more potential for performance improvement [44]. Furthermore, the multithreaded execution model provides an easy way to hide the ever increasing memory access latency [45] and thus improves the program execution efficiency. In short, multicore processor is a very promising computer architecture that can effectively translate the billion number of transistors on the chip to program performance without violating power consumption limits. ...
