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This chapter has summarized the types of PLL used within electronic systems, the primary function of the core blocks and key specifications. Typical test strategies and test parameters have been described and a number of DfT and BIST solutions described. It is clear that as circuit speeds increase and electronic systems rely more heavily on accurat...
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This paper deals with a class of Resistive-Inductive-Capacitive (RLC) circuits and switched RLC (s-RLC) circuits modeled in Brayton Moser framework. For this class of systems, new passivity properties using a Krasovskii's type Lyapunov function as storage function are presented. Consequently, the supply-rate is a function of the system states, inpu...
Citations
... A voltage-controlled oscillator (VCO) is one of the most important blocks in analog and digital electronics [8]. It is main functional block in phase-locked loops systems, or as a clock generator in clock generator circuits [8]. ...
... A voltage-controlled oscillator (VCO) is one of the most important blocks in analog and digital electronics [8]. It is main functional block in phase-locked loops systems, or as a clock generator in clock generator circuits [8]. ...
... Voltage-controlled oscillator may be implemented by several solutions: ring oscillator topology, LC-oscillator topology, current starve topology, etc. [8], [9]. Ring oscillator is a cascaded combination of delay stages, connected in a close loop. ...
In this paper, the application of the Artificial Neural Network (ANN) algorithm has been used for testing selected specification parameters of voltage-controlled oscillator. Today, mixed electronic circuits specification time is an issue. An analog part of Phase Locked Loop is a voltage-controlled oscillator, which is very sensitive to variation of the technology process. Fault model for the integrated circuit voltage control oscillator (VCO) in ring topology is introduced and the before test stage classificatory is designed. In order to reduce testing time and keep the specification accuracy (approximation) on the high level, an artificial neural network has been applied. The features selection process and output coding for specification parameters are described. A number of different ANN have been designed and then compared with real specification of the VCO. The results obtained gives response in short time with high enough accuracy.
... In numerous very-large-scale digital and mixed-signal system-onchips (SoCs), the phase locked loops (PLLs) are extensively used and its architecture is categorized into four domains: fully analog, fully digital, software based and semi-digital with charge pump (SDCP) [2]. These architectures are primarily used for synthesizing the clock where high-frequency on-chip clock signal is generated from a low frequency board-level clock. ...
... These architectures are primarily used for synthesizing the clock where high-frequency on-chip clock signal is generated from a low frequency board-level clock. Contemporarily, SDCP PLL has been widely implemented in various SoC environments and chipset applications, such as radio frequency synthesis and data synchronization applications [2]. The frequency synthesizer, which is realized using PLL, generates range of frequencies from a stable frequency source. ...
... PLLs are efficient in tracking narrow band signals [2]. The designed bandwidth determines settling time and tracking capabilities of the frequency synthesizer. ...
This paper presents the application of an artificial neural network with a genetic algorithm for identifying the selected specification parameters of a voltage-controlled oscillator (VCO). In modern electronics, the complexity of the production process may cause errors in analogue and mixed-signal electronic circuits, and inaccuracies in this technological process have a direct impact on the specification parameters of a VCO. The modern market requires that the production process has to be as quick as possible, and therefore testing systems should be fast and have the highest efficiency of parameter identification. In the following paper, a genetic algorithm is used to optimise the number of output signal measurement points, which allows them to be identified by the specification parameters of the VCO that are selected by an artificial neural network. The proposed method is characterised by shortening the test time of the system while maintaining a high efficiency in the identification of the selected design specification parameters.
DOI: http://dx.doi.org/10.5755/j01.eie.24.6.20945
The paper presents an approach of the fuzzy logic expert system to test a specification of voltage controlled oscillator. The expert system takes into account parametric faults and the test procedure is orientated on circuits’ specification. The introduction is focused on analog fault testing, its technics, approaches and goals. Next, the specification parameters are introduced and fault models are clarified. The method uses linguistic variables in the premise section of the expert system. Such variables are described by membership functions that allows to convert linguistic information into numeric values. Then, the conclusion section for the expert system with the Takagi-Sugeno type has been described in details. The approach has been compared with classic dictionary based on SVM method. Finally, the results prove high efficiency of the test specification of VCO circuits.
Charge-pump phase locked loop is one of circuits, which is widely used to generate reference signals in communication systems, and needs to be verified correctly. Voltage controlled oscillator is one of the most important block in all PLL structure responsible of the output frequency value. This paper proposes a neural network application for functional testing of VCO block. The method belongs to SBT technique focused on specification like gain, T-lock and input-output ratio with Neural Network as a decision-making system.
This paper describes a new architecture that explores time-based signal-processing concepts for testing LC-tank radio-frequency (RF) oscillator circuits, and in particular, quadrature oscillators, while relying on low-frequency digital test equipment. The proposed system has two inputs that are two step-like signals with a time separation that is externally controlled. The output of the system is an amplified and digitized time separation that is a function of the time separation between the applied input steps and the oscillator output frequency characteristics. Coarse time digitization circuits are used to read the output, from which the frequency of oscillation of the oscillator is deduced. A proof-of-concept circuit is designed and fabricated in a standard 0.18-μm CMOS process. Experimental results confirm the feasibility of the proposed approach, which is demonstrated in this work with the successful on-chip measurement of 1.5 and 1.7 GHz oscillation frequencies.
