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Structure of streaming single instruction -multiple data extensions 2 operations on floating point 32-bit data

Structure of streaming single instruction -multiple data extensions 2 operations on floating point 32-bit data

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This paper aims at elaborating on the digital signal processing techniques used in data manipulation in the radioSolariz solar radio-telescope project. Focus is drawn on the implementation of different digital signal processing algorithms through the use of streaming single instruction – multiple data extensions 2. This complementary instruction se...

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... by the CPU to some extent, depending on the underlying processor architecture and algorithm structure. On the other hand, SSE2 floating point instructions offer the capability to perform four operation in parallel on 32-bit floating point data due to the presence of four SSE2 arithmetic and logical units (ALUs) for each processor core (see Fig. 2) or two operation in parallel on 64-bit floating point data. For the purposes of radioSolariz digital signal processing 32-bit floating point data suffices. Thus theoretically a fourfold increase in data throughput can be achieved. Due to implicit parallelism realized by the CPU on regular x87 instructions the improvement in ...