Figure 1 - available via license: Creative Commons Attribution 4.0 International
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Structure of (a) a von-Neumann architecture and (b) the memristive memory processing unit (mMPU) architecture. In addition to standard memory operations, the mMPU can run logic operations in-memory.
Source publication
Stateful logic is a digital processing-in-memory technique that could address von Neumann memory bottleneck challenges while maintaining backward compatibility with von Neumann architectures. In stateful logic, memory cells are used to perform the logic operations without reading or moving any data outside the memory array. This has been previously...
Contexts in source publication
Context 1
... the last 75 years, computers have been typically designed in the von Neumann architecture, which separates the memory from the processing units (Fig. 1a). While their programming model is simple, incessant data movement limits system performance because memory access time is often substantially longer than the computing time. This bottleneck has worsened over the years since CPU speed has improved more than memory speed and bandwidth (the so-called 'memory wall') 1 . One attractive ...
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... logic 3, 4 is a processing-in-memory technique based on memristive memory technologies (Fig. 1b), e.g., resistive random-access memory (RRAM) or conductive-bridge RAM (CBRAM). In stateful logic, the stored resistive data is used as input and the result is written to an output memory cell without reading the input cells beforehand or moving any data outside the memory array. Stateful logic enables PIM architectures such as the ...
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... memory (RRAM) or conductive-bridge RAM (CBRAM). In stateful logic, the stored resistive data is used as input and the result is written to an output memory cell without reading the input cells beforehand or moving any data outside the memory array. Stateful logic enables PIM architectures such as the memristive memory processing unit (mMPU, Fig. 1b) 5 that offer massive intrinsic parallelism, high-performance, and energy-efficient processing, while maintaining backward compatibility with von Neumann ...
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... gates are compatible with the memory crossbar structure and can be applied in parallel on multiple rows. Additionally, previous applications suggested for stateful logic using RRAM are applicable to our PCM-based method (Supplementary Text 1). ...
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