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Schematic diagrams of (a) a biological neural network and (b) an artificial neural network. (c) A 2D cross-point array structure and (d) a 3D vertical array structure of a nonvolatile resistive memory.
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In this work, a synaptic weight transfer method for a neuromorphic system based on resistive-switching random-access memory (RRAM) is proposed and validated. To implement the on-chip trainable neuromorphic system which utilizes large-scale hardware synapse units, a fast and reliable write scheme needs to be established. Based on the experimental re...
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... schematic diagram of a biological neural network is shown in Fig. 1(a). Biological neurons that operate based on the integrate-and-fire mechanism to transmit weighted signals through the synapse region and also the synaptic connections and their long-/short-term plasticity are known to play the most important role in the learning and memory functions of a human brain and various studies which implement ...
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... the synapse region and also the synaptic connections and their long-/short-term plasticity are known to play the most important role in the learning and memory functions of a human brain and various studies which implement those functionalities into electronic systems have been reported [5]- [11]. The conceptual structure of a simple ANN ( Fig. 1(b)) is deeply inspired by the biological neural network, and this structure has been the basis of most of the well-known neural networks [12]. Various nonvolatile memory array structures can be considered to realize the connectivity and synaptic plasticity of neural networks at the hardware level, but the cross-point array structure ...
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... ultrahigh-density applications, a 3D and vertically stacked structure that is similar to the recent 3D NAND Flash memory may also be considered as shown in Fig. 1(c) [13]. Multilevel conductivity states and long-/short-term memory characteristics that can be realized within a highly scalable cell structure have made RRAM favored by many researchers. However, the switching operation based on the soft breakdown of a switching layer and the read operation that relies on direct charge flows through ...
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... the performance degradation such as inference accuracy is minimized. The inference accuracy of a hardware synapse array after weight transfer from an ANN was obtained by SPICE circuit simulations and compared to those of different software cases. The weight distributions of a one-layer ANN before and after supervised training are represented in Fig. 10(a). When trained for 50 epochs without any constraints, it can be seen that most of the weight values are distributed in the range of −2 to 2. Fig. 10(b) shows the weight distributions before and after supervised learning, and after quantization when there is an initial/in-training nonnegative weight constraint. The nonnegative weight ...
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... ANN was obtained by SPICE circuit simulations and compared to those of different software cases. The weight distributions of a one-layer ANN before and after supervised training are represented in Fig. 10(a). When trained for 50 epochs without any constraints, it can be seen that most of the weight values are distributed in the range of −2 to 2. Fig. 10(b) shows the weight distributions before and after supervised learning, and after quantization when there is an initial/in-training nonnegative weight constraint. The nonnegative weight constraint is set before training process starts and is applied each time to adjust the weight values. With the nonnegative constraint, the initial and ...
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... training, the weight values can be quantized to suit the hardware implementation. The red bars in Fig. 10(b) indicate the position and distribution of the quantized ...
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... Fig. 10(c), Case1 shows the pattern recognition accuracy when the Modified National Institute of Standards and Technology (MNIST) dataset is used in an ideal software level. It can be seen that the nonnegative weight constraint has little effect on the accuracy (Case2). According to the experimental results in Fig. 10(c), it can be confirmed that ...
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... Fig. 10(c), Case1 shows the pattern recognition accuracy when the Modified National Institute of Standards and Technology (MNIST) dataset is used in an ideal software level. It can be seen that the nonnegative weight constraint has little effect on the accuracy (Case2). According to the experimental results in Fig. 10(c), it can be confirmed that the negative weight value is not always essential if there are more than 32 weight levels and to solve problems such as simple pattern recognition. This result is also consistent with the results of a recently reported study [11]. At the same time, weight quantization can affect the accuracy depending on the ...
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... The artificial immune system (AIS) and the metaheuristic genetic algorithm (GA) were applied to overcome such nonlinear uncertain conditions because of the appropriate particular sensor and the complicated circuitry [10]. However, immune cells have a huge population structure and adaptive machinery, which results in a poor conversion rate and a lengthy conversion time for AIS and GA algorithms [11]. Crossover procedures are used in conjunction with computational convergence time to enhance the mutation. ...
... In the implementation of MPPT, a control variable (duty cycle) is controlled by the MPPT controller. This generates a control signal in the range [0,1] which is given in Equations (11) and (12): ...
Recently, due to rapid growth in electric vehicle motors, used and power electronics have received a lot of concerns. 3ϕ induction motors and DC motors are two of the best and most researched electric vehicle (EV) motors. Developing countries have refined their solution with brushless DC (BLDC) motors for EVs. It is challenging to regulate the 3ϕ BLDC motor’s steady state, rising time, settling time, transient, overshoot, and other factors. The system may become unsteady, and the lifetime of the components may be shortened due to a break in control. The marine predator algorithm (MPA) is employed to propose an e-vehicle powered by the maximum power point tracking (MPPT) technique for photovoltaic (PV). The shortcomings of conventional MPPT techniques are addressed by the suggested approach of employing the MPA approach. As an outcome, the modeling would take less iteration to attain the initial stage, boosting the suggested system’s total performance. The PID (proportional integral derivative) is used to govern the speed of BLDC motors. The MPPT approach based on the MPA algorithm surpasses the variation in performance. In this research, the modeling of unique MPPT used in PV-based BLDC motor-driven electric vehicles is discussed. Various aspects, which are uneven sunlight, shade, and climate circumstances, play a part in the low performance in practical scenarios, highlighting the nonlinear properties of PV. The MPPT technique discussed in this paper can be used to increase total productivity and reduce the operating costs for e-vehicles based on the PV framework.
... Several memory devices such as static random access memory (RAM), phase-change memory, spin-transfer torque RAM, floating gate memory, charge trap flash memory, and resistive RAM (RRAM) have been proposed to emulate the functionalities of synapses [5]- [10]. Among these, RRAM-based synapse devices have a simple structure comprising two terminals, low-power operation, and fast switching speed [11]- [16]. ...
Resistive random-access memory (RRAM) has been explored to implement neuromorphic systems to accelerate neural networks. In this study, an RRAM crossbar array using poly(chloro-para-xylylene) (PPXC) as both a resistive switching layer and substrate was fabricated. PPXC is a flexible and transparent polymer with excellent chemical stability and biocompatibility. We studied PPXC-based RRAM devices with Ti/PPX-C/Cu and Cu/PPX-C/Ti structures. Devices with the Ti/PPX-C/Cu structure offer stable electrical and mechanical characteristics, such as a low set voltage of <1 V, good retention time of >10
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s, endurance cycles of >300, conductance ON/OFF ratio >10, and can withstand >350 mechanical bending cycles. Additionally, the switching and conduction mechanisms of the devices were carefully investigated by analyzing their electrical, structural, and chemical properties. Finally, we demonstrated the feasibility of the fabricated RRAM array for neuromorphic applications through system-level simulations using the Modified National Institute of Standards and Technology database. The simulation results reflecting the variations of realistic devices demonstrated that the artificial neural network developed using the PPXC-based RRAM array works satisfactorily in pattern recognition tasks. The findings of this study can aid in the development of future wearable neuromorphic systems.
Reverse charge injection (RCI) dual-gate synaptic transistors and their effective weight update method are proposed. First, the structural features of the proposed RCI dual-gate synaptic transistors are discussed in comparison with our previous work. Second, the weight update efficiency of the proposed synaptic transistors is discussed by analyzing the coupling capacitance components, which determine the electric field distribution across the tunneling and blocking oxides. Consequently, the program voltage and pulse width are reduced by 56.4% and 99.0%, respectively. The power consumption for the weight update operation is lowered by 99.6%. In addition, the anti-back-tunneling effect resulting from the low erase voltage is discussed. Third, the weight update conditions of the proposed synaptic transistors are optimized by adjusting the bottom gate length. Fourth, the proposed synaptic transistors implement 16 stable states (32 states with inhibitory synapses) and a fairly linear weight update by using both the increment step pulse program (ISPP) and increment step pulse erase (ISPE). Finally, the PGM/ERS operation of target cell and inhibit operation of surrounding cells are verified in RCI dual-gate synaptic transistor-based 2×2 NOR-type array.
With increasing demand for wearable electronics capable of computing huge data, flexible neuromorphic systems mimicking brain functions have been receiving much attention. Despite considerable efforts in developing practical neural networks utilizing several types of flexible artificial synapses, it is still challenging to develop wearable systems for complex computations due to the difficulties in emulating continuous memory states in a synaptic component. In this study, polymer conductivity is analyzed as a crucial factor in determining the growth dynamics of metallic filaments in organic memristors. Moreover, flexible memristors with bio‐mimetic synaptic functions such as linearly tunable weights are demonstrated by engineering the polymer conductivity. In the organic memristor, the cluster‐structured filaments are grown within the polymer medium in response to electric stimuli, resulting in gradual resistive switching and stable synaptic plasticity. Additionally, the device exhibits the continuous and numerous non‐volatile memory states due to its low leakage current. Furthermore, complex hardware neural networks including ternary logic operators and a noisy image recognitions system are successfully implemented utilizing the developed memristor arrays. This promising concept of creating flexible neural networks with bio‐mimetic weight distributions will contribute to the development of a new computing architecture for energy‐efficient wearable smart electronics.
Artificial neural networks (ANNs) are widely used in numerous artificial intelligence‐based applications. However, the significant amount of data transferred between computing units and storage has limited the widespread deployment of ANN for the artificial intelligence of things (AIoT) and power‐constrained device applications. Therefore, among various ANN algorithms, quantized neural networks (QNNs) have garnered considerable attention because they require fewer computational resources with minimal energy consumption. Herein, an oxide‐based ternary charge‐trap transistor (CTT) that provides three discrete states and non‐volatile memory characteristics are introduced, which are desirable for QNN computing. By employing a differential pair of ternary CTTs, an artificial synaptic segregation with multilevel quantized values for QNNs is demostrated. The approach establishes a platform that combines the advantages of multiple states and robustness to noise for in‐memory computing to achieve reliable QNN performance in hardware, thereby facilitating the development of energy‐efficient AIoT.
