Schematic diagram of a POLO contact with a non-uniform SiO x layer. The possible conduction paths include direct tunneling, localized conduction near thinned SiO x and localized conduction through pinholes. Very recently, Liu et al. used an industrial i-TOPCon process and 157.4 mm × 157.4 mm quasi-monocrystalline cast wafers to fabricate high efficiency bifacial Si solar cells with a rear n-POLO contact with SiN x passivation and screen-printed electrodes. The champion device has a measured V oc of 712 mV and a certified efficiency of 23.22% [64]. When this process is applied to n-type CZ wafers, a certified best cell efficiency of 23.57% and median module power over 345 W were obtained [65]. In [66], this group reported a higher median efficiency of 23.91% and certified total area efficiency of 24.58% for the same substrate type.

Schematic diagram of a POLO contact with a non-uniform SiO x layer. The possible conduction paths include direct tunneling, localized conduction near thinned SiO x and localized conduction through pinholes. Very recently, Liu et al. used an industrial i-TOPCon process and 157.4 mm × 157.4 mm quasi-monocrystalline cast wafers to fabricate high efficiency bifacial Si solar cells with a rear n-POLO contact with SiN x passivation and screen-printed electrodes. The champion device has a measured V oc of 712 mV and a certified efficiency of 23.22% [64]. When this process is applied to n-type CZ wafers, a certified best cell efficiency of 23.57% and median module power over 345 W were obtained [65]. In [66], this group reported a higher median efficiency of 23.91% and certified total area efficiency of 24.58% for the same substrate type.

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Carrier-selective passivating contacts for effective electron and hole extraction are crucial to the attainment of high efficiency in crystalline silicon (Si) solar cells. In this comprehensive review, the principle of carrier extraction and recombination mechanisms in conventional industrial Si solar cells are discussed first. Passivating contacts...

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... main feature of this model is that the SiO x layer is not of uniform thickness after thermal annealing. As shown in Figure 7, there can be localized areas where the SiO x is of reduced thickness or where it is absent. Pinholes in ultrathin oxide has been observed by conductive atomic force microscopy [62]. ...