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![Schematic diagram of a 4‐bit PBW DAC based on unbalanced directional couplers and modulators. a) Schematic of the working principle. b) Sketch of a PBW DAC in parallel configuration. A carrier (CW laser) is fanned out into multiple branches via an unbalanced directional coupler (i. Scanning electron microscope [SEM] image of the directional couplers and its operation) according to the formula: (1−r)N where r is the splitting ratio (r = 0.75) and N is the number of bits. The intensity of the signal is modulated in each branch by an EAM (extinction ratio = 4.6 dB[²⁴]) according to a digital input electrical signal. In the presence of a binary “0,” a systematic phase shift is added to the branch compensating for the optical pathlength variation after modulation. This then allows for the optical signals to be (passively) coherently summed by means of a combiner (ii. SEM image of the combiner and device principle). c) Microscope image of the fabricated passive 4‐bit PBW DAC circuit with the integration of thermal phase shifters for the digital input “1111.” d) Optical measurements of the passive 4‐bit PBW DAC. The output for each digital input configuration is collected using an IR camera, ultimate with high‐speed integrated detectors. The layout of the PIC (red) is superimposed to the IR image for clarity. The optical power for the digital input “1111” state is shown.](publication/346254985/figure/fig3/AS:11431281179410473@1691190833247/Schematic-diagram-of-a-4-bit-PBW-DAC-based-on-unbalanced-directional-couplers-and.png)
Schematic diagram of a 4‐bit PBW DAC based on unbalanced directional couplers and modulators. a) Schematic of the working principle. b) Sketch of a PBW DAC in parallel configuration. A carrier (CW laser) is fanned out into multiple branches via an unbalanced directional coupler (i. Scanning electron microscope [SEM] image of the directional couplers and its operation) according to the formula: (1−r)N where r is the splitting ratio (r = 0.75) and N is the number of bits. The intensity of the signal is modulated in each branch by an EAM (extinction ratio = 4.6 dB[²⁴]) according to a digital input electrical signal. In the presence of a binary “0,” a systematic phase shift is added to the branch compensating for the optical pathlength variation after modulation. This then allows for the optical signals to be (passively) coherently summed by means of a combiner (ii. SEM image of the combiner and device principle). c) Microscope image of the fabricated passive 4‐bit PBW DAC circuit with the integration of thermal phase shifters for the digital input “1111.” d) Optical measurements of the passive 4‐bit PBW DAC. The output for each digital input configuration is collected using an IR camera, ultimate with high‐speed integrated detectors. The layout of the PIC (red) is superimposed to the IR image for clarity. The optical power for the digital input “1111” state is shown.
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Digital‐to‐analog converters (DAC) are indispensable functional units in signal processing instrumentation and wide‐band telecommunication links for both civil and military applications. As photonic systems are capable of high data throughput and low latency, an increasingly found system limitation stems from the required domain crossing such as di...
Citations
... Furthermore, these RF lines present heat load to every stage in the dilution refrigerator via thermal conduction and RF attenuation/filtering. In contrast, photonic methods use fiber optic cables which reduce transmission noise and provide higher bandwidth, lower phase noise, faster operation, and reduced heat load [8][9][10][11][12][13][14][15]. To leverage these advantages, we develop a photonic dispersive comb-to-tone converter (DCTC) for quantum control. ...
The recent advent of quantum computing has the potential to overhaul security, communications, and scientific modeling. Superconducting qubits are a leading platform that is advancing noise-tolerant intermediate-scale quantum processors. The implementation requires scaling to large numbers of superconducting qubits, circuit depths, and gate speeds, wherein high-purity RF signal generation and effective cabling transport are desirable. Fiber photonic-enhanced RF signal generation has demonstrated the principle of addressing both signal generation and transport requirements, supporting intermediate qubit numbers and robust packaging efforts; however, fiber-based approaches to RF signal distribution are often bounded by their phase instability. Here, we present a silicon photonic integrated circuit-based version of a photonic-enhanced RF signal generator that demonstrates the requisite stability, as well as a path towards the necessary signal fidelity.
... This highlights the critical importance of high-performance interface building blocks responsible for interdomain conversion, such as digital-to-analog converters (DACs), which convert digital signals into analog ones. While conventional electronic DACs commonly deploy interleaving solutions to deal with the speed (i.e., conversion rate) and resolution trade-off [1], photonic-based implementations of DACs provide promising alternative solutions with improved conversion rates and efficiency, attracting a multitude of research directions from the summation of weighted wavelength division multiplexed (WDM) signals to segmented Mach-Zehnder Modulators (MZMs) driving methods [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. This interest extends beyond addressing the above bandwidth limitations, encompassing the realization of high-performance DACs for instrumentation, arbitrary waveform generation [21], photonic parallel processing [22], and other potential domains. ...
... Figure 1. State-of-the-art topologies for the implementation of photonic digital-to-analog converters (PDACs) classified under categories of serial [2][3][4][5], incoherent parallel [7][8][9][10][11][12][13][14][15][16][17], coherent parallel [18,19], and serial-parallel [6,20]. The top schematics illustrate data handling in the 2-bit serial (left) and parallel (right) PDACs, where each color represents arbitrary 2-bit digital data converted to analog output in electro/optical domain, as depicted by the red dashed line. ...
... This topology, loosely classified under both serial and parallel categories, encounters technical challenges when the PDAC resolution is scaled up because of the trade- Figure 1. State-of-the-art topologies for the implementation of photonic digital-to-analog converters (PDACs) classified under categories of serial [2][3][4][5], incoherent parallel [7][8][9][10][11][12][13][14][15][16][17], coherent parallel [18,19], and serial-parallel [6,20]. The top schematics illustrate data handling in the 2-bit serial (left) and parallel (right) PDACs, where each color represents arbitrary 2-bit digital data converted to analog output in electro/optical domain, as depicted by the red dashed line. ...
This work introduces a novel architecture for implementing a parallel coherent photonic digital-to-analog converter (PDAC), designed to transform parallel digital electrical signals into corresponding analog optical output, convertible to analog electrical signals using photodiodes. The proposed architecture incorporates microring resonator-based modulators (MRMs), phase shifters, and symmetric multimode interference couplers. Efficient modulation is achieved by MRMs utilizing carrier depletion-induced refractive index changes, while metal heaters facilitate tuning of the ring resonator resonance wavelength. The proposed architecture is scalable to higher bit resolutions and exhibits a dynamic range limited by MRM’s sensitivity to applied bias and noise levels. Experimental results of the fabricated chip in the silicon-on-insulator (SOI) platform showcase the successful realization of a 4 GSample/sec conversion rate in a 2-bit resolution operation, along with a stationary conversion of four parallel DC digital signals into 16 analog intensity levels in a 4-bit PDAC configuration. The study encompasses a proof-of-concept experimental demonstration of 8 Gbps data conversion, along with a 50 Gbps data conversion rate using the optimized design in the simulation, affirming the accuracy and quality of the PDAC architecture. These findings contribute to the advancement of PDAC technology, providing insights into performance characteristics, limitations, and potential applications.
... Photonic digital-to-analog converters (PDACs) are a promising technique for arbitrary waveform generation which may potentially overcome the bottlenecks related to their electrical counterparts such as parasitic effects, inter-channel cross talk and timing jitter [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. There has been a growing interest in the study of PDACs for various applications including microwave photonic radar [8,[21][22][23], optical networks [17], and visible light communication [24]. ...
... Photonic digital-to-analog converters (PDACs) are a promising technique for arbitrary waveform generation which may potentially overcome the bottlenecks related to their electrical counterparts such as parasitic effects, inter-channel cross talk and timing jitter [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20]. There has been a growing interest in the study of PDACs for various applications including microwave photonic radar [8,[21][22][23], optical networks [17], and visible light communication [24]. A number of PDAC configurations have been proposed in the literature, among which the optical power weighting and summing structure are the most popular. ...
Photonic digital-to-analog converters (PDACs) with segmented design can achieve better performance than conventional binary PDACs in terms of effective number of bits (ENOB) and spurious-free dynamic range (SFDR). However, segmented PDACs generally require an increased amount of laser sources. Here, a structure of bipolar segmented PDAC based on laser wavelength multiplexing and balanced detection is proposed. The number of lasers is reduced by a half compared to a conventional segmented design with the same nominal resolution. Moreover, ideal bipolar output with no direct-current bias can be achieved with balanced detection. A proof-of-concept setup with a sampling rate of 10 GSa/s is constructed by employing only four lasers. The PDAC consists of four unary weighted channels and four ternary weighted channels. The measured ENOB and SFDR are 4.6 bits and 37.0 dBc, respectively. Generation of high-quality linear frequency-modulated radar waveforms with an instantaneous bandwidth of 4 GHz is also demonstrated.
... However, electronic ADCs (EADCs) face challenges in achieving higher performance due to aperture jitter and limited analog bandwidth of electronic components [4,5]. Photonic ADCs (PADCs) offer a promising solution, utilizing low-time-jitter optical sampling pulse trains generated by mode-locked lasers (MLLs) and ultra-wide analog bandwidth of electro-optic modulators [6][7][8][9]. According to the implementation principles, PADCs can be typically divided into three types: photonic-assisted ADC (PA-ADC) [10,11], photonic sampled and electronic quantized ADC (PS-ADC) [12,13], and photonic sampled and quantized ADC (PSQ-ADC) [14][15][16][17][18][19][20][21]. ...
... To illustrate this concept, here is an example of a dynamic range of [-2π, 2π]. The gray curve in Fig. 2(d) shows the expansion of the dynamic range, increasing the number of quantization codes from [0,9] to [0,19]. Thus, with each additional fold, the dynamic range expands proportionally. ...
... As Fig. 4(b) shows, the red dashed line and the black line in the plot represent the ideal transfer function and the measured wrapped transfer function, respectively. It can be observed from the obtained transfer function that the quantization levels are periodically limited to [0,9] due to the modulo operation occurring in the optical quantizer. In the phase domain, the modulus is 2π, corresponding to 10 in the digitized output of the PSOQ-ADC. ...
We propose what we believe to be a novel approach to enhance the dynamic range of a photonic analog-to-digital converter (PADC) without the need of additional custom-designed circuits or components. The method utilizes the unique characteristic of our previously reported multimode interference (MMI) coupler-based optical quantizer that exploits the periodicity of the optical phase to realize a modulo operation. Experiments were carried out to verify the effectiveness of the proposed method on our phase-shifted optical quantization ADC (PSOQ-ADC) chip. Experimental results show that our proposed method enhance the dynamic range from [ $- {V_\pi }$ − V π , ${V_\pi }$ V π ] to [ $- 2{V_\pi }$ − 2 V π , $2{V_\pi }$ 2 V π ] and has the potential to be further extended. Additionally, we successfully reconstructed radio frequency (RF) signals at a sampling rate of 30 Gs/s. Our work provides a promising solution for achieving a high dynamic range in on-chip PSOQ-ADC.
... However, those optical pulse shaping systems are implemented based on freespace optics, making the systems bulky, costly, and vulnerable to environmental disturbances. In recent years, benefiting from the rapid progress in microwave photonics [39][40][41] , microwave arbitrary waveform generation implemented by fiberoptics [42][43][44][45][46][47][48][49] or photonic integrated devices [50][51][52][53][54][55] in the temporal [43][44][45][46] or frequency domain [47][48][49]51,53 has been reported. AWGs based on fiber-optics or photonic integrated devices have lower loss, smaller size and better waveform reconfigurability, but the bandwidths of generated microwave waveforms are still small, limited by the bandwidths of electro-optical modulators and photodetectors. ...
... However, those optical pulse shaping systems are implemented based on freespace optics, making the systems bulky, costly, and vulnerable to environmental disturbances. In recent years, benefiting from the rapid progress in microwave photonics [39][40][41] , microwave arbitrary waveform generation implemented by fiberoptics [42][43][44][45][46][47][48][49] or photonic integrated devices [50][51][52][53][54][55] in the temporal [43][44][45][46] or frequency domain [47][48][49]51,53 has been reported. AWGs based on fiber-optics or photonic integrated devices have lower loss, smaller size and better waveform reconfigurability, but the bandwidths of generated microwave waveforms are still small, limited by the bandwidths of electro-optical modulators and photodetectors. ...
Synthetic dimension opens new horizons in quantum physics and topological photonics by enabling new dimensions for field and particle manipulations. The most appealing property of the photonic synthetic dimension is its ability to emulate high-dimensional optical behavior in a unitary physical system. Here we show that the photonic synthetic dimension can transform technical problems in photonic systems between dimensionalities, providing unexpected solutions to technical problems that are otherwise challenging. Specifically, we propose and experimentally demonstrate a fully reconfigurable photonic Galton board (PGB) in the temporal synthetic dimension, in which the temporal high-speed challenge is translated into a spatial fiber-optic length matching problem, leading to the generation of tera-sample-per-second arbitrary waveforms with ultimate flexibility. In the experiments, an arbitrary waveform with a widely tunable sampling rate, ranging from 10.42 GSa/s to a record high of 1.64 TSa/s, is demonstrated. The concept of dimension conversion offers possible solutions to various physical dimension-related problems, such as super-resolution imaging, high-resolution spectroscopy, and high-precision time measurement.
... Above 5 GHz baud rates and 8-bit resolution DACs and ADCs become quite expensive to operate [55]. If the PTC application allows processing data in the optical domain (from an optical input, such as for intra data-center, for example), then a photonic PIC-based DAC would be beneficial [126]. This could include also energy harvesting, such as recapturing optical nonlinearities [127], nanoscale RF antennas or solar cells [128]. ...
The explosion of artificial intelligence and machine-learning algorithms, connected to the exponential growth of the exchanged data, is driving a search for novel application-specific hardware accelerators. Among the many, the photonics field appears to be in the perfect spotlight for this global data explosion, thanks to its almost infinite bandwidth capacity associated with limited energy consumption. In this review, we will overview the major advantages that photonics has over electronics for hardware accelerators, followed by a comparison between the major architectures implemented on Photonics Integrated Circuits (PIC) for both the linear and nonlinear parts of Neural Networks. By the end, we will highlight the main driving forces for the next generation of photonic accelerators, as well as the main limits that must be overcome.
... Optical sampling techniques, as the first step of analog to digital conversion, have been presented through linear sampling and with nonlinear optical effects in highly nonlinear fibers or crystals [11]- [17]. Additionally, several photonicsassisted analog-to-digital converters (PADCs) have been proposed as a way to circumvent the limitations of EADC [4], [11], [18]. ...
To keep pace with increasing data rates in the worldwide communication networks and the increased bandwidths requirements in measurement devices, sensors, radar, and many other applications, photonics-assisted analog-to-digital converters (PADCs) may be promising alternatives to circumvent the bandwidth bottleneck in pure electronic analog-to-digital converters (EADCs). Here we analyze optical sub-Nyquist orthogonal sampling with sinc-pulse sequences for the time-interleaving of high-bandwidth input signals into parallel low-bandwidth sub-signals (first sampling stage). These sub-signals are then detected and further processed with low-bandwidth electronic devices in parallel branches (second sampling stage). Orthogonal sampling with ideal devices is error-free. Additionally, in contrast to electronic sample and hold circuits, the first sampling stage is based on a multiplication and not a switching. Therefore, it adds no aperture jitter and the low jitter of today's oscillators can be directly transferred to the sampling of high-bandwidth signals. Compared to the direct detection, in simulations and a proof of concept experimental demonstration, we show around 8.5 dB signal-to-noise and distortion (SINAD) and 1.4 bit effective number of bits (ENOB) improvement for the detection of a 14.5 GHz signal with the proposed method in a three-branch system. With further simulations we analyze the possibilities and limits of the method and derive an equation for the resolution. In a nine-branch system with a jitter of 10 fs for the oscillator and 100 fs for the electronics, 100 GHz input signals can be processed with a resolution of 6 bit in 11 GHz electronics, for instance. The scheme is only based on a modulator and standard RF equipment. Therefore, integration into a single chip, together with the following electronic ADCs is straightforward.
... Some new companies (Guidetech, Carmel and Berkeley Nucleonics Corporation) build the time interval counter with a resolution of around 1ps. However, their resolution cannot be improved further because of the bottleneck of electronic bandwidth and their intrinsic timing jitter [17,18]. Therefore, several photonic-based methods are proposed, such as cross-correlation [19] and optical heterodyne [20]. ...
High-resolution jitter measurement is essential for the next generation of electronic communications and sensor systems. However, most electrical timing jitter measurement equipment has a low resolution because of the limitations of electronic processing accuracy. Meanwhile, photonics-based jitter measurement methods have a higher resolution but cannot measure the widely used electrical signals. This work proposes a potential high-resolution jitter measurement method for electrical signals based on the photonics time stretch technique. The jitter information can be magnified in the optical domain and then measured by electrical equipment. The experimental results demonstrate that the jitter of an electrical pulse is magnified from 59.02 ps to 663.29 ps when the magnification factor is 11.24.
... As an important development within the computer discipline, artificial neural networks bring revolutionary solutions for image processing [1,2], speech recognition [3,4], data prediction [5], etc., but have gradually encountered bottlenecks in hardware implementation in terms of latency and power consumption [6,7]. As one of the paths to breaking through Moore's Law, on-chip optical computing has been attracting attention for its high speed, low theoretical consumption, and natural suitability for parallel computing [8]. ...
... Above 5GHz baud rates and 8-bit resolution DACs and ADCs become quite expensive to operate. If the PTC application allows processing data in the optical domain (from an optical input, such as for intra data-center, for example), then a photonic PIC-based DAC would be beneficial [121]. Energy harvesting such as recapturing optical nonlinearities [122] or nanoscale RF antennas or solar cells [123]. ...
The explosion of artificial intelligence and machine-learning algorithms, connected to the exponential growth of the exchanged data, is driving a search for novel application-specific hardware accelerators. Among the many, the photonics field appears to be in the perfect spotlight for this global data explosion, thanks to its almost infinite bandwidth capacity associated with limited energy consumption. In this review, we will overview the major advantages that photonics has over electronics for hardware accelerators, followed by a comparison between the major architectures implemented on Photonics Integrated Circuits (PIC) for both the linear and nonlinear parts of Neural Networks. By the end, we will highlight the main driving forces for the next generation of photonic accelerators, as well as the main limits that must be overcome.
