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Routers and switches differences
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Nowadays reconfigurable Network-on-Chip (NoC) is common high performance on-chip communication architecture for multi-core System-on-Chips (SoCs). This paper improved overall performance of reconfigurable NoC and throughput by using some extra switches and multiplexers. In the proposed architecture, some routers are replaced with 5-port switches. S...
Context in source publication
Context 1
... switches like routers, input and output links of each port can be used in the same time however each link cannot share with two data streams [1] [13]. Table 1 shows the differences between switch and router in terms of delay and power consumption [1] [13]. The main idea of the proposed architecture is using more advantages of switch and decrease hop counts to improve the performance. ...Similar publications
With the advancement in CMOS technology and multiple processors on the chip, communication across these cores is managed by a network‐on‐chip (NoC). Power and performance of these NoC interconnects have become a significant factor.The authors aim to reduce the leakage power consumption of NoC buffers by the use of non‐volatile spin transfer torque...
In Image processing applications the utilization of on-chip Static Random Access memory (SRAM) in Field Programmable Gate Array (FPGA) is extremely important. True dual port (TDP) SRAM and Single port SRAM are typically available SRAM's for image processing applications, but in case of data access policy the memory need to redesign. Hence On-Chip m...
In Image processing applications the utilization of on-chip Static Random Access memory (SRAM) in Field Programmable Gate Array (FPGA) is extremely important. True dual port (TDP) SRAM and Single port SRAM are typically available SRAM's for image processing applications, but in case of data access policy the memory need to redesign. Hence On-Chip m...
Citations
... The deadlines of throughput or latency are mostly used as QoS. Design time developed communication infrastructure may not able to meet the QoS demand of application that is added by run time (Carara et al., 2014;Darbani and Zarandi, 2014). So there is a need of run time reconfigure communication infrastructure that can reconfigure the communication subsystem on runtime based on QoS requirement of the application (Zheng et al., 2010;Benini and Micheli, 2002). ...
... So there is a need of run time reconfigure communication infrastructure that can reconfigure the communication subsystem on runtime based on QoS requirement of the application (Zheng et al., 2010;Benini and Micheli, 2002). Using network on chip (NoC) as communication infrastructure is perfect solution to provide on demand bandwidth, parallelism and scalability of systems (Darbani and Zarandi, 2014;Zheng et al., 2010). NoCs consist of a set of routers and point-to-point interconnection channels. ...
... The deadlines of throughput or latency are mostly used as QoS. Design time developed communication infrastructure may not able to meet the QoS demand of application that is added by run time (Carara et al., 2014;Darbani and Zarandi, 2014). So there is a need of run time reconfigure communication infrastructure that can reconfigure the communication subsystem on runtime based on QoS requirement of the application (Zheng et al., 2010;Benini and Micheli, 2002). ...
... So there is a need of run time reconfigure communication infrastructure that can reconfigure the communication subsystem on runtime based on QoS requirement of the application (Zheng et al., 2010;Benini and Micheli, 2002). Using network on chip (NoC) as communication infrastructure is perfect solution to provide on demand bandwidth, parallelism and scalability of systems (Darbani and Zarandi, 2014;Zheng et al., 2010). NoCs consist of a set of routers and point-to-point interconnection channels. ...
... But the architecture uses arbiter which increase area requirement. Paria and Reza [6] proposed Reconfigurable NoC router by replacing few routers by five port switches constructed by standard SRAM cells. This architecture reduces delay, power consumption and increase throughput of the circuit at the cost of area overhead. ...
In today's modern life high speed devices are the essential components of daily human life to reduce efforts of day to day works. For this reason those device must be able to operate at very high speed. To increase the operating speed, normally multi-core processing architecture is used. In those cases, the total task is subdivided into multiple tasks and each processing cores are executing a particular task in parallel manner. But to calculate accurate value of the total task the individual processors must share some of the variables depending upon the task. So, bi-directional communication is necessary between all processing elements present in the multi-core system. But many issues occur in normal bus architecture to support this kind of communications. This case Network-On-Chip (NoC) router is suitable. In this paper we propose four port NoC router which can operate at high speed by consuming less area.
