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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provid...
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An analysis of the metal oxide semiconductor field effect transistor (MOSFET) in strong inversion indicates two bias regions, in each of its triode and saturation conditions, whose distinct properties are elaborated and shown to lead to simple, systematic, design procedures for achieving low temperature coefficient (TC) voltages (<±100 ppm/°C) and...
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... The Spice Gummel-Poon (SGP) [19] and Vertical Bipolar Intercompany Model (VBIC) [20] were chosen for the high-temperature modeling. The SGP HT-models were developed [21] for binned temperature points (25 ○ C, 100 ○ C, 200 ○ C, 300 ○ C, 400 ○ C, 500 ○ C) for the device from a previous fabrication round by extracting the DC parameters from forward and reverse output characteristics as well as the Gummel plot of an n-p-n bipolar transistor. All the parameters of the HT models are provided in [21]. ...
... The SGP HT-models were developed [21] for binned temperature points (25 ○ C, 100 ○ C, 200 ○ C, 300 ○ C, 400 ○ C, 500 ○ C) for the device from a previous fabrication round by extracting the DC parameters from forward and reverse output characteristics as well as the Gummel plot of an n-p-n bipolar transistor. All the parameters of the HT models are provided in [21]. The HT models corresponding to desired temperature points can be setup in Cadence by choosing the model libraries. ...
... The device from a previous fabrication round that was used to extract models are reported in [21], the simulated forward Gummel plot and forward current gain (β) at 25, 300 and 500 ○ C are shown in Figure 8f,g, respectively, and are used for the circuit design of this work. In order to increase device density per unit area, second generation devices were designed in our group and are used for the circuit fabrication of this work. ...
A Process Design Kit (PDK) has been developed to realize complex integrated circuits in Silicon Carbide (SiC) bipolar low-power technology. The PDK development process included basic device modeling, and design of gate library and parameterized cells. A transistor–transistor logic (TTL)-based PDK gate library design will also be discussed with delay, power, noise margin, and fan-out as main design criterion to tolerate the threshold voltage shift, beta ( β ) and collector current ( I C ) variation of SiC devices as temperature increases. The PDK-based complex digital ICs design flow based on layout, physical verification, and in-house fabrication process will also be demonstrated. Both combinational and sequential circuits have been designed, such as a 720-device ALU and a 520-device 4 bit counter. All the integrated circuits and devices are fully characterized up to 500 °C. The inverter and a D-type flip-flop (DFF) are characterized as benchmark standard cells. The proposed work is a key step towards SiC-based very large-scale integrated (VLSI) circuits implementation for high-temperature applications.
Ring oscillators (ROs) are used to study the high-temperature characteristics of an in-house silicon carbide (SiC) technology. Design and successful operation of the in-house-fabricated 4H-SiC n-p-n bipolar transistors and TTL inverter-based 11-stage RO are reported from 25 °C to 600 °C. Non-monotonous temperature dependence was observed for the oscillator frequency; in the range of 25 °C to 300 °C, it increased with the temperature (1.33 MHz at 300 °C and V
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=15 V), while it decreased in the range of 300 °C-600 °C. The oscillator output frequency and delay were also characterized over a wide range of supply voltage (10 to 20 V). The noise margins of the TTL inverter were also measured; noise margin low (NM
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) decreases with the temperature, whereas noise margin high (NM
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) increases with the temperature. The measured power-delay product (P
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· T
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) of the TTL inverter and 11-stage RO was ≈ 4.5 and ≈285 nJ, respectively, at V
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=15 V. Reliability testing indicated that the RO frequency of oscillation decreased 16% after HT characterization.
