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In this paper, a 10-Gb/s inductorless CMOS receiver front end is presented, including a transimpedance amplifier and a limiting amplifier. The transimpedance amplifier incorporates Regulated Cascode (RGC), active-inductor peaking, and intersecting active feedback circuits to achieve a transimpedance gain of 56 dBW and a bandwidth of 8.27 GHz with a...
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... the aspect of LA, since the required voltage swing of the CDR is about 400 mV, the voltage gain of LA must achieve at least 80 V/V (38 dB). The overall receiver front end with re- quired gain and signal swing for SONET OC-192 is demonstrated in Figure 2. ...
Context 2
... idea of the interleaving active-feedback architecture is to interleave an additional active feedback cell between each two successive gain cells while each cell already pos- sesses a local active feedback. The architecture of the in- terleaving active-feedback cell is identical to that of the local one, as depicted in Figure 12. Surprisingly, the -3- dB bandwidth is substantially extended at only a few costs in voltage gain by interleaving the feedback cell. ...
Context 3
... idea is that the interleaving feedback alleviates the gain peaking accumulation near the -3-dB frequency brought by the cascaded identical gain cells. Consider the two-stage third-order gain cells in Figure 12. The transfer functions of the gain cells without and with interleaving active feedback are as follows: (10) respectively, where (11) (12) and (13) With transfer functions, we can plot the frequency response. ...
Similar publications
In this paper, we propose a multistage transimpedance amplifier (TIA) based on the local negative feedback technique. Compared with the conventional global-feedback technique, the proposed TIA has the advantages of a wider bandwidth, and lower power dissipation. The schematic and characteristics of the proposed TIA circuit are described. Moreover,...
Citations
... With advancements in the submicron CMOS process, the design of monolithic optical detectors has become effective, economical and exhibits high speed. 4 The design of TIA is a challenging task as the trade-off exists between noise, bandwidth, gain, and power consumption. 6 For increasing the data rate, various bandwidth extension techniques like inductive peaking, capacitive degeneration, and negative feedback are reported in the literature. 1 Using inductive peaking techniques, high speed is achieved at the cost and power. ...
... 6 For increasing the data rate, various bandwidth extension techniques like inductive peaking, capacitive degeneration, and negative feedback are reported in the literature. 1 Using inductive peaking techniques, high speed is achieved at the cost and power. 4 Various inductorless TIA topologies proposed are available in the literature. [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] Some of them to mention are regulated cascode circuit based TIAs 2,6-9 and inverter based TIA. 3 Another issue is sensitivity, which is limited by the input-referred noise and electrical cross-talk. ...
... 4 Various inductorless TIA topologies proposed are available in the literature. [2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] Some of them to mention are regulated cascode circuit based TIAs 2,6-9 and inverter based TIA. 3 Another issue is sensitivity, which is limited by the input-referred noise and electrical cross-talk. Today's monolithic TIAs lead to cross-talk via the substrate. ...
An active feedback network‐based bandwidth extension technique for CMOS differential transimpedance amplifier (TIA) is proposed in 0.18 µm CMOS process technology. The design consists of three stages in differential mode. The first stage is a common‐source amplifier that minimizes noise. A common collector stage is used for level shifting and buffering in the second stage. The third stage is a differential amplifier that provides additional gain. In addition to these three stages, an active CMOS negative feedback circuit is used for extending the bandwidth. The proposed design achieves a gain of 45.2 dBΩ with a 3 dB bandwidth of 21.23 GHz. The active feedback circuit provides an additional bandwidth of 7.3 GHz. The TIA achieves a data rate of 30 Gb/s with input‐referred noise current density of 63.1 pA/ Hz $\sqrt{\mathrm{Hz}}$ and jitter of 9.07 ps. The TIA consumes a power of 10.3 mW with a supply voltage of 1.8 V.
... Thus, open loop topologies like RGC-TIA and CG-TIA are not a preferable option in low BW biomedical applications. Moreover, because the input referred noise current of the biasing current source is directly referred to the input, such topologies have the worst noise performance, see equations (31) and (37). Since the power consumption of the cascode transistor is very low (subthreshold operation), judging the performance by only FoM1 can be deceiving. ...
... This is because the RGC-TIA needs less biasing current to attain the same effective transconductance for the cascode transistor; since gmn is multiplied by ( ) A 1 rg ; ;+ as described by equation (33). Consequently, lower biasing current (lower ) g B mn means lower noise contribution from the dominant noise source (the biasing current source) which is directly proportional to , g B mn see equation (37). Furthermore, it is clear that the noise performances of the CG-TIA and the RGC-TIA are the worst among the studied topologies. ...
Recently, different medical devices have emerged and utilized in a numerous health care fields such as pulse oximetry, cuffless blood pressure using Photoplethysmogram (PPG), noninvasive blood glucose measuring, and Near Infrared Spectroscopy (NIRS). Those devices are very similar in their analog front end circuit which is a transimpedance amplifier (TIA). Many different TIA topologies have appeared in different optoelectronic fields which make the choice of the best TIA topology for a certain application a challenging task. In this regard, this paper presents a comparison between state of the art, previously published TIA topologies. All topologies are simulated at four different simulation cases to account for various design scenarios. The topologies are simulated with 10 pF photodiode (PD) input capacitance and 5 KHz bandwidth (BW) while optimizing for two different targets; one time for minimum input noise and the other for minimum power consumption. Moreover, the same procedures are performed with 2 pF PD and 100 MHz BW to account for higher BW demanding applications. The studied topologies are compared according to their transimpedance gain, power consumption, total input referred noise current, and dynamic range (DR) to expose their relative merits. A noise and a transimpedance gain mathematical models are also presented for each topology to assist the comparison. Recommendations to designers on which TIA to select in a certain application are concluded according to the obtained results.
... Thus, designing a low-power TIA remains a challenge. Transimpedance gain is the amplification that converts current to voltage [14]. Input sensitivity defines the minimum current detectable by the TIA, while the bandwidth/speed refers to its working range [15]. ...
Transimpedance amplifier (TIA) is an essential component of optical receivers, and this type of amplifier converts the photocurrent to a voltage signal. The overall performance of the optical receiver greatly depends on the performance of this component. Low-power, low-noise, and compact TIA has been realized in current development in CMOS technology. The high demands of an optical receiver has led to the optimization and development of the TIA designed specifications. However, the conventional CMOS TIA design is limited mainly because of its dependency on input node capacitance. In this article, the advancement of TIAs in data communication and instrumentation based on different design architectures and performances is discussed. This review will serve as a comparative study and reference for designing fully integrated CMOS TIA for future optical receivers.
... However, the receiver front end generally consists of two blocks: a transimpedance amplifier (TIA) and a limiting amplifier (LA). The most critical part of the receiver is the TIA due to the fact that the bandwidth of the receiver front end is mostly determined by the TIA [3,5]. TIA, which is located after the photodiode, converts and amplifies the photodiode current into an amplified voltage. ...
... Considering the requirement of high gain values in TIAs, they are frequently designed multi-staged. Due to the inherent bandwidth limitations of CMOS technology, some bandwidth improvement techniques, such as inductive peaking, feedback structure, and capacitive degeneration, are proposed in the previous literature [5], [9], [10], [11], [12], and [13]. This paper uses inductive peaking technique due to the fact that using inductors is a method for increasing bandwidth without adding additional stages and consuming more power. ...
... To increase the data rate, various bandwidth extension techniques such as inductive peaking, capacitive degeneration and negative feedback have been reported [1]. Unfortunately, the use of inductive peaking techniques reach the target of high speed with the issues of more area consumption, power and high cost [3]. To overcome this, various inductorless TIA topologies are reported in [3]- [7]. ...
... Unfortunately, the use of inductive peaking techniques reach the target of high speed with the issues of more area consumption, power and high cost [3]. To overcome this, various inductorless TIA topologies are reported in [3]- [7]. In order to limit the degradation of the sensitivity of the optical receiver due to cross talk, fully differential TIA topology are preferred as the cross talk is converted into common mode current and rejected by TIA. ...
... The RGC-TIA is difficult to be implemented at a low supply voltage. A modification in the RGC-TIA was introduced in [81,82] for low voltage operation. ...
... In summary, although for red light (650 nm) the POF's attenuation is quite large, it was shown that integrated optical receivers with M-PAM or preferably with binary modulation using an integrated equalizer can extend the POF's length to practically interesting and usable lengths for data rates in excess of 1.25 Gbit/s. T Tap,28,[30][31][32]34,39,58,112,118 Temperature,42,43,47,48 Threshold,11,47,57,60,90,98,102 TIA,vi,xviii,3,30,[54][55][56][57][58][59]70,71,[74][75][76][77][78][79][80][81][82][83]85,87,88,97,98,[102][103][104]107,112,[117][118][119]130 Topology,74,103,119 Transconductance,76,77,79,80 Transfer function,xv,[25][26][27][28][29]33,72,73,83,85,118,124,126 Transimpedance,v,3,30,47,52,53,60,69,[72][73][74]87,88,94,97,99,103,113,119 Transimpedance amplifier,v,vi,3,47,52,53,60,69,73,74,87,94,99,113,119 Transimpedance gain,30,70,[79][80][81][82][5][6][7]19,20,22,35,42,43,46,[52][53][54][55][56][57][58][59][60]63,90,95,97,99,[100][101][102][110][111][112][113][114]117,120,122,124,126,129,130 Transmitted,v,2,5,9,11,20,[31][32][33][37][38][39]43,44,[52][53][54]60,90,91,95,92,100,101,105,110,111,125,126,129 Transmitter,5,6,9,10,15,22,23,34,50,52,54,56,57 Transversal,27,28 Trigger,17 V Variable gain amplifier (VGA), 56,58,81,118 Vector signal analyzer (VSA), 54 Vector signal generator (VSG), 53 Vertical Cavity Surface Emitting Laser (VCSEL), 26, 46,48,53,55,58,90,92,94,95,117,123 Visible range,v,2,41 Viterbi,[37][38][39] ...
... In summary, although for red light (650 nm) the POF's attenuation is quite large, it was shown that integrated optical receivers with M-PAM or preferably with binary modulation using an integrated equalizer can extend the POF's length to practically interesting and usable lengths for data rates in excess of 1.25 Gbit/s. T Tap,28,[30][31][32]34,39,58,112,118 Temperature,42,43,47,48 Threshold,11,47,57,60,90,98,102 TIA,vi,xviii,3,30,[54][55][56][57][58][59]70,71,[74][75][76][77][78][79][80][81][82][83]85,87,88,97,98,[102][103][104]107,112,[117][118][119]130 Topology,74,103,119 Transconductance,76,77,79,80 Transfer function,xv,[25][26][27][28][29]33,72,73,83,85,118,124,126 Transimpedance,v,3,30,47,52,53,60,69,[72][73][74]87,88,94,97,99,103,113,119 Transimpedance amplifier,v,vi,3,47,52,53,60,69,73,74,87,94,99,113,119 Transimpedance gain,30,70,[79][80][81][82][5][6][7]19,20,22,35,42,43,46,[52][53][54][55][56][57][58][59][60]63,90,95,97,99,[100][101][102][110][111][112][113][114]117,120,122,124,126,129,130 Transmitted,v,2,5,9,11,20,[31][32][33][37][38][39]43,44,[52][53][54]60,90,91,95,92,100,101,105,110,111,125,126,129 Transmitter,5,6,9,10,15,22,23,34,50,52,54,56,57 Transversal,27,28 Trigger,17 V Variable gain amplifier (VGA), 56,58,81,118 Vector signal analyzer (VSA), 54 Vector signal generator (VSG), 53 Vertical Cavity Surface Emitting Laser (VCSEL), 26, 46,48,53,55,58,90,92,94,95,117,123 Visible range,v,2,41 Viterbi,[37][38][39] ...
In this chapter we introduce optical receivers with POF equalizers to enhance the performance for giga-bit communication over SI-POF. A single-chip fully integrated optical receiver with an integrated POF-equalizer will be introduced. The integration of large-area photodiodes, TIA, POF equalizer and 50 Ω driver on a single chip enhances the performance and lowers the cost for giga-bit communication over SI-POF. The different types of SI-POF equalizers for giga-bit transmission will be discussed. The implementation, experimental results, and discussions of these POF equalizers will be presented.
... Also, the output noise voltage v o2 due to the channel thermal noise of M n1 is given by equation (11). The output noise voltage v o3 due to the thermal noise of M n2 and M p2 is given by equation (12). Finally, The output noise voltage v o4 due to the noise of current source is given by (13). ...
This study presents an inductorless 10 Gb/s transimpedance amplifier (TIA) implemented in a 40 nm CMOS technology. The TIA uses an inverter with active common-drain feedback (ICDF-TIA). The TIA is followed by a two-stage differential amplifier and a 50 Ω differential output driver to provide an interface to the measurement setup. The optical receiver shows measured optical sensitivities of ¿17.7 and ¿16.2 dBm at BER = 10¿12 for data rates of 8 and 10 Gb/s, respectively. The TIA has a simulated transimpedance gain of 47 dBΩ, 8 GHz bandwidth with 0.45 pF total input capacitance for the photodiode, ESD protection and input PAD. The TIA occupies 0.0002 mm2 whereas the complete optical receiver occupies a chip area of 0.16 mm2. The power consumption of the TIA is only 2.03 mW and the complete chip dissipates 17 mW for a 1.1 V single supply voltage. The complete optical receiver has a measured transimpedance gain of 57.5 dBΩ.
This work introduces an active feedback structure into the Inverter Cascode Trans-Impedance amplifier design, allowing the enhanced circuit to achieve a reasonable 32 and 84 times improvement in bandwidth and power consumption respectively over the traditional circuit of Inverter Cascode Trans-Impedance amplifier utilizing resistor as feedback mechanism. The gain of the proposed enhancement circuit was determined to be 53.2 dB, with 9.2 GHz bandwidth and 3.2 mW of power consumption, hence the proposed design is appropriate for broad bandwidth applications designed to operate with low supply voltage.
In this paper, a transimpedance amplifier (TIA) based on floating active inductors (FAI) is presented. Compared with conventional TIAs, the proposed TIA has the advantages of a wider bandwidth, lower power dissipation, and smaller chip area. The schematics and characteristics of the FAI circuit are explained. Moreover, the proposed TIA employs the combination of capacitive degeneration, the broadband matching network, and the regulated cascode input stage to enhance the bandwidth and gain. This turns the TIA design into a fifth-order low pass filter with Butterworth response. The TIA is implemented using 0.18 μ m Rohm CMOS technology and consumes only 10.7 mW with a supply voltage of 1.8 V. When used with a 150 fF photodiode capacitance, it exhibits the following characteristics: gain of 41 dB Ω and −3 dB frequency of 10 GHz. This TIA occupies an area of 180 μ m × 118 μ m.
