Figure - available from: Microwave and Optical Technology Letters
This content is subject to copyright. Terms and conditions apply.
![Proposed notch filter design using the equivalent circuit model: A, shunt resonant circuit at the output network; B, series resonant circuit after impedance transformation; and C, simulated S‐parameters of the filter [Color figure can be viewed at wileyonlinelibrary.com]](publication/343679205/figure/fig2/AS:1095840223502346@1638280077428/Proposed-notch-filter-design-using-the-equivalent-circuit-model-A-shunt-resonant.png)
Proposed notch filter design using the equivalent circuit model: A, shunt resonant circuit at the output network; B, series resonant circuit after impedance transformation; and C, simulated S‐parameters of the filter [Color figure can be viewed at wileyonlinelibrary.com]
Source publication
An inverse class E frequency doubler is proposed to improve power conversion efficiency by using a transmission‐line‐based notch filter. The notch filter implemented using a transmission line is used at the output network in the doubler to suppress both fundamental and high‐order harmonic signals by a switching‐mode operation. A fourth harmonic sig...
Citations
... Each state of digital 6-bits covers its own frequency band. The min, max, and average frequency bandwidths of the capacitor banks for covering [16][17][18][19][20][21][22][23][24][25][26][27][28] GHz frequency band at TT process are 70, 600, and 223, respectively. The frequency bandwidth is varied and increased as resonant frequency is increased (Fig. 5), which is expected because the resonant frequency changes by adding or subtracting a capacitor at high frequency are bigger than those at low frequency. ...
... To obtain a wide resonant tuning frequency range, the smallest possible switching device width and the largest possible C k have to be implemented, which causes that the maximum resonant frequency is close to f max−limit in (23). However, R on−k (the turn-on resistance of M k device) increases so that the quality factor of C k and R on−k series connection becomes low. ...
... Fortunately, negative-g m pair helps to improve the quality factor, which makes the minimum resonant frequency closer to the lowest resonant frequency limit (28) while sustaining potential capability of pursuing the maximum resonant frequency close to f max−limit in (23). 28 GHz in 1-GHz steps without applying current to the negative-g m pair. ...
This article presents 16-times frequency multiplier composing of two four-times frequency multipliers (quadrupler) in cascade connection. The proposed topology is new structure of tuned-frequency multiplier (TFM) for better harmonic rejection ratio (HRR) with wide frequency range and low power consumption. For accomplishing reliable output frequency band of 16–28 GHz, the whole band is divided into 64 subsidiary frequency bands by applying 6-bits digitally controlled capacitor-bank of
LC
-tuned tank. The proposed quadrupler is consisted of a harmonic generator (HG) and a cascode
LC
-tuned buffer. The proposed HG topology is based on double balanced mixer (DBM). Unlike typical mixer bias, the bottom differential pair devices of the proposed HG are C-class biased to generate more desired the fourth order harmonic. In addition, to reduce power consumption and frequency conversion gain variations for the whole target frequency band, negative-
$g_{m}$
differential pair is added in parallel to enhance the equivalent parasitic parallel resistance of the HG
LC
-tank while keep it from oscillation. Great efforts have been contributed to minimize process variation effects by simple but relatively accurate capacitance calibration. Furthermore, each
LC
-tuned tank output amplitude is regulated by a loop to maintain same output swing for the best optimization of specifications such as power consumption and HRR. The proposed 16-times multiplier is fabricated on 65-nm complementary metal–oxide–semiconductor (CMOS) process and successfully tested. Chip die size 0.7 mm
<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>
excluding input/output (I/O) pads and average power consumption is only 6 mW for 16–28 GHz frequency band. Also, negligible phase noise degradation is achieved.
