Fig 2 - available via license: Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International
Content may be subject to copyright.
Source publication
During recent years, diamond wire sawn (DWS) multicrystalline silicon (mc-Si) wafers have been widely used to reduce the production costs; however, these wafers need additional process treatments such as reactive ion etching (RIE) or metal-catalysed chemical etching (MCCE) to form a surface with relatively low reflectivity. Although the absolute po...
Context in source publication
Context 1
... two types of mc-Si solar cells are fabricated in this study. Firstly, Al-BSF mc-Si solar cells are fabricated to evaluate the optimal etching depth using Type-2 acidic texturization solution. Mc-Si PERC cells are later fabricated as illustrated by process flow in Fig. 2. The n-type phosphorus doped emitter was formed on the front surface of DWS mc-Si wafer using POCl 3 diffusion. Rear side polish was combined with chemical isolation process to remove the unwanted diffused layer. The SiNx film was deposited on the front side surface by plasma enhanced chemical vapor deposition (PECVD) and the polished ...
Similar publications
Present study includes an overview about problems and overcoming methods of micro and nano sized defects came out during production of crystalline silicon (c-Si) substrates for electronic applications. All surface treatment steps such as diamond wire saw (DWS), lapping, polishing, micro and nano sized shaping on surface were performed respectively....
The paper presents the investigation of a new three component (HF, AgNO 3 and H 2 O 2) metal assisted etching treatment on Si. Future possible applications are in particular the texturization of multicrystalline Si substrates. Currenttreatments of these substrates are known to be complex and moderately effective, especially when diamond wire saws a...
Citations
... Moreover, diamond wire sawn (DWS) multi-crystalline wafers have been widely used in solar industries to reduce manufacturing cost, which results in a shining wafer surface, making it hard to maintain the appropriate reflectance through traditional acid texture. Some researchers use an acid texture with extra additives [20]. Also, the RIE texturing method has been studied for aluminum back surface field (Al-BSF) solar cells for reducing reflectance [21]. ...
... The SiNW is tilted at an angle to the substrate on the left side of Fig. 8d, but SiNW are vertically aligned to the substrate on the right side of Fig. 8d. The back-bond-breaking theory can be used to explain why the MacEtch etching orientation is not vertically aligned to the substrate [15,20,22,25]. A Si atom has two back bonds on the surface of a (100) substrate, but it has three back bonds on the surface of (110) or (111) substrates. ...
In this study, we fabricate uniform silicon nanowire (SiNW) arrays on 6-inch mono- and multi-crystalline wafers by employing the improved solution-processed metal-assisted chemical etching (MacEtch) method. Furthermore, the improved MacEtch can be applied to various crystalline orientation wafers. The SiNW arrays are 470 nm in length with high density; they demonstrate a good optical trapping effect and reflectance well below 6% over a broad wavelength range from 300 to 1100 nm. The improved MacEtch shows no difference in reflectance for a pyramid/SiNW mono-crystalline wafer with appropriate uniformity; the average delta from the center to other positions is within 22%. The effective lifetime is lower for SiNW arrays because the higher surface state causes higher surface recombination.Finally, we make the multi-crystalline wafer into an Al-BSF solar cell device with MacEtch SiNW texture, resulting in an averaged power conversion efficiency of 17.83%, which is higher than that of standard acid-textured solar cell devices. Consequently, the improved MacEtch concept is suitable for commercial mass production in the photovoltaic industry.
... It is also necessary to confirm whether the cell textures of the BS impact the module power and the CTM. A few studies (Schneider et al., 2015;Lin et al., 2017;Haedrich et al., 2018) have investigated the relationship between the surface morphology of solar cells and module performance, but this research was still at the laboratory scale rather than at the industry scale. Therefore, more research on how the BS nanostructure influences the cell efficiency and the mass-produced module performance is needed. ...
In this work, black multi-crystal silicon (Mc-Si) solar cells with bowl-like nanotextured surfaces were successfully fabricated by a metal-assisted chemical etching (MACE) method. Defect removal etching processes of various durations were used to form bowl-like nanostructures of three sizes on the wafer surface. Overall, a low depth and large diameter of bowl-like structure in nanotextured surfaces is demonstrated to be helpful in reducing surface recombination and improving the cell and module performance. The average cell module power of the bowl-like nanotextured surfaces with an average bowl diameter 680 nm is clearly higher by 1.51 W, 1.46 W, and 1.26 W than for nanotextured surfaces with bowl diameter 460 nm in the 18.8%, 18.9%, and 19.0% efficiency bins. A maximum cell efficiency of 19.17% and module power of 279.74 W were obtained using our MACE process in an industrial mass production line. The techniques presented in this paper can be used for the mass production of diamond wire sawing Mc-Si solar cells and meet the requirements of high efficiency and low cost in the photovoltaic industry.
Based on a traditional acid etch system (i.e., HNO3/HF), a complex texture comprising microscale and submicroscale structures was produced on the surface of a diamond‐wire‐sawn (DWS) multicrystalline Si (mc‐Si) wafer, upon whose surface it is typically difficult to form an effective texture for suppressing the reflection of incident light. Immersing the as‐cut wafer into an HF/HNO3/AgNO3 solution introduced a large number of artificial defects onto the wafer surface. A subsequent HNO3/HF etch induced a micron texture expanded from the original DWS‐induced damage as well as a submicron texture converted from the artificial defects. The multiscale textured DWS exhibited a reflectivity of ~19%, which is much lower than the reflectivity after only an HNO3/HF etch (~28%). Therefore, the solar cell performance was improved owing primarily to improved optical antireflection and surface passivation. The method is simple and can be easily scaled up into the in‐line texture process.
This thesis is dedicated to the study of crystalline silicon (c-Si) surface texturing at the nanoscale (nanotexturing) using capacitively coupled plasma reactive ion etching (CCP-RIE). The general objective consists in tuning the nanotextured surface properties to improve light-management in c-Si solar cells through front surface texturing. To this aim, plasma-surface interactions during etching in a SF6/O2 discharge are investigated using both single-frequency excitation and Tailored Voltage Waveforms (TVWs), i.e. a multifrequency approach triggering electrical asymmetries in the plasma.To gain a full picture of the achievable processing range, the electron heating mechanisms and ion bombardment energy on the surface are first studied. An identification of the dominant electron heating mechanisms in low pressure SF6/O2 plasma is demonstrated using TVWs as an innovative probing tool. Different electrical asymmetry effects are shown to arise depending on the dominant heating mode, which therefore affects both the ion flux and bombardment energy on the etched surface. Although a complete decoupling between ion energy and flux cannot be achieved in the investigated discharge conditions, TVWs do lead to an extended playground for SF6/O2 plasma etching of c-Si surfaces in CCP-RIE.The plasma-surface interaction mechanisms during SF6/O2 plasma etching and texturing of c-Si surfaces are then investigated. A processing window to achieve nanotextured anti-reflective c-Si surfaces (“black silicon”) at room temperature is delimited. Building on the work from the first section, the ion flux and bombardment energy on the c-Si surface are varied independently in this process window. A phenomenological model (etching yield varying with the square root of the ion energy above a threshold around 13 eV) is proposed. From this model, a direct (positive) link between the energy weighted ion fluence and the nanostructure height is identified. Importantly, the final nanostructure average width is shown to also weakly depend on the instantaneous ion flux during the process.Subsequently, anti-reflection and light scattering properties of plasma nanotextured c-Si surfaces are studied. Regarding anti-reflection, when the nanostructure average width is small compared to the wavelength (in c-Si), the nanotextured surface acts as an anti-reflective graded refractive index layer and a direct link between the nanostructure average height and the reflectance can be derived. Very low reflectance (in the order of 2% at normal incidence) on a broad wavelength range (approximately [250, 1000nm]) can be achieved, and the improved anti-reflective properties extend to high angles of incidence. Additionally, strong light scattering is shown to arise when the nanostructure average width overcomes a given threshold determined experimentally. Consequently, light is more efficiently trapped in the c-Si substrate, leading to superior absorption in the range [1000, 1200nm].The aforementioned optical properties of nanotextured c-Si surfaces are of practical interest for improved light management in c-Si photovoltaic devices. However, plasma induced damages (during plasma nanotexturing), as well as enlarged surface area, are responsible for increased carrier recombination. The contribution to recombination from plasma induced defects is shown to be mitigated when ion bombardment energy is kept low. Design rules are consequently proposed: optimized conditions for c-Si nanotexturing in SF6/O2 plasma can be achieved by maximizing the ion flux while keeping ion energy low (but above the etching threshold). These requirements are conflicting in the case of a single frequency CCP discharge, but the trade-off may be (at least partly) resolved using TVWs.
