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The reliability of power modules plays a crucial role in developing safer and smarter generations of electric vehicles. Condition monitoring represents a possible solution to predict the possible occurrence of catastrophic failures and avoid unexpected breakdowns. More specifically, power modules for inverter applications are a technology requiring...
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Context 1
... level. In each cycle, a load current I L (e.g., 50 A) and a sense current I sense (e.g., 100 mA) are applied for a time interval equal to t on and t o f f , respectively. These currents are applied to monitor the voltage drop across the power switch during t on and to derive the minimum and maximum junction temperature during t o f f (see Fig. ...
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... a critical degradation level due to wire bond lift-offs or solder layer degradation, respectively [10]. More specifically, the first failure criterion regards the cold value of V CE , indicated as V CE,cold . This value can be used as unique indicator for bond wire lift-offs, because the measurement is performed when T j is minimum (point b in Fig. 2) and T j,min is not influenced by chip solder degradation. Similar failure threshold values apply to MOSFET power modules. In this specific test, only V DS ,hot (point c in Fig. 2) is measured and a threshold value equal to 11.5% is used to detect bond wire damages. This higher voltage limit takes into account the influence of the ...
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... V CE , indicated as V CE,cold . This value can be used as unique indicator for bond wire lift-offs, because the measurement is performed when T j is minimum (point b in Fig. 2) and T j,min is not influenced by chip solder degradation. Similar failure threshold values apply to MOSFET power modules. In this specific test, only V DS ,hot (point c in Fig. 2) is measured and a threshold value equal to 11.5% is used to detect bond wire damages. This higher voltage limit takes into account the influence of the increasing T j,max during the power cycling ...
Context 4
... level. In each cycle, a load current I L (e.g., 50 A) and a sense current I sense (e.g., 100 mA) are applied for a time interval equal to t on and t o f f , respectively. These currents are applied to monitor the voltage drop across the power switch during t on and to derive the minimum and maximum junction temperature during t o f f (see Fig. ...
Context 5
... a critical degradation level due to wire bond lift-offs or solder layer degradation, respectively [10]. More specifically, the first failure criterion regards the cold value of V CE , indicated as V CE,cold . This value can be used as unique indicator for bond wire lift-offs, because the measurement is performed when T j is minimum (point b in Fig. 2) and T j,min is not influenced by chip solder degradation. Similar failure threshold values apply to MOSFET power modules. In this specific test, only V DS ,hot (point c in Fig. 2) is measured and a threshold value equal to 11.5% is used to detect bond wire damages. This higher voltage limit takes into account the influence of the ...
Context 6
... V CE , indicated as V CE,cold . This value can be used as unique indicator for bond wire lift-offs, because the measurement is performed when T j is minimum (point b in Fig. 2) and T j,min is not influenced by chip solder degradation. Similar failure threshold values apply to MOSFET power modules. In this specific test, only V DS ,hot (point c in Fig. 2) is measured and a threshold value equal to 11.5% is used to detect bond wire damages. This higher voltage limit takes into account the influence of the increasing T j,max during the power cycling ...
Context 7
... level. In each cycle, a load current I L (e.g., 50 A) and a sense current I sense (e.g., 100 mA) are applied for a time interval equal to t on and t o f f , respectively. These currents are applied to monitor the voltage drop across the power switch during t on and to derive the minimum and maximum junction temperature during t o f f (see Fig. ...
Context 8
... a critical degradation level due to wire bond lift-offs or solder layer degradation, respectively [10]. More specifically, the first failure criterion regards the cold value of V CE , indicated as V CE,cold . This value can be used as unique indicator for bond wire lift-offs, because the measurement is performed when T j is minimum (point b in Fig. 2) and T j,min is not influenced by chip solder degradation. Similar failure threshold values apply to MOSFET power modules. In this specific test, only V DS ,hot (point c in Fig. 2) is measured and a threshold value equal to 11.5% is used to detect bond wire damages. This higher voltage limit takes into account the influence of the ...
Context 9
... V CE , indicated as V CE,cold . This value can be used as unique indicator for bond wire lift-offs, because the measurement is performed when T j is minimum (point b in Fig. 2) and T j,min is not influenced by chip solder degradation. Similar failure threshold values apply to MOSFET power modules. In this specific test, only V DS ,hot (point c in Fig. 2) is measured and a threshold value equal to 11.5% is used to detect bond wire damages. This higher voltage limit takes into account the influence of the increasing T j,max during the power cycling ...
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This article presents a printed circuit board (PCB) -embedded 1.2 kV silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) half-bridge package for a 22 kW electric vehicle (EV) on-board charger (OBC). The package meets the application's thermal and electrical requirements while eliminating or reducing factors that drive u...
Citations
... Power cycling test procedure[52]. ...
Silicon carbide (SiC)-based metal–oxide–semiconductor field-effect transistors (MOSFETs) hold promising application prospects in future high-capacity high-power converters due to their excellent electrothermal characteristics. However, as nascent power electronic devices, their long-term operational reliability lacks sufficient field data. The power cycling test is an important experimental method to assess packaging-related reliability. In order to obtain data closest to actual working conditions, forward power cycling is utilized to carry out SiC MOSFET degradation experiments. Due to the wide bandgap characteristics of SiC MOSFETs, the short-term drift of the threshold voltage is much more serious than that of silicon (Si)-based devices. Therefore, an offline threshold voltage measurement circuit is implemented during power cycling tests to minimize errors arising from this short-term drift. Different characterizations are performed based on power cycling tests, focused on measuring the on-state resistance, thermal impedance, and threshold voltage of the devices. The findings reveal that the primary failure mode under forward power cycling tests, with a maximum junction temperature of 130 ∘C, is bond-wire degradation. Conversely, the solder layer and gate oxide exhibit minimal degradation tendencies under these conditions.
... Where T j and T a are the mean junction-and ambient temperatures respectively and R th is the total thermal resistance of the device from junction-to-ambient. Thus, by assuming an approximately constant thermal resistance from junction-toambient it is evident that the semiconductor switching and conduction losses are proportional to the mean junction temperature which is directly correlated to the device degradation and thus the number of cycles to failure [86]- [88]. Additionally, the device will be subject to a switching frequency temperature swing caused by the surplus energy dissipation during each switching transitions, which can impact the lifetime of the device due to bondwire failure mechanisms [89], [90]. ...
Recent development within the field of medium voltage wide-bandgap semiconductor devices are drawing the attention from both researchers and industries, due to the demanding requirements for more efficient high-power energy conversion. The rapid development has entailed an increased awareness of the negative impact of increased rate of change in voltage, d vd t, and its derived issues caused by the inevitable parasitic capacitive couplings. This paper is dedicated to present an overview of the parasitic capacitive couplings in high-power medium voltage power electronic converter systems, using an example reference system enabled by medium voltage SiC MOSFETs. The definitions of capacitive couplings are presented and the impacts raised by parasitic capacitive couplings are reviewed. In addition, the similarities of different capacitive couplings introduced by components in practical medium voltage systems are presented and summarized. Lastly, the challenges and future work with respect to parasitic capacitive couplings in medium voltage power electronics converter systems are shared from the authors' perspective.
The SiC die has broad application prospects in new energy vehicles due to its excellent performances. In recent years, with the continuous development, the safety and reliability of SiC power modules have become particularly important and highly valued. In this paper, a case about the abnormal failure of SiC power modules during the High Voltage-High Humidity High Temperature Reverse Bias (HV-H3TRB) tests was addressed. According to the failure phenomena, a systematical investigation was conducted to explore the root cause by a series of methods such as failure point localization, synchrotron radiation infrared spectrum (SR-IR), time of flight-secondary ion mass spectrometry (TOF-SIMS), the ion beam method, scanning electron microscope (SEM) equipped with the energy dispersive spectrometer (EDS). Finally, the root cause of the failure was determined through comprehensive analysis, and based on the conclusions, some corresponding countermeasures were also proposed. Hopefully, the achievements obtained in this paper would be of great significance for improving the reliability of SiC power modules and avoiding similar failure in future manufacturing process.
