Fig 4 - uploaded by Walter A. Dos Santos
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The advantages of a small scale space program over its bulky and complex space counterparts have been extensively documented in the technical literature. These systems are carrying on affordable solutions to telecommunications, earth observation, small-scale space science besides their direct effects in improving general education and training. Cos...
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... spacecraft will be equipped with an onboard computer subsystem to perform all the on board supervision functions that comprises: acquisition, decoding and distribution of ground telecommands, gather telemetry data, encode satellite to ground messages, attitude control calculations and execution of all other functions related to attitude control, and satellite status inventory. The onboard computer subsystem comprises three processing units based on the transputer T805 and three I/O (see Figure 4) interfaces that are connected among themselves through high speed serial links (10 Mbps). Each one of the interfaces is fully redundant 4 and is connected to two processing units. ...
Citations
A fault tolerant computer system has been conceived to become the standard framework that will be utilized by the future family of Brazilian small satellites for scientific applications. Based on the proposed standard, a computer system with three processing modules was developed for the First Brazilian Scientific Application Microsatellite (SACI-1 -Satélite Científico). Each processing module is based on a 32-bit Transputer that is connected to the two other processing modules, as well as, to the satellite subsystems through a 10 Mbit serial bus. A set of fault handling mechanisms is implemented in the computer system which enable it to tolerate a single fault and most of the double faults. Four switches controlled by a watch-dog-timer are used in each processing module to allow the serial links to bypass the processor when a catastrophic fault is detected in that module. This technique allows the computer system to degrade gracefully to two processing modules, or even to one processing module. The computer system is designed to execute all on board tasks with three or two processing modules and the essential tasks with one processing module. A large mass memory that uses memory chips not qualified for space was implemented in each processing module. Since these memory chips are susceptible to cosmic radiation, a special circuit was used to detect latchups and to power off the memory chip for 10 msec when a latchup is detected. Additionally, these memory chips present a high single event upset (SEU) rate, when in orbit, producing single, double and, less frequently, triples errors in a memory word. To overcome this problem, the scientific experiment data frames are coded before being stored in the mass memory using an error correction code. The on board software was organized around a set of processes that communicate among themselves through a routing process. The essential software was formally specified and its correctness certified using the CSP-Z formalism.
