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In this paper we propose a compact representation of logic functions using Multi-valued Decision Diagrams (MDDs) called heterogeneous MDDs. In a heterogeneous MDD, each variable may take a different domain. By partitioning binary input variables and representing each partition as a single multi-valued variable, we can produce a heterogeneous MDD wi...
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... space complexity for Algorithm 4.2 is O(N + C) = O(N ), where C is considered as a constant value. Table 1 compares the memory size and APL for heteroge- neous MDDs with those for OBDDs and FBDDs. The OB- DDs are obtained by the best known variable orders [30]. ...
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... data for FBDDs were provided by Dr. W. Günther [8], [9]. In Table 1, "MDD1" denotes the minimum hetero- geneous MDDs obtained by Algorithm 4.1, where Algo- [30] as the initial ones. Similarly, "MDD2" denotes heterogeneous MDDs with the minimum APL obtained by Algorithm 4.2, where the memory limita- tions L used the memory sizes needed for the OBDDs, and the size of the cache to store the sub-solutions is 5,000,000. ...
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... APLs for DDs are calcu- lated using the method in [29]. The columns "Time1" and "Time2" in Table 1 denote the CPU time for Algorithm 4.1 and Algorithm 4.2, respectively. We used the following en- vironment: ...
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... Table 1, the bottom row "Average of ratios" denotes the arithmetic average of the relative memory size and APL, where those for OBDD are set to 1.000. These results show that heterogeneous MDDs require comparable memory size to the FBDDs, smaller memory size than OBDDs, and het- erogeneous MDDs have shorter APL than OBDDs and FB- DDs. ...
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Citations
... Given the MDD m, its cardinality |m| is the MDDs can represent Boolean logic functions using less memory and shorter path then BDDs. From a theoretical point of view, Nagayama [22] demonstrated that the amount of memory used by mapping Boolean function with Boolean variables to heterogeneous MDD is lesser than using OBDD directly. This seems to suggest that MDDs are the preferred data structure when the domains are not simple Boolean values. ...
Combinatorial interaction testing (CIT) is an emerging testing technique that has proved to be effective in finding faults due to the interaction among inputs. Efficient test generation for CIT is still an open problem especially when applied to real models having meaningful size and containing many constraints among inputs. In this paper we present a novel technique for the automatic generation of compact test suites starting from models containing constraints given in general form. It is based on the use of Multivalued Decision Diagrams (MDDs) which prove to be suitable to efficiently support CIT. We devise and experiment several optimizations including a novel variation of the classical greedy policy normally used in similar algorithms. The results of a thorough comparison with other similar techniques are presented and show that our approach can provide several advantages in terms of applicability, test suite size, generation time, and cost.
... Various decision diagrams (DDs), e.g., BDD [3], MDD [10], QRBDD [19], QRMDD [6], heterogeneous MDD (HMDD) [12], exist. DD machines (DDMs) are special purpose processors that evaluate these DDs [2]. ...
This paper considers a heterogeneous multi-valued decision diagram machine (HMDDM). First, we introduce a standard heterogeneous multi-valued decision diagram machine (standard HMDDM). Then, we show a method to prefetch index for the HMDDM (prefetching HMDDM). The standard HMDDM requires two memory references to read the jump address and the index separately, while the prefetching HMDDM requires only one memory reference to them at a time. Thus, the prefetching HMDDM is twice faster than the standard HMDDM. We implemented the prefetching HMDDM on an FPGA. Also, we compared with Intel's Core2Duo (1.2 GHz). As for the execution time, the prefetching HMDDM is 14.53-18.97 times faster than the Core2Duo. Since the HMDDM consists of the small FPGA and the off-chip RAM, the power consumption for the HMDDM is smaller than that for the conventional CPU. Thus, the HMDDM is the power-performance efficient processor.
... In our paper, we use the IT E operator as an operator on the set of logic functions. A set of logic functions can be considered as a single function of n input binary variables and m binary output variables [10], [17], [19]. The domain and range of such a MOF are the n-dimensional and ...
... In our paper, we use the IT E operator as an operator on the set of logic functions. A set of logic functions can be considered as a single function of n input binary variables and m binary output variables [10], [17], [19]. The domain and range of such a MOF are the n-dimensional and m-dimensional Boolean cubes, respectively. ...
The paper studies a new polynomial representation of Multi Output Functions (MOFs). The new representation, called GITE-polynomials, is based on a newly introduced Generalized If-Then-Else (GITE) function. Being a compact form of representation of MOFs, the GITE-polynomials allow efficient manipulation with a set of functions. The paper introduces algebra of GITE-polynomials. Properties of this algebra are used for solving the MOF-decomposition problem. The solution provides a compact representation of MOFs.
... The heterogeneous multi-valued decision diagram (HMDD) may have nodes with different number of variables [7]. By selecting an optimal partition of the input variables, the HMDDs can evaluate logic functions about two times faster than BDDs using the same amount of memory [11]. ...
A heterogeneous multi-valued decision diagram~(HMDD) may have nodes with different numbers of variables. By partitioning the input variables into optimal disjoint sets, the HMDDs evaluate the function faster than BDDs with the same amount of memory. In this paper, we compare multi-output HMDD machines. First, we introduce three types of HMDDs: plural single-output HMDDs, Multi-Terminal HMDD, and HMDD for ECFN.Next, we show three HMDD machines~(HMDDMs). Then, we compare three HMDDMs with respect to the memory size, the execution time, and the area-time complexity. The comparison shows that, as for the area-time complexity, the HMDD for ECFN machine is the best.
... Since the mask data 0 at the address 8 means arrival at the terminal node, adding the edge weight 0 to the previous sum of edge weights 3 yields the function value 3. (End of Example) Memory size and delay time of our NFG depend largely on memory size and path length of EVMDD. Therefore , the memory minimization algorithm and the APL minimization algorithm for MDDs [19], [20] are useful for producing fast and compact NFGs. ...
This paper proposes a high-speed architecture to realize two-variable numeric functions. It represents the given function as an edge-valued multiple-valued decision diagram (EVMDD), and shows a systematic design method based on the EVMDD. To achieve a design, we characterize a numeric function f by the values of l and p for which f is an l-restricted Mp-monotone increasing function. Here, l is a measure of subfunctions of f and p is a measure of the rate at which f increases with an increase in the dependent variable. For the special case of an EVMDD, the EVBDD, we show an upper bound on the number of nodes needed to realize an l-restricted Mp-monotone increasing function. Experimental results show that all of the two-variable numeric functions considered in this paper can be converted into an l-restricted Mp-monotone increasing function with p = 1 or 3. Thus, they can be compactly realized by EVBDDs. Since EVMDDs have shorter paths and smaller memory size than EVBDDs, EVMDDs can produce fast and compact NFGs.
... Various decision diagrams (DDs), e.g., BDD[2], MDD[6], QRBDD[12], QRMDD[4], heterogeneous MDD (HMDD)[8], have been proposed. DD machines (DDMs) are special purpose processors that evaluate DDs [1]. ...
This paper compares 6 decision diagram machines (DDMs) with respect to area-time complexity, throughput, and compatibility to the existing memory. First, 6 types of decision diagrams (DDs): BDD, MDD, QRBDD, QRMDD, heterogeneous MDD (HMDD), and QRHMDD are introduced. Second, corresponding DDMs are developed. Third, memory sizes and average path length (APL) for these DDs are compared. As for area-time complexity, the QDDM is the best; as for throughput, the QRQDDM is the best; and as for compatibility to the existing memory, the HMDDM is the best.
... Memory size and delay time of our function generator depend largely on memory size and path length of EVMDD. Therefore, the memory minimization algorithm and the APL minimization algorithm for MDDs [17, 18] are useful to produce fast and compact function generators. ...
This paper proposes a method to represent two-variable elementary functions using edge-valued multi-valued decision diagrams (EVMDDs), and presents a design method and an architecture for function generators using EVMDDs. To show the compactness of EVMDDs, this paper introduces a new class of integer-valued functions, l-restricted Mp-monotone increasing functions, and derives an upper bound on the number of nodes in an edge-valued binary decision diagram (EVBDD) for the l-restricted Mp-monotone increasing function. EVBDDs represent l-restricted Mp- monotone increasing functions more compactly than MTB- DDs and BMDs when p is small. Experimental results show that all the two-variable elementary functions considered in this paper can be converted into l-restricted Mp- monotone increasing functions with p = 1 or p = 3, and can be compactly represented by EVBDDs. Since EVMDDs have shorter paths and smaller memory size than EVBDDs, EVMDDs can produce fast and compact elementary function generators.
... In general they offer only limited possibilities of data exchange with other similar software. Different applications of existing diagrams, as well as newly defined decision diagrams often require modifications of existing programming packages to appreciate their peculiar features [9], [14]. In our best knowledge there is no commonly accepted standard for these specific tasks. ...
... From the point of view of a data structure, terminal nodes differ from non-terminal ones only in the fact that they do not have any outgoing edges. Different types of decision diagrams are defined depending on the number of outgoing edges permitted per node, and other criteria [1], [5], [9], [14], [16], [19], [21]. Few examples of different decision diagrams will be discussed in Section 6. ...
... That permits us to use the standard well adapted and efficient algorithms for addition and removal of nodes, accessing elements of the graph, etc. It is also consistent with the usual way decision diagram have been represented in various previous applications aimed at dealing with them [14], [18], [19]. ...
In this paper, we propose an XML (Extensible Markup Language) based standard for description of the structure of various types of decision diagrams for representation of discrete functions. Proposed standard describes elements of the structure common to various types of decision diagrams. It also provides facilities for storing of additional information specific to particular types of decision diagrams. Properties of XML enable us to define a standard that is flexible enough to be applicable to existing types of decision diagrams as well as new types that could be defined in future. The existence of such a standard permits efficient storage and exchange of data in decision diagram form between various software systems.
... As shown in Example 5, the memory size and the number of LUTs in an LUT cascade also depend on the decomposition and the variable order of the MTBDD. To find the best LUT cascade, we use an optimization algorithm for heterogeneous multivalued decision diagrams (MDDs) [22], [23]. In an FPGA implementation of an NFG, each LUT in an LUT cascade is implemented with a block RAM in an FPGA. ...
... As shown in Section 4.2, the memory size of the LUT cascade depends on the decomposition and variable order of the MTBDD. In this experiment, we used the optimum decomposition and variable order that minimize the memory size [22], [23]. Table 2 shows that, for logarithmic, square root, reciprocal, and their compound functions, the memory size for nonuniform segmentation is smaller than that for the uniform segmentation. ...
This paper proposes an architecture and a synthesis method for high-speed computation of fixed-point numerical functions such as trigonometric, logarithmic, sigmoidal, square root, and combinations of these functions. Our architecture is based on the lookup table (LUT) cascade, which results in a significant reduction in circuit complexity compared to traditional approaches. This is suitable for automatic synthesis and we show a synthesis method that converts a Matlab-like specification into an LUT cascade design. Experimental results show the efficiency of our approach as implemented on a field-programmable gate array (FPGA)
... Shannon expansion to the multi-valued input integer func- tion [6] [11, 12]. In the following, the heterogeneous MDD is simply denoted by the MDD. ...
... When we represent an integer function f (X) using an EVMDD by a partition of X, the memory size of the EVMDD depends on the partition of X as shown in Example 6. In this paper, to find the partition of X that minimizes the memory size, we used the algorithm for heterogeneous MDDs proposed in [11, 12].Table 4 compares the numbers of non-terminal nodes and memory sizes of BMDs, EVBDDs, and EVMDDs for 16-bit precision elementary functions. Since non-terminal nodes in EVBDDs have weighted 1-edges, the memory size of each non-terminal node in an EVBDD is larger than that of a non-terminal node in the BMD. ...
This paper proposes a method to represent elementary functions such as trigonometric, logarithmic, square root, and reciprocal functions using edge-valued multi-valued decision diagrams (EVMDDs). We introduce a new class of integer functions, Mp-monotone increasing functions, and derive an upper bound on the number of nodes in an edge-valued binary decision diagram (EVBDD) for the Mp-monotone increasing function. The upper bound shows that EVBDDs represent Mp-monotone increasing functions more compactly than other decision diagrams when p is small. Experimental results using 16-bit precision elementary functions show that: 1) standard elementary functions can be converted into Mp-monotone increasing functions with p = 1 or p = 2, or their linear transformations. And, they can be compactly represented by EVBDDs. 2) EVMDDs represent elementary functions with, on average, only 11% of the memory size needed for binary moment diagrams (BMDs), and only 69% of the memory size needed for EVBDDs.
